Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Much smaller batch of fixes this week.

  Biggest one is a revert of an OMAP display change that removed some
  non-DT pinmux code that was still needed for 3.13 to get DSI displays
  to work.

  There's also a fix that resolves some misdescribed GPIO controller
  resources on shmobile.  The rest are mostly smaller fixes, a couple of
  MAINTAINERS updates, etc"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  Revert "ARM: OMAP2+: Remove legacy mux code for display.c"
  MAINTAINERS: Add keystone clock drivers
  MAINTAINERS: Add keystone git tree information
  ARM: s3c64xx: dt: Fix boot failure due to double clock initialization
  ARM: shmobile: r8a7790: Fix GPIO resources in DTS
  irqchip: renesas-intc-irqpin: Fix register bitfield shift calculation
  ARM: shmobile: lager: phy fixup needs CONFIG_PHYLIB

6 files changed, 61 insertions, 26 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index 7a015cb8fea0..d5e4ff328cc7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1008,6 +1008,8 @@ M:	Santosh Shilimkar <santosh.shilimkar@ti.com>
 L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:      Maintained
 F:      arch/arm/mach-keystone/
+F:      drivers/clk/keystone/
+T:      git git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone.git
 
 ARM/LOGICPD PXA270 MACHINE SUPPORT
 M:      Lennert Buytenhek <kernel@wantstofly.org>
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ee845fad939b..46e1d7ef163f 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -87,9 +87,9 @@
                 interrupts = <1 9 0xf04>;
         };
 
-        gpio0: gpio@ffc40000 {
+        gpio0: gpio@e6050000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc40000 0 0x2c>;
+                reg = <0 0xe6050000 0 0x50>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 4 0x4>;
                 #gpio-cells = <2>;
@@ -99,9 +99,9 @@
                 interrupt-controller;
         };
 
-        gpio1: gpio@ffc41000 {
+        gpio1: gpio@e6051000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc41000 0 0x2c>;
+                reg = <0 0xe6051000 0 0x50>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 5 0x4>;
                 #gpio-cells = <2>;
@@ -111,9 +111,9 @@
                 interrupt-controller;
         };
 
-        gpio2: gpio@ffc42000 {
+        gpio2: gpio@e6052000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc42000 0 0x2c>;
+                reg = <0 0xe6052000 0 0x50>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 6 0x4>;
                 #gpio-cells = <2>;
@@ -123,9 +123,9 @@
                 interrupt-controller;
         };
 
-        gpio3: gpio@ffc43000 {
+        gpio3: gpio@e6053000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc43000 0 0x2c>;
+                reg = <0 0xe6053000 0 0x50>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 7 0x4>;
                 #gpio-cells = <2>;
@@ -135,9 +135,9 @@
                 interrupt-controller;
         };
 
-        gpio4: gpio@ffc44000 {
+        gpio4: gpio@e6054000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc44000 0 0x2c>;
+                reg = <0 0xe6054000 0 0x50>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 8 0x4>;
                 #gpio-cells = <2>;
@@ -147,9 +147,9 @@
                 interrupt-controller;
         };
 
-        gpio5: gpio@ffc45000 {
+        gpio5: gpio@e6055000 {
                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-                reg = <0 0xffc45000 0 0x2c>;
+                reg = <0 0xe6055000 0 0x50>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 9 0x4>;
                 #gpio-cells = <2>;
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 58347bb874a0..4cf165502b35 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -101,13 +101,51 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = {
         { "dss_hdmi", "omapdss_hdmi", -1 },
 };
 
+static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
+{
+        u32 enable_mask, enable_shift;
+        u32 pipd_mask, pipd_shift;
+        u32 reg;
+
+        if (dsi_id == 0) {
+                enable_mask = OMAP4_DSI1_LANEENABLE_MASK;
+                enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT;
+                pipd_mask = OMAP4_DSI1_PIPD_MASK;
+                pipd_shift = OMAP4_DSI1_PIPD_SHIFT;
+        } else if (dsi_id == 1) {
+                enable_mask = OMAP4_DSI2_LANEENABLE_MASK;
+                enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT;
+                pipd_mask = OMAP4_DSI2_PIPD_MASK;
+                pipd_shift = OMAP4_DSI2_PIPD_SHIFT;
+        } else {
+                return -ENODEV;
+        }
+
+        reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
+
+        reg &= ~enable_mask;
+        reg &= ~pipd_mask;
+
+        reg |= (lanes << enable_shift) & enable_mask;
+        reg |= (lanes << pipd_shift) & pipd_mask;
+
+        omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY);
+
+        return 0;
+}
+
 static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
 {
+        if (cpu_is_omap44xx())
+                return omap4_dsi_mux_pads(dsi_id, lane_mask);
+
         return 0;
 }
 
 static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
 {
+        if (cpu_is_omap44xx())
+                omap4_dsi_mux_pads(dsi_id, 0);
 }
 
 static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput)
diff --git a/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c b/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
index 7eb9a10fc1af..2fddf38192df 100644
--- a/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
+++ b/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c
@@ -8,8 +8,6 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/clk-provider.h>
-#include <linux/irqchip.h>
 #include <linux/of_platform.h>
 
 #include <asm/mach/arch.h>
@@ -48,15 +46,9 @@ static void __init s3c64xx_dt_map_io(void)
                 panic("SoC is not S3C64xx!");
 }
 
-static void __init s3c64xx_dt_init_irq(void)
-{
-        of_clk_init(NULL);
-        samsung_wdt_reset_of_init();
-        irqchip_init();
-};
-
 static void __init s3c64xx_dt_init_machine(void)
 {
+        samsung_wdt_reset_of_init();
         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
 
@@ -79,7 +71,6 @@ DT_MACHINE_START(S3C6400_DT, "Samsung S3C64xx (Flattened Device Tree)")
         /* Maintainer: Tomasz Figa <tomasz.figa@gmail.com> */
         .dt_compat      = s3c64xx_dt_compat,
         .map_io         = s3c64xx_dt_map_io,
-        .init_irq       = s3c64xx_dt_init_irq,
         .init_machine   = s3c64xx_dt_init_machine,
         .restart        = s3c64xx_dt_restart,
 MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
index a8d3ce646fb9..e0406fd37390 100644
--- a/arch/arm/mach-shmobile/board-lager.c
+++ b/arch/arm/mach-shmobile/board-lager.c
@@ -245,7 +245,9 @@ static void __init lager_init(void)
 {
         lager_add_standard_devices();
 
-        phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
+        if (IS_ENABLED(CONFIG_PHYLIB))
+                phy_register_fixup_for_id("r8a7790-ether-ff:01",
+                                          lager_ksz8041_fixup);
 }
 
 static const char * const lager_boards_compat_dt[] __initconst = {
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
index 82cec63a9011..3ee78f02e5d7 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -149,8 +149,9 @@ static void intc_irqpin_read_modify_write(struct intc_irqpin_priv *p,
 static void intc_irqpin_mask_unmask_prio(struct intc_irqpin_priv *p,
                                          int irq, int do_mask)
 {
-        int bitfield_width = 4; /* PRIO assumed to have fixed bitfield width */
-        int shift = (7 - irq) * bitfield_width; /* PRIO assumed to be 32-bit */
+        /* The PRIO register is assumed to be 32-bit with fixed 4-bit fields. */
+        int bitfield_width = 4;
+        int shift = 32 - (irq + 1) * bitfield_width;
 
         intc_irqpin_read_modify_write(p, INTC_IRQPIN_REG_PRIO,
                                       shift, bitfield_width,
@@ -159,8 +160,9 @@ static void intc_irqpin_mask_unmask_prio(struct intc_irqpin_priv *p,
 
 static int intc_irqpin_set_sense(struct intc_irqpin_priv *p, int irq, int value)
 {
+        /* The SENSE register is assumed to be 32-bit. */
         int bitfield_width = p->config.sense_bitfield_width;
-        int shift = (7 - irq) * bitfield_width; /* SENSE assumed to be 32-bit */
+        int shift = 32 - (irq + 1) * bitfield_width;
 
         dev_dbg(&p->pdev->dev, "sense irq = %d, mode = %d\n", irq, value);