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authorMaurus Cuelenaere <mcuelenaere@gmail.com>2009-11-23 07:34:46 -0500
committerBen Dooks <ben-linux@fluff.org>2009-11-30 20:35:41 -0500
commit92b118f6968ae0788ac659af47b464acd9a754a1 (patch)
treee0fe3516449919d7255a8ad998b54d39c5497a8b
parent6a88e9838fdc9ede136e3bb76a5c19413bd6cddb (diff)
ARM: S3C64XX: add HSMMC2 support
This adds support for the third SDHCI controller. Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r--arch/arm/mach-s3c6400/s3c6400.c1
-rw-r--r--arch/arm/mach-s3c6410/cpu.c1
-rw-r--r--arch/arm/plat-s3c/Kconfig5
-rw-r--r--arch/arm/plat-s3c/Makefile1
-rw-r--r--arch/arm/plat-s3c/dev-hsmmc2.c69
-rw-r--r--arch/arm/plat-s3c/include/plat/sdhci.h25
-rw-r--r--arch/arm/plat-s3c64xx/setup-sdhci-gpio.c20
7 files changed, 122 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6400/s3c6400.c b/arch/arm/mach-s3c6400/s3c6400.c
index b42bdd0f2138..d876ee503671 100644
--- a/arch/arm/mach-s3c6400/s3c6400.c
+++ b/arch/arm/mach-s3c6400/s3c6400.c
@@ -45,6 +45,7 @@ void __init s3c6400_map_io(void)
45 45
46 s3c6400_default_sdhci0(); 46 s3c6400_default_sdhci0();
47 s3c6400_default_sdhci1(); 47 s3c6400_default_sdhci1();
48 s3c6400_default_sdhci2();
48 49
49 /* the i2c devices are directly compatible with s3c2440 */ 50 /* the i2c devices are directly compatible with s3c2440 */
50 s3c_i2c0_setname("s3c2440-i2c"); 51 s3c_i2c0_setname("s3c2440-i2c");
diff --git a/arch/arm/mach-s3c6410/cpu.c b/arch/arm/mach-s3c6410/cpu.c
index 9b67c663d9d8..522c08691952 100644
--- a/arch/arm/mach-s3c6410/cpu.c
+++ b/arch/arm/mach-s3c6410/cpu.c
@@ -58,6 +58,7 @@ void __init s3c6410_map_io(void)
58 /* initialise device information early */ 58 /* initialise device information early */
59 s3c6410_default_sdhci0(); 59 s3c6410_default_sdhci0();
60 s3c6410_default_sdhci1(); 60 s3c6410_default_sdhci1();
61 s3c6410_default_sdhci2();
61 62
62 /* the i2c devices are directly compatible with s3c2440 */ 63 /* the i2c devices are directly compatible with s3c2440 */
63 s3c_i2c0_setname("s3c2440-i2c"); 64 s3c_i2c0_setname("s3c2440-i2c");
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index 8931c5f0e46b..57e685b68495 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -178,6 +178,11 @@ config S3C_DEV_HSMMC1
178 help 178 help
179 Compile in platform device definitions for HSMMC channel 1 179 Compile in platform device definitions for HSMMC channel 1
180 180
181config S3C_DEV_HSMMC2
182 bool
183 help
184 Compile in platform device definitions for HSMMC channel 2
185
181config S3C_DEV_I2C1 186config S3C_DEV_I2C1
182 bool 187 bool
183 help 188 help
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index 3c09109e9e84..50444da98425 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_HAVE_PWM) += pwm.o
36 36
37obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o 37obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
38obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o 38obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
39obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o
39obj-y += dev-i2c0.o 40obj-y += dev-i2c0.o
40obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o 41obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
41obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o 42obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
diff --git a/arch/arm/plat-s3c/dev-hsmmc2.c b/arch/arm/plat-s3c/dev-hsmmc2.c
new file mode 100644
index 000000000000..33506c12b44c
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-hsmmc2.c
@@ -0,0 +1,69 @@
1/* linux/arch/arm/plat-s3c/dev-hsmmc2.c
2 *
3 * Copyright (c) 2009 Maurus Cuelenaere
4 *
5 * Based on arch/arm/plat-s3c/dev-hsmmc1.c
6 * original file Copyright (c) 2008 Simtec Electronics
7 *
8 * S3C series device definition for hsmmc device 2
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/mmc/host.h>
18
19#include <mach/map.h>
20#include <plat/sdhci.h>
21#include <plat/devs.h>
22#include <plat/cpu.h>
23
24#define S3C_SZ_HSMMC (0x1000)
25
26static struct resource s3c_hsmmc2_resource[] = {
27 [0] = {
28 .start = S3C_PA_HSMMC2,
29 .end = S3C_PA_HSMMC2 + S3C_SZ_HSMMC - 1,
30 .flags = IORESOURCE_MEM,
31 },
32 [1] = {
33 .start = IRQ_HSMMC2,
34 .end = IRQ_HSMMC2,
35 .flags = IORESOURCE_IRQ,
36 }
37};
38
39static u64 s3c_device_hsmmc2_dmamask = 0xffffffffUL;
40
41struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
42 .max_width = 4,
43 .host_caps = (MMC_CAP_4_BIT_DATA |
44 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
45};
46
47struct platform_device s3c_device_hsmmc2 = {
48 .name = "s3c-sdhci",
49 .id = 2,
50 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
51 .resource = s3c_hsmmc2_resource,
52 .dev = {
53 .dma_mask = &s3c_device_hsmmc2_dmamask,
54 .coherent_dma_mask = 0xffffffffUL,
55 .platform_data = &s3c_hsmmc2_def_platdata,
56 },
57};
58
59void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
60{
61 struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata;
62
63 set->max_width = pd->max_width;
64
65 if (pd->cfg_gpio)
66 set->cfg_gpio = pd->cfg_gpio;
67 if (pd->cfg_card)
68 set->cfg_card = pd->cfg_card;
69}
diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-s3c/include/plat/sdhci.h
index f615308ccdfb..d5a3b41bddb9 100644
--- a/arch/arm/plat-s3c/include/plat/sdhci.h
+++ b/arch/arm/plat-s3c/include/plat/sdhci.h
@@ -57,6 +57,7 @@ struct s3c_sdhci_platdata {
57 */ 57 */
58extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); 58extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
59extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); 59extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
60extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
60 61
61/* Default platform data, exported so that per-cpu initialisation can 62/* Default platform data, exported so that per-cpu initialisation can
62 * set the correct one when there are more than one cpu type selected. 63 * set the correct one when there are more than one cpu type selected.
@@ -64,11 +65,13 @@ extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
64 65
65extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; 66extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
66extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; 67extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
68extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
67 69
68/* Helper function availablity */ 70/* Helper function availablity */
69 71
70extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); 72extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
71extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 73extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
74extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
72 75
73/* S3C6400 SDHCI setup */ 76/* S3C6400 SDHCI setup */
74 77
@@ -103,6 +106,17 @@ static inline void s3c6400_default_sdhci1(void)
103static inline void s3c6400_default_sdhci1(void) { } 106static inline void s3c6400_default_sdhci1(void) { }
104#endif /* CONFIG_S3C_DEV_HSMMC1 */ 107#endif /* CONFIG_S3C_DEV_HSMMC1 */
105 108
109#ifdef CONFIG_S3C_DEV_HSMMC2
110static inline void s3c6400_default_sdhci2(void)
111{
112 s3c_hsmmc2_def_platdata.clocks = s3c6400_hsmmc_clksrcs;
113 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
114 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
115}
116#else
117static inline void s3c6400_default_sdhci2(void) { }
118#endif /* CONFIG_S3C_DEV_HSMMC2 */
119
106#else 120#else
107static inline void s3c6400_default_sdhci0(void) { } 121static inline void s3c6400_default_sdhci0(void) { }
108static inline void s3c6400_default_sdhci1(void) { } 122static inline void s3c6400_default_sdhci1(void) { }
@@ -140,6 +154,17 @@ static inline void s3c6410_default_sdhci1(void)
140static inline void s3c6410_default_sdhci1(void) { } 154static inline void s3c6410_default_sdhci1(void) { }
141#endif /* CONFIG_S3C_DEV_HSMMC1 */ 155#endif /* CONFIG_S3C_DEV_HSMMC1 */
142 156
157#ifdef CONFIG_S3C_DEV_HSMMC2
158static inline void s3c6410_default_sdhci2(void)
159{
160 s3c_hsmmc2_def_platdata.clocks = s3c6410_hsmmc_clksrcs;
161 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
162 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card;
163}
164#else
165static inline void s3c6410_default_sdhci2(void) { }
166#endif /* CONFIG_S3C_DEV_HSMMC2 */
167
143#else 168#else
144static inline void s3c6410_default_sdhci0(void) { } 169static inline void s3c6410_default_sdhci0(void) { }
145static inline void s3c6410_default_sdhci1(void) { } 170static inline void s3c6410_default_sdhci1(void) { }
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
index 5417123b0ac1..a58c0cc7ba5e 100644
--- a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
+++ b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
@@ -53,3 +53,23 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
53 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); 53 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
54 s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); 54 s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3));
55} 55}
56
57void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
58{
59 unsigned int gpio;
60 unsigned int end;
61
62 end = S3C64XX_GPH(6 + width);
63
64 /* Set all the necessary GPH pins to special-function 1 */
65 for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) {
66 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
67 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
68 }
69
70 /* Set all the necessary GPC pins to special-function 1 */
71 for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) {
72 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
73 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
74 }
75}