diff options
author | Kyungmin Park <kyungmin.park@samsung.com> | 2009-11-17 02:41:14 -0500 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2009-11-30 20:33:13 -0500 |
commit | 91e7d96e1f1781165a7df97e0dee1d007d3918f8 (patch) | |
tree | 3d93356db21b89c03c2aee020bdfed45c647dae4 | |
parent | ff916f25b2890403a9e6c02c98391daeb71ae92a (diff) |
ARM: S5PC1XX: add GPIO L banks to register definition
Add GPIO L0-L4 banks to register definition.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/gpio.h | 30 |
1 files changed, 23 insertions, 7 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h index c74fc93d7d15..5d22961a481e 100644 --- a/arch/arm/mach-s5pc100/include/mach/gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/gpio.h | |||
@@ -47,6 +47,11 @@ | |||
47 | #define S5PC1XX_GPIO_K1_NR (6) | 47 | #define S5PC1XX_GPIO_K1_NR (6) |
48 | #define S5PC1XX_GPIO_K2_NR (8) | 48 | #define S5PC1XX_GPIO_K2_NR (8) |
49 | #define S5PC1XX_GPIO_K3_NR (8) | 49 | #define S5PC1XX_GPIO_K3_NR (8) |
50 | #define S5PC1XX_GPIO_L0_NR (8) | ||
51 | #define S5PC1XX_GPIO_L1_NR (8) | ||
52 | #define S5PC1XX_GPIO_L2_NR (8) | ||
53 | #define S5PC1XX_GPIO_L3_NR (8) | ||
54 | #define S5PC1XX_GPIO_L4_NR (8) | ||
50 | #define S5PC1XX_GPIO_MP00_NR (8) | 55 | #define S5PC1XX_GPIO_MP00_NR (8) |
51 | #define S5PC1XX_GPIO_MP01_NR (8) | 56 | #define S5PC1XX_GPIO_MP01_NR (8) |
52 | #define S5PC1XX_GPIO_MP02_NR (8) | 57 | #define S5PC1XX_GPIO_MP02_NR (8) |
@@ -64,9 +69,9 @@ | |||
64 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | 69 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) |
65 | 70 | ||
66 | enum s3c_gpio_number { | 71 | enum s3c_gpio_number { |
67 | S5PC1XX_GPIO_A0_START = 0, | 72 | S5PC1XX_GPIO_A0_START = 0, |
68 | S5PC1XX_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A0), | 73 | S5PC1XX_GPIO_A1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A0), |
69 | S5PC1XX_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A1), | 74 | S5PC1XX_GPIO_B_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_A1), |
70 | S5PC1XX_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_B), | 75 | S5PC1XX_GPIO_C_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_B), |
71 | S5PC1XX_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_C), | 76 | S5PC1XX_GPIO_D_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_C), |
72 | S5PC1XX_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_D), | 77 | S5PC1XX_GPIO_E0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_D), |
@@ -93,11 +98,17 @@ enum s3c_gpio_number { | |||
93 | S5PC1XX_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K0), | 98 | S5PC1XX_GPIO_K1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K0), |
94 | S5PC1XX_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K1), | 99 | S5PC1XX_GPIO_K2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K1), |
95 | S5PC1XX_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K2), | 100 | S5PC1XX_GPIO_K3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K2), |
96 | S5PC1XX_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K3), | 101 | S5PC1XX_GPIO_L0_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_K3), |
102 | S5PC1XX_GPIO_L1_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L0), | ||
103 | S5PC1XX_GPIO_L2_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L1), | ||
104 | S5PC1XX_GPIO_L3_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L2), | ||
105 | S5PC1XX_GPIO_L4_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L3), | ||
106 | S5PC1XX_GPIO_MP00_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_L4), | ||
97 | S5PC1XX_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP00), | 107 | S5PC1XX_GPIO_MP01_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP00), |
98 | S5PC1XX_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP01), | 108 | S5PC1XX_GPIO_MP02_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP01), |
99 | S5PC1XX_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP02), | 109 | S5PC1XX_GPIO_MP03_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP02), |
100 | S5PC1XX_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP03), | 110 | S5PC1XX_GPIO_MP04_START = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP03), |
111 | S5PC1XX_GPIO_END = S5PC1XX_GPIO_NEXT(S5PC1XX_GPIO_MP04), | ||
101 | }; | 112 | }; |
102 | 113 | ||
103 | /* S5PC1XX GPIO number definitions. */ | 114 | /* S5PC1XX GPIO number definitions. */ |
@@ -130,17 +141,22 @@ enum s3c_gpio_number { | |||
130 | #define S5PC1XX_GPK1(_nr) (S5PC1XX_GPIO_K1_START + (_nr)) | 141 | #define S5PC1XX_GPK1(_nr) (S5PC1XX_GPIO_K1_START + (_nr)) |
131 | #define S5PC1XX_GPK2(_nr) (S5PC1XX_GPIO_K2_START + (_nr)) | 142 | #define S5PC1XX_GPK2(_nr) (S5PC1XX_GPIO_K2_START + (_nr)) |
132 | #define S5PC1XX_GPK3(_nr) (S5PC1XX_GPIO_K3_START + (_nr)) | 143 | #define S5PC1XX_GPK3(_nr) (S5PC1XX_GPIO_K3_START + (_nr)) |
144 | #define S5PC1XX_GPL0(_nr) (S5PC1XX_GPIO_L0_START + (_nr)) | ||
145 | #define S5PC1XX_GPL1(_nr) (S5PC1XX_GPIO_L1_START + (_nr)) | ||
146 | #define S5PC1XX_GPL2(_nr) (S5PC1XX_GPIO_L2_START + (_nr)) | ||
147 | #define S5PC1XX_GPL3(_nr) (S5PC1XX_GPIO_L3_START + (_nr)) | ||
148 | #define S5PC1XX_GPL4(_nr) (S5PC1XX_GPIO_L4_START + (_nr)) | ||
133 | #define S5PC1XX_MP00(_nr) (S5PC1XX_GPIO_MP00_START + (_nr)) | 149 | #define S5PC1XX_MP00(_nr) (S5PC1XX_GPIO_MP00_START + (_nr)) |
134 | #define S5PC1XX_MP01(_nr) (S5PC1XX_GPIO_MP01_START + (_nr)) | 150 | #define S5PC1XX_MP01(_nr) (S5PC1XX_GPIO_MP01_START + (_nr)) |
135 | #define S5PC1XX_MP02(_nr) (S5PC1XX_GPIO_MP02_START + (_nr)) | 151 | #define S5PC1XX_MP02(_nr) (S5PC1XX_GPIO_MP02_START + (_nr)) |
136 | #define S5PC1XX_MP03(_nr) (S5PC1XX_GPIO_MP03_START + (_nr)) | 152 | #define S5PC1XX_MP03(_nr) (S5PC1XX_GPIO_MP03_START + (_nr)) |
137 | #define S5PC1XX_MP04(_nr) (S5PC1XX_GPIO_MP04_START + (_nr)) | 153 | #define S5PC1XX_MP04(_nr) (S5PC1XX_GPIO_MP04_START + (_nr)) |
154 | #define S5PC1XX_MP05(_nr) (S5PC1XX_GPIO_MP05_START + (_nr)) | ||
138 | 155 | ||
139 | /* the end of the S5PC1XX specific gpios */ | 156 | /* It used the end of the S5PC1XX gpios */ |
140 | #define S5PC1XX_GPIO_END (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1) | ||
141 | #define S3C_GPIO_END S5PC1XX_GPIO_END | 157 | #define S3C_GPIO_END S5PC1XX_GPIO_END |
142 | 158 | ||
143 | /* define the number of gpios we need to the one after the MP04() range */ | 159 | /* define the number of gpios we need to the one after the MP04() range */ |
144 | #define ARCH_NR_GPIOS (S5PC1XX_MP04(S5PC1XX_GPIO_MP04_NR) + 1) | 160 | #define ARCH_NR_GPIOS (S5PC1XX_GPIO_END + 1) |
145 | 161 | ||
146 | #include <asm-generic/gpio.h> | 162 | #include <asm-generic/gpio.h> |