diff options
author | Magnus Damm <damm@igel.co.jp> | 2008-10-08 07:42:01 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-10-19 21:34:08 -0400 |
commit | 91b6f3c5252937f85e56c71215b37024827ae924 (patch) | |
tree | c345ad0d6fb4643b37694cd4fb1f4a3cf71c57e1 | |
parent | 8d7b5b0af7e070b9ae0852541f67aa84da078315 (diff) |
sh: Use sh7722 GPIO on Migo-R board
This patch enables the GPIO code on Migo-R and converts the code from
register based pinmux configuration to GPIO based pin by pin setup.
Fix whitespace damage while at it and add 2 LEDs and export them to
user space.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/boards/Kconfig | 1 | ||||
-rw-r--r-- | arch/sh/boards/mach-migor/lcd_qvga.c | 6 | ||||
-rw-r--r-- | arch/sh/boards/mach-migor/setup.c | 187 |
3 files changed, 125 insertions, 69 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index c6b21e82755e..4e37f5c02158 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig | |||
@@ -162,6 +162,7 @@ config SH_SH7785LCR_29BIT_PHYSMAPS | |||
162 | config SH_MIGOR | 162 | config SH_MIGOR |
163 | bool "Migo-R" | 163 | bool "Migo-R" |
164 | depends on CPU_SUBTYPE_SH7722 | 164 | depends on CPU_SUBTYPE_SH7722 |
165 | select GENERIC_GPIO | ||
165 | help | 166 | help |
166 | Select Migo-R if configuring for the SH7722 Migo-R platform | 167 | Select Migo-R if configuring for the SH7722 Migo-R platform |
167 | by Renesas System Solutions Asia Pte. Ltd. | 168 | by Renesas System Solutions Asia Pte. Ltd. |
diff --git a/arch/sh/boards/mach-migor/lcd_qvga.c b/arch/sh/boards/mach-migor/lcd_qvga.c index 735326c04497..c283cfc2a5c3 100644 --- a/arch/sh/boards/mach-migor/lcd_qvga.c +++ b/arch/sh/boards/mach-migor/lcd_qvga.c | |||
@@ -17,7 +17,9 @@ | |||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/module.h> | 19 | #include <linux/module.h> |
20 | #include <linux/gpio.h> | ||
20 | #include <video/sh_mobile_lcdc.h> | 21 | #include <video/sh_mobile_lcdc.h> |
22 | #include <asm/sh7722.h> | ||
21 | #include <asm/migor.h> | 23 | #include <asm/migor.h> |
22 | 24 | ||
23 | /* LCD Module is a PH240320T according to board schematics. This module | 25 | /* LCD Module is a PH240320T according to board schematics. This module |
@@ -30,9 +32,9 @@ | |||
30 | 32 | ||
31 | static void reset_lcd_module(void) | 33 | static void reset_lcd_module(void) |
32 | { | 34 | { |
33 | ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR); | 35 | gpio_set_value(GPIO_PTH2, 0); |
34 | mdelay(2); | 36 | mdelay(2); |
35 | ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR); | 37 | gpio_set_value(GPIO_PTH2, 1); |
36 | mdelay(1); | 38 | mdelay(1); |
37 | } | 39 | } |
38 | 40 | ||
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index f27475d2fa0c..003ce837734d 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/smc91x.h> | 17 | #include <linux/smc91x.h> |
18 | #include <linux/delay.h> | 18 | #include <linux/delay.h> |
19 | #include <linux/clk.h> | 19 | #include <linux/clk.h> |
20 | #include <linux/gpio.h> | ||
20 | #include <media/soc_camera_platform.h> | 21 | #include <media/soc_camera_platform.h> |
21 | #include <media/sh_mobile_ceu.h> | 22 | #include <media/sh_mobile_ceu.h> |
22 | #include <video/sh_mobile_lcdc.h> | 23 | #include <video/sh_mobile_lcdc.h> |
@@ -25,6 +26,7 @@ | |||
25 | #include <asm/io.h> | 26 | #include <asm/io.h> |
26 | #include <asm/sh_keysc.h> | 27 | #include <asm/sh_keysc.h> |
27 | #include <asm/migor.h> | 28 | #include <asm/migor.h> |
29 | #include <asm/sh7722.h> | ||
28 | 30 | ||
29 | /* Address IRQ Size Bus Description | 31 | /* Address IRQ Size Bus Description |
30 | * 0x00000000 64MB 16 NOR Flash (SP29PL256N) | 32 | * 0x00000000 64MB 16 NOR Flash (SP29PL256N) |
@@ -169,7 +171,7 @@ static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd, | |||
169 | 171 | ||
170 | static int migor_nand_flash_ready(struct mtd_info *mtd) | 172 | static int migor_nand_flash_ready(struct mtd_info *mtd) |
171 | { | 173 | { |
172 | return ctrl_inb(PORT_PADR) & 0x02; /* PTA1 */ | 174 | return gpio_get_value(GPIO_PTA1); /* NAND_RBn */ |
173 | } | 175 | } |
174 | 176 | ||
175 | struct platform_nand_data migor_nand_flash_data = { | 177 | struct platform_nand_data migor_nand_flash_data = { |
@@ -286,22 +288,15 @@ static struct clk *camera_clk; | |||
286 | 288 | ||
287 | static void camera_power_on(void) | 289 | static void camera_power_on(void) |
288 | { | 290 | { |
289 | unsigned char value; | ||
290 | |||
291 | camera_clk = clk_get(NULL, "video_clk"); | 291 | camera_clk = clk_get(NULL, "video_clk"); |
292 | clk_set_rate(camera_clk, 24000000); | 292 | clk_set_rate(camera_clk, 24000000); |
293 | clk_enable(camera_clk); /* start VIO_CKO */ | 293 | clk_enable(camera_clk); /* start VIO_CKO */ |
294 | 294 | ||
295 | /* use VIO_RST to take camera out of reset */ | ||
295 | mdelay(10); | 296 | mdelay(10); |
296 | value = ctrl_inb(PORT_PTDR); | 297 | gpio_set_value(GPIO_PTT3, 0); |
297 | value &= ~0x09; | ||
298 | #ifndef CONFIG_SH_MIGOR_RTA_WVGA | ||
299 | value |= 0x01; | ||
300 | #endif | ||
301 | ctrl_outb(value, PORT_PTDR); | ||
302 | mdelay(10); | 298 | mdelay(10); |
303 | 299 | gpio_set_value(GPIO_PTT3, 1); | |
304 | ctrl_outb(value | 8, PORT_PTDR); | ||
305 | } | 300 | } |
306 | 301 | ||
307 | static void camera_power_off(void) | 302 | static void camera_power_off(void) |
@@ -309,7 +304,7 @@ static void camera_power_off(void) | |||
309 | clk_disable(camera_clk); /* stop VIO_CKO */ | 304 | clk_disable(camera_clk); /* stop VIO_CKO */ |
310 | clk_put(camera_clk); | 305 | clk_put(camera_clk); |
311 | 306 | ||
312 | ctrl_outb(ctrl_inb(PORT_PTDR) & ~0x08, PORT_PTDR); | 307 | gpio_set_value(GPIO_PTT3, 0); |
313 | } | 308 | } |
314 | 309 | ||
315 | #ifdef CONFIG_I2C | 310 | #ifdef CONFIG_I2C |
@@ -458,75 +453,133 @@ static struct i2c_board_info migor_i2c_devices[] = { | |||
458 | 453 | ||
459 | static int __init migor_devices_setup(void) | 454 | static int __init migor_devices_setup(void) |
460 | { | 455 | { |
456 | /* Lit D11 LED */ | ||
457 | gpio_request(GPIO_PTJ7, NULL); | ||
458 | gpio_direction_output(GPIO_PTJ7, 1); | ||
459 | gpio_export(GPIO_PTJ7, 0); | ||
460 | |||
461 | /* Lit D12 LED */ | ||
462 | gpio_request(GPIO_PTJ5, NULL); | ||
463 | gpio_direction_output(GPIO_PTJ5, 1); | ||
464 | gpio_export(GPIO_PTJ5, 0); | ||
465 | |||
466 | /* SMC91C111 */ | ||
467 | gpio_request(GPIO_FN_IRQ0, NULL); | ||
468 | |||
469 | /* KEYSC */ | ||
461 | clk_always_enable("mstp214"); /* KEYSC */ | 470 | clk_always_enable("mstp214"); /* KEYSC */ |
471 | gpio_request(GPIO_FN_KEYOUT0, NULL); | ||
472 | gpio_request(GPIO_FN_KEYOUT1, NULL); | ||
473 | gpio_request(GPIO_FN_KEYOUT2, NULL); | ||
474 | gpio_request(GPIO_FN_KEYOUT3, NULL); | ||
475 | gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); | ||
476 | gpio_request(GPIO_FN_KEYIN1, NULL); | ||
477 | gpio_request(GPIO_FN_KEYIN2, NULL); | ||
478 | gpio_request(GPIO_FN_KEYIN3, NULL); | ||
479 | gpio_request(GPIO_FN_KEYIN4, NULL); | ||
480 | gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); | ||
481 | |||
482 | /* NAND Flash */ | ||
483 | gpio_request(GPIO_FN_CS6A_CE2B, NULL); | ||
484 | ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR); | ||
485 | gpio_request(GPIO_PTA1, NULL); | ||
486 | gpio_direction_input(GPIO_PTA1); | ||
487 | |||
488 | /* Touch Panel */ | ||
489 | gpio_request(GPIO_FN_IRQ6, NULL); | ||
490 | |||
491 | /* LCD Panel */ | ||
462 | clk_always_enable("mstp200"); /* LCDC */ | 492 | clk_always_enable("mstp200"); /* LCDC */ |
493 | #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */ | ||
494 | gpio_request(GPIO_FN_LCDD17, NULL); | ||
495 | gpio_request(GPIO_FN_LCDD16, NULL); | ||
496 | gpio_request(GPIO_FN_LCDD15, NULL); | ||
497 | gpio_request(GPIO_FN_LCDD14, NULL); | ||
498 | gpio_request(GPIO_FN_LCDD13, NULL); | ||
499 | gpio_request(GPIO_FN_LCDD12, NULL); | ||
500 | gpio_request(GPIO_FN_LCDD11, NULL); | ||
501 | gpio_request(GPIO_FN_LCDD10, NULL); | ||
502 | gpio_request(GPIO_FN_LCDD8, NULL); | ||
503 | gpio_request(GPIO_FN_LCDD7, NULL); | ||
504 | gpio_request(GPIO_FN_LCDD6, NULL); | ||
505 | gpio_request(GPIO_FN_LCDD5, NULL); | ||
506 | gpio_request(GPIO_FN_LCDD4, NULL); | ||
507 | gpio_request(GPIO_FN_LCDD3, NULL); | ||
508 | gpio_request(GPIO_FN_LCDD2, NULL); | ||
509 | gpio_request(GPIO_FN_LCDD1, NULL); | ||
510 | gpio_request(GPIO_FN_LCDRS, NULL); | ||
511 | gpio_request(GPIO_FN_LCDCS, NULL); | ||
512 | gpio_request(GPIO_FN_LCDRD, NULL); | ||
513 | gpio_request(GPIO_FN_LCDWR, NULL); | ||
514 | gpio_request(GPIO_PTH2, NULL); /* LCD_DON */ | ||
515 | gpio_direction_output(GPIO_PTH2, 1); | ||
516 | #endif | ||
517 | #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */ | ||
518 | gpio_request(GPIO_FN_LCDD15, NULL); | ||
519 | gpio_request(GPIO_FN_LCDD14, NULL); | ||
520 | gpio_request(GPIO_FN_LCDD13, NULL); | ||
521 | gpio_request(GPIO_FN_LCDD12, NULL); | ||
522 | gpio_request(GPIO_FN_LCDD11, NULL); | ||
523 | gpio_request(GPIO_FN_LCDD10, NULL); | ||
524 | gpio_request(GPIO_FN_LCDD9, NULL); | ||
525 | gpio_request(GPIO_FN_LCDD8, NULL); | ||
526 | gpio_request(GPIO_FN_LCDD7, NULL); | ||
527 | gpio_request(GPIO_FN_LCDD6, NULL); | ||
528 | gpio_request(GPIO_FN_LCDD5, NULL); | ||
529 | gpio_request(GPIO_FN_LCDD4, NULL); | ||
530 | gpio_request(GPIO_FN_LCDD3, NULL); | ||
531 | gpio_request(GPIO_FN_LCDD2, NULL); | ||
532 | gpio_request(GPIO_FN_LCDD1, NULL); | ||
533 | gpio_request(GPIO_FN_LCDD0, NULL); | ||
534 | gpio_request(GPIO_FN_LCDLCLK, NULL); | ||
535 | gpio_request(GPIO_FN_LCDDCK, NULL); | ||
536 | gpio_request(GPIO_FN_LCDVEPWC, NULL); | ||
537 | gpio_request(GPIO_FN_LCDVCPWC, NULL); | ||
538 | gpio_request(GPIO_FN_LCDVSYN, NULL); | ||
539 | gpio_request(GPIO_FN_LCDHSYN, NULL); | ||
540 | gpio_request(GPIO_FN_LCDDISP, NULL); | ||
541 | gpio_request(GPIO_FN_LCDDON, NULL); | ||
542 | #endif | ||
543 | |||
544 | /* CEU */ | ||
463 | clk_always_enable("mstp203"); /* CEU */ | 545 | clk_always_enable("mstp203"); /* CEU */ |
546 | gpio_request(GPIO_FN_VIO_CLK2, NULL); | ||
547 | gpio_request(GPIO_FN_VIO_VD2, NULL); | ||
548 | gpio_request(GPIO_FN_VIO_HD2, NULL); | ||
549 | gpio_request(GPIO_FN_VIO_FLD, NULL); | ||
550 | gpio_request(GPIO_FN_VIO_CKO, NULL); | ||
551 | gpio_request(GPIO_FN_VIO_D15, NULL); | ||
552 | gpio_request(GPIO_FN_VIO_D14, NULL); | ||
553 | gpio_request(GPIO_FN_VIO_D13, NULL); | ||
554 | gpio_request(GPIO_FN_VIO_D12, NULL); | ||
555 | gpio_request(GPIO_FN_VIO_D11, NULL); | ||
556 | gpio_request(GPIO_FN_VIO_D10, NULL); | ||
557 | gpio_request(GPIO_FN_VIO_D9, NULL); | ||
558 | gpio_request(GPIO_FN_VIO_D8, NULL); | ||
559 | |||
560 | gpio_request(GPIO_PTT3, NULL); /* VIO_RST */ | ||
561 | gpio_direction_output(GPIO_PTT3, 0); | ||
562 | gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */ | ||
563 | gpio_direction_output(GPIO_PTT2, 1); | ||
564 | gpio_request(GPIO_PTT0, NULL); /* CAM_EN */ | ||
565 | #ifdef CONFIG_SH_MIGOR_RTA_WVGA | ||
566 | gpio_direction_output(GPIO_PTT0, 0); | ||
567 | #else | ||
568 | gpio_direction_output(GPIO_PTT0, 1); | ||
569 | #endif | ||
570 | ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ | ||
464 | 571 | ||
465 | platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); | 572 | platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); |
466 | 573 | ||
467 | i2c_register_board_info(0, migor_i2c_devices, | 574 | i2c_register_board_info(0, migor_i2c_devices, |
468 | ARRAY_SIZE(migor_i2c_devices)); | 575 | ARRAY_SIZE(migor_i2c_devices)); |
469 | 576 | ||
470 | return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); | 577 | return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); |
471 | } | 578 | } |
472 | __initcall(migor_devices_setup); | 579 | __initcall(migor_devices_setup); |
473 | 580 | ||
474 | static void __init migor_setup(char **cmdline_p) | 581 | static void __init migor_setup(char **cmdline_p) |
475 | { | 582 | { |
476 | /* SMC91C111 - Enable IRQ0 */ | ||
477 | ctrl_outw(ctrl_inw(PORT_PJCR) & ~0x0003, PORT_PJCR); | ||
478 | |||
479 | /* KEYSC */ | ||
480 | ctrl_outw(ctrl_inw(PORT_PYCR) & ~0x0fff, PORT_PYCR); | ||
481 | ctrl_outw(ctrl_inw(PORT_PZCR) & ~0x0ff0, PORT_PZCR); | ||
482 | ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA); | ||
483 | ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); | ||
484 | ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); | ||
485 | |||
486 | /* NAND Flash */ | ||
487 | ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR); | ||
488 | ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200, | ||
489 | BSC_CS6ABCR); | ||
490 | |||
491 | /* Touch Panel - Enable IRQ6 */ | ||
492 | ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR); | ||
493 | ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA); | ||
494 | ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC); | ||
495 | |||
496 | #ifdef CONFIG_SH_MIGOR_RTA_WVGA | ||
497 | /* LCDC - WVGA - Enable RGB Interface signals */ | ||
498 | ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR); | ||
499 | ctrl_outw(0x0000, PORT_PHCR); | ||
500 | ctrl_outw(0x0000, PORT_PLCR); | ||
501 | ctrl_outw(0x0000, PORT_PMCR); | ||
502 | ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR); | ||
503 | ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD); | ||
504 | ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB); | ||
505 | ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA); | ||
506 | #endif | ||
507 | #ifdef CONFIG_SH_MIGOR_QVGA | ||
508 | /* LCDC - QVGA - Enable SYS Interface signals */ | ||
509 | ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR); | ||
510 | ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR); | ||
511 | ctrl_outw(0x0000, PORT_PLCR); | ||
512 | ctrl_outw(0x0000, PORT_PMCR); | ||
513 | ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR); | ||
514 | ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD); | ||
515 | ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB); | ||
516 | ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA); | ||
517 | #endif | ||
518 | |||
519 | /* CEU */ | ||
520 | ctrl_outw((ctrl_inw(PORT_PTCR) & ~0x03c3) | 0x0051, PORT_PTCR); | ||
521 | ctrl_outw(ctrl_inw(PORT_PUCR) & ~0x03ff, PORT_PUCR); | ||
522 | ctrl_outw(ctrl_inw(PORT_PVCR) & ~0x03ff, PORT_PVCR); | ||
523 | ctrl_outw(ctrl_inw(PORT_PWCR) & ~0x3c00, PORT_PWCR); | ||
524 | ctrl_outw(ctrl_inw(PORT_PSELC) | 0x0001, PORT_PSELC); | ||
525 | ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x2000, PORT_PSELD); | ||
526 | ctrl_outw(ctrl_inw(PORT_PSELE) | 0x000f, PORT_PSELE); | ||
527 | ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2200, PORT_MSELCRB); | ||
528 | ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x0a00, PORT_HIZCRA); | ||
529 | ctrl_outw(ctrl_inw(PORT_HIZCRB) & ~0x0003, PORT_HIZCRB); | ||
530 | } | 583 | } |
531 | 584 | ||
532 | static struct sh_machine_vector mv_migor __initmv = { | 585 | static struct sh_machine_vector mv_migor __initmv = { |