diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-02-14 08:24:10 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-02-14 08:24:10 -0500 |
| commit | 9132f1b453924e7595ce2dc1853704b2a31f42de (patch) | |
| tree | e52893390e79bf661b92887ec5267df0488e754c | |
| parent | d2f8d7ee1a9b4650b4e43325b321801264f7c37a (diff) | |
[ARM] omap: fix omap2_divisor_to_clksel() error return value
The error checks for omap2_divisor_to_clksel() and comment disagree with
the actual value returned on error. Fix this to return the correct error
value.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mach-omap2/clock.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index ad721e0cbf7a..2899cba2aaa0 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
| @@ -565,7 +565,7 @@ u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val) | |||
| 565 | * | 565 | * |
| 566 | * Given a struct clk of a rate-selectable clksel clock, and a clock divisor, | 566 | * Given a struct clk of a rate-selectable clksel clock, and a clock divisor, |
| 567 | * find the corresponding register field value. The return register value is | 567 | * find the corresponding register field value. The return register value is |
| 568 | * the value before left-shifting. Returns 0xffffffff on error | 568 | * the value before left-shifting. Returns ~0 on error |
| 569 | */ | 569 | */ |
| 570 | u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) | 570 | u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) |
| 571 | { | 571 | { |
| @@ -577,7 +577,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) | |||
| 577 | 577 | ||
| 578 | clks = omap2_get_clksel_by_parent(clk, clk->parent); | 578 | clks = omap2_get_clksel_by_parent(clk, clk->parent); |
| 579 | if (clks == NULL) | 579 | if (clks == NULL) |
| 580 | return 0; | 580 | return ~0; |
| 581 | 581 | ||
| 582 | for (clkr = clks->rates; clkr->div; clkr++) { | 582 | for (clkr = clks->rates; clkr->div; clkr++) { |
| 583 | if ((clkr->flags & cpu_mask) && (clkr->div == div)) | 583 | if ((clkr->flags & cpu_mask) && (clkr->div == div)) |
| @@ -588,7 +588,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) | |||
| 588 | printk(KERN_ERR "clock: Could not find divisor %d for " | 588 | printk(KERN_ERR "clock: Could not find divisor %d for " |
| 589 | "clock %s parent %s\n", div, clk->name, | 589 | "clock %s parent %s\n", div, clk->name, |
| 590 | clk->parent->name); | 590 | clk->parent->name); |
| 591 | return 0; | 591 | return ~0; |
| 592 | } | 592 | } |
| 593 | 593 | ||
| 594 | return clkr->val; | 594 | return clkr->val; |
