diff options
author | Dave Airlie <airlied@redhat.com> | 2014-04-17 22:55:22 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2014-04-17 22:55:22 -0400 |
commit | 90e48970c206a2dd7810a5d3dcf07effab956919 (patch) | |
tree | 3c06e21cfd882b6a647809c6e7d37725ac5ab60e | |
parent | 95c7d351e1ccc2c381f0a60eaca9dd962d2aff6d (diff) | |
parent | bcddee29b0b87af3aeda953840f97b356b24dc5e (diff) |
Merge branch 'drm-fixes-3.15' of git://people.freedesktop.org/~deathsimple/linux into drm-next
1. Fixing PLL regressions
2. A couple of memory reclocking and DPM fixes
3. Small cleanups
* 'drm-fixes-3.15' of git://people.freedesktop.org/~deathsimple/linux:
drm/radeon/ci: make sure mc ucode is loaded before checking the size
drm/radeon/si: make sure mc ucode is loaded before checking the size
drm/radeon: improve PLL params if we don't match exactly v2
drm/radeon: memory leak on bo reservation failure. v2
drm/radeon: fix VCE fence command
drm/radeon: re-enable mclk dpm on R7 260X asics
drm/radeon: add support for newer mc ucode on CI (v2)
drm/radeon: add support for newer mc ucode on SI (v2)
drm/radeon: apply more strict limits for PLL params v2
drm/radeon: update CI DPM powertune settings
drm/radeon: fix runpm handling on APUs (v4)
drm/radeon: disable mclk dpm on R7 260X
-rw-r--r-- | drivers/gpu/drm/radeon/ci_dpm.c | 33 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/cik.c | 28 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atpx_handler.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.c | 24 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_family.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_kms.c | 23 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ucode.h | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_vce.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 37 |
12 files changed, 115 insertions, 78 deletions
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index cad89a977527..10dae4106c08 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c | |||
@@ -21,8 +21,10 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include <linux/firmware.h> | ||
24 | #include "drmP.h" | 25 | #include "drmP.h" |
25 | #include "radeon.h" | 26 | #include "radeon.h" |
27 | #include "radeon_ucode.h" | ||
26 | #include "cikd.h" | 28 | #include "cikd.h" |
27 | #include "r600_dpm.h" | 29 | #include "r600_dpm.h" |
28 | #include "ci_dpm.h" | 30 | #include "ci_dpm.h" |
@@ -202,24 +204,29 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev) | |||
202 | struct ci_power_info *pi = ci_get_pi(rdev); | 204 | struct ci_power_info *pi = ci_get_pi(rdev); |
203 | 205 | ||
204 | switch (rdev->pdev->device) { | 206 | switch (rdev->pdev->device) { |
207 | case 0x6649: | ||
205 | case 0x6650: | 208 | case 0x6650: |
209 | case 0x6651: | ||
206 | case 0x6658: | 210 | case 0x6658: |
207 | case 0x665C: | 211 | case 0x665C: |
212 | case 0x665D: | ||
208 | default: | 213 | default: |
209 | pi->powertune_defaults = &defaults_bonaire_xt; | 214 | pi->powertune_defaults = &defaults_bonaire_xt; |
210 | break; | 215 | break; |
211 | case 0x6651: | ||
212 | case 0x665D: | ||
213 | pi->powertune_defaults = &defaults_bonaire_pro; | ||
214 | break; | ||
215 | case 0x6640: | 216 | case 0x6640: |
216 | pi->powertune_defaults = &defaults_saturn_xt; | ||
217 | break; | ||
218 | case 0x6641: | 217 | case 0x6641: |
219 | pi->powertune_defaults = &defaults_saturn_pro; | 218 | case 0x6646: |
219 | case 0x6647: | ||
220 | pi->powertune_defaults = &defaults_saturn_xt; | ||
220 | break; | 221 | break; |
221 | case 0x67B8: | 222 | case 0x67B8: |
222 | case 0x67B0: | 223 | case 0x67B0: |
224 | pi->powertune_defaults = &defaults_hawaii_xt; | ||
225 | break; | ||
226 | case 0x67BA: | ||
227 | case 0x67B1: | ||
228 | pi->powertune_defaults = &defaults_hawaii_pro; | ||
229 | break; | ||
223 | case 0x67A0: | 230 | case 0x67A0: |
224 | case 0x67A1: | 231 | case 0x67A1: |
225 | case 0x67A2: | 232 | case 0x67A2: |
@@ -228,11 +235,7 @@ static void ci_initialize_powertune_defaults(struct radeon_device *rdev) | |||
228 | case 0x67AA: | 235 | case 0x67AA: |
229 | case 0x67B9: | 236 | case 0x67B9: |
230 | case 0x67BE: | 237 | case 0x67BE: |
231 | pi->powertune_defaults = &defaults_hawaii_xt; | 238 | pi->powertune_defaults = &defaults_bonaire_xt; |
232 | break; | ||
233 | case 0x67BA: | ||
234 | case 0x67B1: | ||
235 | pi->powertune_defaults = &defaults_hawaii_pro; | ||
236 | break; | 239 | break; |
237 | } | 240 | } |
238 | 241 | ||
@@ -5146,6 +5149,12 @@ int ci_dpm_init(struct radeon_device *rdev) | |||
5146 | pi->mclk_dpm_key_disabled = 0; | 5149 | pi->mclk_dpm_key_disabled = 0; |
5147 | pi->pcie_dpm_key_disabled = 0; | 5150 | pi->pcie_dpm_key_disabled = 0; |
5148 | 5151 | ||
5152 | /* mclk dpm is unstable on some R7 260X cards with the old mc ucode */ | ||
5153 | if ((rdev->pdev->device == 0x6658) && | ||
5154 | (rdev->mc_fw->size == (BONAIRE_MC_UCODE_SIZE * 4))) { | ||
5155 | pi->mclk_dpm_key_disabled = 1; | ||
5156 | } | ||
5157 | |||
5149 | pi->caps_sclk_ds = true; | 5158 | pi->caps_sclk_ds = true; |
5150 | 5159 | ||
5151 | pi->mclk_strobe_mode_threshold = 40000; | 5160 | pi->mclk_strobe_mode_threshold = 40000; |
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 745143c2358f..199eb194716f 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -38,6 +38,7 @@ MODULE_FIRMWARE("radeon/BONAIRE_me.bin"); | |||
38 | MODULE_FIRMWARE("radeon/BONAIRE_ce.bin"); | 38 | MODULE_FIRMWARE("radeon/BONAIRE_ce.bin"); |
39 | MODULE_FIRMWARE("radeon/BONAIRE_mec.bin"); | 39 | MODULE_FIRMWARE("radeon/BONAIRE_mec.bin"); |
40 | MODULE_FIRMWARE("radeon/BONAIRE_mc.bin"); | 40 | MODULE_FIRMWARE("radeon/BONAIRE_mc.bin"); |
41 | MODULE_FIRMWARE("radeon/BONAIRE_mc2.bin"); | ||
41 | MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin"); | 42 | MODULE_FIRMWARE("radeon/BONAIRE_rlc.bin"); |
42 | MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin"); | 43 | MODULE_FIRMWARE("radeon/BONAIRE_sdma.bin"); |
43 | MODULE_FIRMWARE("radeon/BONAIRE_smc.bin"); | 44 | MODULE_FIRMWARE("radeon/BONAIRE_smc.bin"); |
@@ -46,6 +47,7 @@ MODULE_FIRMWARE("radeon/HAWAII_me.bin"); | |||
46 | MODULE_FIRMWARE("radeon/HAWAII_ce.bin"); | 47 | MODULE_FIRMWARE("radeon/HAWAII_ce.bin"); |
47 | MODULE_FIRMWARE("radeon/HAWAII_mec.bin"); | 48 | MODULE_FIRMWARE("radeon/HAWAII_mec.bin"); |
48 | MODULE_FIRMWARE("radeon/HAWAII_mc.bin"); | 49 | MODULE_FIRMWARE("radeon/HAWAII_mc.bin"); |
50 | MODULE_FIRMWARE("radeon/HAWAII_mc2.bin"); | ||
49 | MODULE_FIRMWARE("radeon/HAWAII_rlc.bin"); | 51 | MODULE_FIRMWARE("radeon/HAWAII_rlc.bin"); |
50 | MODULE_FIRMWARE("radeon/HAWAII_sdma.bin"); | 52 | MODULE_FIRMWARE("radeon/HAWAII_sdma.bin"); |
51 | MODULE_FIRMWARE("radeon/HAWAII_smc.bin"); | 53 | MODULE_FIRMWARE("radeon/HAWAII_smc.bin"); |
@@ -1703,20 +1705,20 @@ int ci_mc_load_microcode(struct radeon_device *rdev) | |||
1703 | const __be32 *fw_data; | 1705 | const __be32 *fw_data; |
1704 | u32 running, blackout = 0; | 1706 | u32 running, blackout = 0; |
1705 | u32 *io_mc_regs; | 1707 | u32 *io_mc_regs; |
1706 | int i, ucode_size, regs_size; | 1708 | int i, regs_size, ucode_size; |
1707 | 1709 | ||
1708 | if (!rdev->mc_fw) | 1710 | if (!rdev->mc_fw) |
1709 | return -EINVAL; | 1711 | return -EINVAL; |
1710 | 1712 | ||
1713 | ucode_size = rdev->mc_fw->size / 4; | ||
1714 | |||
1711 | switch (rdev->family) { | 1715 | switch (rdev->family) { |
1712 | case CHIP_BONAIRE: | 1716 | case CHIP_BONAIRE: |
1713 | io_mc_regs = (u32 *)&bonaire_io_mc_regs; | 1717 | io_mc_regs = (u32 *)&bonaire_io_mc_regs; |
1714 | ucode_size = CIK_MC_UCODE_SIZE; | ||
1715 | regs_size = BONAIRE_IO_MC_REGS_SIZE; | 1718 | regs_size = BONAIRE_IO_MC_REGS_SIZE; |
1716 | break; | 1719 | break; |
1717 | case CHIP_HAWAII: | 1720 | case CHIP_HAWAII: |
1718 | io_mc_regs = (u32 *)&hawaii_io_mc_regs; | 1721 | io_mc_regs = (u32 *)&hawaii_io_mc_regs; |
1719 | ucode_size = HAWAII_MC_UCODE_SIZE; | ||
1720 | regs_size = HAWAII_IO_MC_REGS_SIZE; | 1722 | regs_size = HAWAII_IO_MC_REGS_SIZE; |
1721 | break; | 1723 | break; |
1722 | default: | 1724 | default: |
@@ -1783,7 +1785,7 @@ static int cik_init_microcode(struct radeon_device *rdev) | |||
1783 | const char *chip_name; | 1785 | const char *chip_name; |
1784 | size_t pfp_req_size, me_req_size, ce_req_size, | 1786 | size_t pfp_req_size, me_req_size, ce_req_size, |
1785 | mec_req_size, rlc_req_size, mc_req_size = 0, | 1787 | mec_req_size, rlc_req_size, mc_req_size = 0, |
1786 | sdma_req_size, smc_req_size = 0; | 1788 | sdma_req_size, smc_req_size = 0, mc2_req_size = 0; |
1787 | char fw_name[30]; | 1789 | char fw_name[30]; |
1788 | int err; | 1790 | int err; |
1789 | 1791 | ||
@@ -1797,7 +1799,8 @@ static int cik_init_microcode(struct radeon_device *rdev) | |||
1797 | ce_req_size = CIK_CE_UCODE_SIZE * 4; | 1799 | ce_req_size = CIK_CE_UCODE_SIZE * 4; |
1798 | mec_req_size = CIK_MEC_UCODE_SIZE * 4; | 1800 | mec_req_size = CIK_MEC_UCODE_SIZE * 4; |
1799 | rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4; | 1801 | rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4; |
1800 | mc_req_size = CIK_MC_UCODE_SIZE * 4; | 1802 | mc_req_size = BONAIRE_MC_UCODE_SIZE * 4; |
1803 | mc2_req_size = BONAIRE_MC2_UCODE_SIZE * 4; | ||
1801 | sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; | 1804 | sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; |
1802 | smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4); | 1805 | smc_req_size = ALIGN(BONAIRE_SMC_UCODE_SIZE, 4); |
1803 | break; | 1806 | break; |
@@ -1809,6 +1812,7 @@ static int cik_init_microcode(struct radeon_device *rdev) | |||
1809 | mec_req_size = CIK_MEC_UCODE_SIZE * 4; | 1812 | mec_req_size = CIK_MEC_UCODE_SIZE * 4; |
1810 | rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4; | 1813 | rlc_req_size = BONAIRE_RLC_UCODE_SIZE * 4; |
1811 | mc_req_size = HAWAII_MC_UCODE_SIZE * 4; | 1814 | mc_req_size = HAWAII_MC_UCODE_SIZE * 4; |
1815 | mc2_req_size = HAWAII_MC2_UCODE_SIZE * 4; | ||
1812 | sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; | 1816 | sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; |
1813 | smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4); | 1817 | smc_req_size = ALIGN(HAWAII_SMC_UCODE_SIZE, 4); |
1814 | break; | 1818 | break; |
@@ -1904,16 +1908,22 @@ static int cik_init_microcode(struct radeon_device *rdev) | |||
1904 | 1908 | ||
1905 | /* No SMC, MC ucode on APUs */ | 1909 | /* No SMC, MC ucode on APUs */ |
1906 | if (!(rdev->flags & RADEON_IS_IGP)) { | 1910 | if (!(rdev->flags & RADEON_IS_IGP)) { |
1907 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name); | 1911 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name); |
1908 | err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); | 1912 | err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); |
1909 | if (err) | 1913 | if (err) { |
1910 | goto out; | 1914 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name); |
1911 | if (rdev->mc_fw->size != mc_req_size) { | 1915 | err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); |
1916 | if (err) | ||
1917 | goto out; | ||
1918 | } | ||
1919 | if ((rdev->mc_fw->size != mc_req_size) && | ||
1920 | (rdev->mc_fw->size != mc2_req_size)){ | ||
1912 | printk(KERN_ERR | 1921 | printk(KERN_ERR |
1913 | "cik_mc: Bogus length %zu in firmware \"%s\"\n", | 1922 | "cik_mc: Bogus length %zu in firmware \"%s\"\n", |
1914 | rdev->mc_fw->size, fw_name); | 1923 | rdev->mc_fw->size, fw_name); |
1915 | err = -EINVAL; | 1924 | err = -EINVAL; |
1916 | } | 1925 | } |
1926 | DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size); | ||
1917 | 1927 | ||
1918 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); | 1928 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); |
1919 | err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); | 1929 | err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index f21db7a0b34d..7014bdd688ce 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -2321,6 +2321,7 @@ struct radeon_device { | |||
2321 | bool have_disp_power_ref; | 2321 | bool have_disp_power_ref; |
2322 | }; | 2322 | }; |
2323 | 2323 | ||
2324 | bool radeon_is_px(struct drm_device *dev); | ||
2324 | int radeon_device_init(struct radeon_device *rdev, | 2325 | int radeon_device_init(struct radeon_device *rdev, |
2325 | struct drm_device *ddev, | 2326 | struct drm_device *ddev, |
2326 | struct pci_dev *pdev, | 2327 | struct pci_dev *pdev, |
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c index fa9a9c02751e..dedea72f48c4 100644 --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c | |||
@@ -59,7 +59,7 @@ struct atpx_mux { | |||
59 | u16 mux; | 59 | u16 mux; |
60 | } __packed; | 60 | } __packed; |
61 | 61 | ||
62 | bool radeon_is_px(void) { | 62 | bool radeon_has_atpx(void) { |
63 | return radeon_atpx_priv.atpx_detected; | 63 | return radeon_atpx_priv.atpx_detected; |
64 | } | 64 | } |
65 | 65 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 835516d2d257..511fe26198e4 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -102,11 +102,14 @@ static const char radeon_family_name[][16] = { | |||
102 | "LAST", | 102 | "LAST", |
103 | }; | 103 | }; |
104 | 104 | ||
105 | #if defined(CONFIG_VGA_SWITCHEROO) | 105 | bool radeon_is_px(struct drm_device *dev) |
106 | bool radeon_is_px(void); | 106 | { |
107 | #else | 107 | struct radeon_device *rdev = dev->dev_private; |
108 | static inline bool radeon_is_px(void) { return false; } | 108 | |
109 | #endif | 109 | if (rdev->flags & RADEON_IS_PX) |
110 | return true; | ||
111 | return false; | ||
112 | } | ||
110 | 113 | ||
111 | /** | 114 | /** |
112 | * radeon_program_register_sequence - program an array of registers. | 115 | * radeon_program_register_sequence - program an array of registers. |
@@ -1082,7 +1085,7 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero | |||
1082 | { | 1085 | { |
1083 | struct drm_device *dev = pci_get_drvdata(pdev); | 1086 | struct drm_device *dev = pci_get_drvdata(pdev); |
1084 | 1087 | ||
1085 | if (radeon_is_px() && state == VGA_SWITCHEROO_OFF) | 1088 | if (radeon_is_px(dev) && state == VGA_SWITCHEROO_OFF) |
1086 | return; | 1089 | return; |
1087 | 1090 | ||
1088 | if (state == VGA_SWITCHEROO_ON) { | 1091 | if (state == VGA_SWITCHEROO_ON) { |
@@ -1301,9 +1304,7 @@ int radeon_device_init(struct radeon_device *rdev, | |||
1301 | * ignore it */ | 1304 | * ignore it */ |
1302 | vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); | 1305 | vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); |
1303 | 1306 | ||
1304 | if (radeon_runtime_pm == 1) | 1307 | if (rdev->flags & RADEON_IS_PX) |
1305 | runtime = true; | ||
1306 | if ((radeon_runtime_pm == -1) && radeon_is_px()) | ||
1307 | runtime = true; | 1308 | runtime = true; |
1308 | vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime); | 1309 | vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime); |
1309 | if (runtime) | 1310 | if (runtime) |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 386cfa4c194d..063d4255137f 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -865,7 +865,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, | |||
865 | unsigned post_div_min, post_div_max, post_div; | 865 | unsigned post_div_min, post_div_max, post_div; |
866 | unsigned ref_div_min, ref_div_max, ref_div; | 866 | unsigned ref_div_min, ref_div_max, ref_div; |
867 | unsigned post_div_best, diff_best; | 867 | unsigned post_div_best, diff_best; |
868 | unsigned nom, den, tmp; | 868 | unsigned nom, den; |
869 | 869 | ||
870 | /* determine allowed feedback divider range */ | 870 | /* determine allowed feedback divider range */ |
871 | fb_div_min = pll->min_feedback_div; | 871 | fb_div_min = pll->min_feedback_div; |
@@ -937,23 +937,27 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, | |||
937 | } | 937 | } |
938 | post_div = post_div_best; | 938 | post_div = post_div_best; |
939 | 939 | ||
940 | /* limit reference * post divider to a maximum */ | ||
941 | ref_div_max = min(210 / post_div, ref_div_max); | ||
942 | |||
940 | /* get matching reference and feedback divider */ | 943 | /* get matching reference and feedback divider */ |
941 | ref_div = max(den / post_div, 1u); | 944 | ref_div = max(DIV_ROUND_CLOSEST(den, post_div), 1u); |
942 | fb_div = nom; | 945 | fb_div = DIV_ROUND_CLOSEST(nom * ref_div * post_div, den); |
943 | 946 | ||
944 | /* we're almost done, but reference and feedback | 947 | /* we're almost done, but reference and feedback |
945 | divider might be to large now */ | 948 | divider might be to large now */ |
946 | 949 | ||
947 | tmp = ref_div; | 950 | nom = fb_div; |
951 | den = ref_div; | ||
948 | 952 | ||
949 | if (fb_div > fb_div_max) { | 953 | if (fb_div > fb_div_max) { |
950 | ref_div = ref_div * fb_div_max / fb_div; | 954 | ref_div = DIV_ROUND_CLOSEST(den * fb_div_max, nom); |
951 | fb_div = fb_div_max; | 955 | fb_div = fb_div_max; |
952 | } | 956 | } |
953 | 957 | ||
954 | if (ref_div > ref_div_max) { | 958 | if (ref_div > ref_div_max) { |
955 | ref_div = ref_div_max; | 959 | ref_div = ref_div_max; |
956 | fb_div = nom * ref_div_max / tmp; | 960 | fb_div = DIV_ROUND_CLOSEST(nom * ref_div_max, den); |
957 | } | 961 | } |
958 | 962 | ||
959 | /* reduce the numbers to a simpler ratio once more */ | 963 | /* reduce the numbers to a simpler ratio once more */ |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index d0eba48dd74e..25127ba44ed9 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -115,6 +115,7 @@ extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, | |||
115 | unsigned int flags, | 115 | unsigned int flags, |
116 | int *vpos, int *hpos, ktime_t *stime, | 116 | int *vpos, int *hpos, ktime_t *stime, |
117 | ktime_t *etime); | 117 | ktime_t *etime); |
118 | extern bool radeon_is_px(struct drm_device *dev); | ||
118 | extern const struct drm_ioctl_desc radeon_ioctls_kms[]; | 119 | extern const struct drm_ioctl_desc radeon_ioctls_kms[]; |
119 | extern int radeon_max_kms_ioctl; | 120 | extern int radeon_max_kms_ioctl; |
120 | int radeon_mmap(struct file *filp, struct vm_area_struct *vma); | 121 | int radeon_mmap(struct file *filp, struct vm_area_struct *vma); |
@@ -144,11 +145,9 @@ void radeon_debugfs_cleanup(struct drm_minor *minor); | |||
144 | #if defined(CONFIG_VGA_SWITCHEROO) | 145 | #if defined(CONFIG_VGA_SWITCHEROO) |
145 | void radeon_register_atpx_handler(void); | 146 | void radeon_register_atpx_handler(void); |
146 | void radeon_unregister_atpx_handler(void); | 147 | void radeon_unregister_atpx_handler(void); |
147 | bool radeon_is_px(void); | ||
148 | #else | 148 | #else |
149 | static inline void radeon_register_atpx_handler(void) {} | 149 | static inline void radeon_register_atpx_handler(void) {} |
150 | static inline void radeon_unregister_atpx_handler(void) {} | 150 | static inline void radeon_unregister_atpx_handler(void) {} |
151 | static inline bool radeon_is_px(void) { return false; } | ||
152 | #endif | 151 | #endif |
153 | 152 | ||
154 | int radeon_no_wb; | 153 | int radeon_no_wb; |
@@ -405,12 +404,7 @@ static int radeon_pmops_runtime_suspend(struct device *dev) | |||
405 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | 404 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
406 | int ret; | 405 | int ret; |
407 | 406 | ||
408 | if (radeon_runtime_pm == 0) { | 407 | if (!radeon_is_px(drm_dev)) { |
409 | pm_runtime_forbid(dev); | ||
410 | return -EBUSY; | ||
411 | } | ||
412 | |||
413 | if (radeon_runtime_pm == -1 && !radeon_is_px()) { | ||
414 | pm_runtime_forbid(dev); | 408 | pm_runtime_forbid(dev); |
415 | return -EBUSY; | 409 | return -EBUSY; |
416 | } | 410 | } |
@@ -434,10 +428,7 @@ static int radeon_pmops_runtime_resume(struct device *dev) | |||
434 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | 428 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
435 | int ret; | 429 | int ret; |
436 | 430 | ||
437 | if (radeon_runtime_pm == 0) | 431 | if (!radeon_is_px(drm_dev)) |
438 | return -EINVAL; | ||
439 | |||
440 | if (radeon_runtime_pm == -1 && !radeon_is_px()) | ||
441 | return -EINVAL; | 432 | return -EINVAL; |
442 | 433 | ||
443 | drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; | 434 | drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; |
@@ -462,14 +453,7 @@ static int radeon_pmops_runtime_idle(struct device *dev) | |||
462 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | 453 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
463 | struct drm_crtc *crtc; | 454 | struct drm_crtc *crtc; |
464 | 455 | ||
465 | if (radeon_runtime_pm == 0) { | 456 | if (!radeon_is_px(drm_dev)) { |
466 | pm_runtime_forbid(dev); | ||
467 | return -EBUSY; | ||
468 | } | ||
469 | |||
470 | /* are we PX enabled? */ | ||
471 | if (radeon_runtime_pm == -1 && !radeon_is_px()) { | ||
472 | DRM_DEBUG_DRIVER("failing to power off - not px\n"); | ||
473 | pm_runtime_forbid(dev); | 457 | pm_runtime_forbid(dev); |
474 | return -EBUSY; | 458 | return -EBUSY; |
475 | } | 459 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_family.h b/drivers/gpu/drm/radeon/radeon_family.h index 614ad549297f..9da5da4ffd17 100644 --- a/drivers/gpu/drm/radeon/radeon_family.h +++ b/drivers/gpu/drm/radeon/radeon_family.h | |||
@@ -115,6 +115,7 @@ enum radeon_chip_flags { | |||
115 | RADEON_NEW_MEMMAP = 0x00400000UL, | 115 | RADEON_NEW_MEMMAP = 0x00400000UL, |
116 | RADEON_IS_PCI = 0x00800000UL, | 116 | RADEON_IS_PCI = 0x00800000UL, |
117 | RADEON_IS_IGPGART = 0x01000000UL, | 117 | RADEON_IS_IGPGART = 0x01000000UL, |
118 | RADEON_IS_PX = 0x02000000UL, | ||
118 | }; | 119 | }; |
119 | 120 | ||
120 | #endif | 121 | #endif |
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 3e49342a20e6..fb3d13f693dd 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
@@ -35,9 +35,9 @@ | |||
35 | #include <linux/pm_runtime.h> | 35 | #include <linux/pm_runtime.h> |
36 | 36 | ||
37 | #if defined(CONFIG_VGA_SWITCHEROO) | 37 | #if defined(CONFIG_VGA_SWITCHEROO) |
38 | bool radeon_is_px(void); | 38 | bool radeon_has_atpx(void); |
39 | #else | 39 | #else |
40 | static inline bool radeon_is_px(void) { return false; } | 40 | static inline bool radeon_has_atpx(void) { return false; } |
41 | #endif | 41 | #endif |
42 | 42 | ||
43 | /** | 43 | /** |
@@ -107,6 +107,13 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) | |||
107 | flags |= RADEON_IS_PCI; | 107 | flags |= RADEON_IS_PCI; |
108 | } | 108 | } |
109 | 109 | ||
110 | if (radeon_runtime_pm == 1) | ||
111 | flags |= RADEON_IS_PX; | ||
112 | else if ((radeon_runtime_pm == -1) && | ||
113 | radeon_has_atpx() && | ||
114 | ((flags & RADEON_IS_IGP) == 0)) | ||
115 | flags |= RADEON_IS_PX; | ||
116 | |||
110 | /* radeon_device_init should report only fatal error | 117 | /* radeon_device_init should report only fatal error |
111 | * like memory allocation failure or iomapping failure, | 118 | * like memory allocation failure or iomapping failure, |
112 | * or memory manager initialization failure, it must | 119 | * or memory manager initialization failure, it must |
@@ -137,8 +144,7 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) | |||
137 | "Error during ACPI methods call\n"); | 144 | "Error during ACPI methods call\n"); |
138 | } | 145 | } |
139 | 146 | ||
140 | if ((radeon_runtime_pm == 1) || | 147 | if (radeon_is_px(dev)) { |
141 | ((radeon_runtime_pm == -1) && radeon_is_px())) { | ||
142 | pm_runtime_use_autosuspend(dev->dev); | 148 | pm_runtime_use_autosuspend(dev->dev); |
143 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | 149 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); |
144 | pm_runtime_set_active(dev->dev); | 150 | pm_runtime_set_active(dev->dev); |
@@ -568,12 +574,17 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv) | |||
568 | } | 574 | } |
569 | 575 | ||
570 | r = radeon_vm_init(rdev, &fpriv->vm); | 576 | r = radeon_vm_init(rdev, &fpriv->vm); |
571 | if (r) | 577 | if (r) { |
578 | kfree(fpriv); | ||
572 | return r; | 579 | return r; |
580 | } | ||
573 | 581 | ||
574 | r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); | 582 | r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); |
575 | if (r) | 583 | if (r) { |
584 | radeon_vm_fini(rdev, &fpriv->vm); | ||
585 | kfree(fpriv); | ||
576 | return r; | 586 | return r; |
587 | } | ||
577 | 588 | ||
578 | /* map the ib pool buffer read only into | 589 | /* map the ib pool buffer read only into |
579 | * virtual address space */ | 590 | * virtual address space */ |
diff --git a/drivers/gpu/drm/radeon/radeon_ucode.h b/drivers/gpu/drm/radeon/radeon_ucode.h index a77cd274dfc3..58d12938c0b8 100644 --- a/drivers/gpu/drm/radeon/radeon_ucode.h +++ b/drivers/gpu/drm/radeon/radeon_ucode.h | |||
@@ -57,9 +57,14 @@ | |||
57 | #define BTC_MC_UCODE_SIZE 6024 | 57 | #define BTC_MC_UCODE_SIZE 6024 |
58 | #define CAYMAN_MC_UCODE_SIZE 6037 | 58 | #define CAYMAN_MC_UCODE_SIZE 6037 |
59 | #define SI_MC_UCODE_SIZE 7769 | 59 | #define SI_MC_UCODE_SIZE 7769 |
60 | #define TAHITI_MC_UCODE_SIZE 7808 | ||
61 | #define PITCAIRN_MC_UCODE_SIZE 7775 | ||
62 | #define VERDE_MC_UCODE_SIZE 7875 | ||
60 | #define OLAND_MC_UCODE_SIZE 7863 | 63 | #define OLAND_MC_UCODE_SIZE 7863 |
61 | #define CIK_MC_UCODE_SIZE 7866 | 64 | #define BONAIRE_MC_UCODE_SIZE 7866 |
65 | #define BONAIRE_MC2_UCODE_SIZE 7948 | ||
62 | #define HAWAII_MC_UCODE_SIZE 7933 | 66 | #define HAWAII_MC_UCODE_SIZE 7933 |
67 | #define HAWAII_MC2_UCODE_SIZE 8091 | ||
63 | 68 | ||
64 | /* SDMA */ | 69 | /* SDMA */ |
65 | #define CIK_SDMA_UCODE_SIZE 1050 | 70 | #define CIK_SDMA_UCODE_SIZE 1050 |
diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c index 76e9904bc537..ced53dd03e7c 100644 --- a/drivers/gpu/drm/radeon/radeon_vce.c +++ b/drivers/gpu/drm/radeon/radeon_vce.c | |||
@@ -613,7 +613,7 @@ void radeon_vce_fence_emit(struct radeon_device *rdev, | |||
613 | struct radeon_fence *fence) | 613 | struct radeon_fence *fence) |
614 | { | 614 | { |
615 | struct radeon_ring *ring = &rdev->ring[fence->ring]; | 615 | struct radeon_ring *ring = &rdev->ring[fence->ring]; |
616 | uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr; | 616 | uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; |
617 | 617 | ||
618 | radeon_ring_write(ring, VCE_CMD_FENCE); | 618 | radeon_ring_write(ring, VCE_CMD_FENCE); |
619 | radeon_ring_write(ring, addr); | 619 | radeon_ring_write(ring, addr); |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index d589475fe9e6..ac708e006180 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -39,30 +39,35 @@ MODULE_FIRMWARE("radeon/TAHITI_pfp.bin"); | |||
39 | MODULE_FIRMWARE("radeon/TAHITI_me.bin"); | 39 | MODULE_FIRMWARE("radeon/TAHITI_me.bin"); |
40 | MODULE_FIRMWARE("radeon/TAHITI_ce.bin"); | 40 | MODULE_FIRMWARE("radeon/TAHITI_ce.bin"); |
41 | MODULE_FIRMWARE("radeon/TAHITI_mc.bin"); | 41 | MODULE_FIRMWARE("radeon/TAHITI_mc.bin"); |
42 | MODULE_FIRMWARE("radeon/TAHITI_mc2.bin"); | ||
42 | MODULE_FIRMWARE("radeon/TAHITI_rlc.bin"); | 43 | MODULE_FIRMWARE("radeon/TAHITI_rlc.bin"); |
43 | MODULE_FIRMWARE("radeon/TAHITI_smc.bin"); | 44 | MODULE_FIRMWARE("radeon/TAHITI_smc.bin"); |
44 | MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin"); | 45 | MODULE_FIRMWARE("radeon/PITCAIRN_pfp.bin"); |
45 | MODULE_FIRMWARE("radeon/PITCAIRN_me.bin"); | 46 | MODULE_FIRMWARE("radeon/PITCAIRN_me.bin"); |
46 | MODULE_FIRMWARE("radeon/PITCAIRN_ce.bin"); | 47 | MODULE_FIRMWARE("radeon/PITCAIRN_ce.bin"); |
47 | MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin"); | 48 | MODULE_FIRMWARE("radeon/PITCAIRN_mc.bin"); |
49 | MODULE_FIRMWARE("radeon/PITCAIRN_mc2.bin"); | ||
48 | MODULE_FIRMWARE("radeon/PITCAIRN_rlc.bin"); | 50 | MODULE_FIRMWARE("radeon/PITCAIRN_rlc.bin"); |
49 | MODULE_FIRMWARE("radeon/PITCAIRN_smc.bin"); | 51 | MODULE_FIRMWARE("radeon/PITCAIRN_smc.bin"); |
50 | MODULE_FIRMWARE("radeon/VERDE_pfp.bin"); | 52 | MODULE_FIRMWARE("radeon/VERDE_pfp.bin"); |
51 | MODULE_FIRMWARE("radeon/VERDE_me.bin"); | 53 | MODULE_FIRMWARE("radeon/VERDE_me.bin"); |
52 | MODULE_FIRMWARE("radeon/VERDE_ce.bin"); | 54 | MODULE_FIRMWARE("radeon/VERDE_ce.bin"); |
53 | MODULE_FIRMWARE("radeon/VERDE_mc.bin"); | 55 | MODULE_FIRMWARE("radeon/VERDE_mc.bin"); |
56 | MODULE_FIRMWARE("radeon/VERDE_mc2.bin"); | ||
54 | MODULE_FIRMWARE("radeon/VERDE_rlc.bin"); | 57 | MODULE_FIRMWARE("radeon/VERDE_rlc.bin"); |
55 | MODULE_FIRMWARE("radeon/VERDE_smc.bin"); | 58 | MODULE_FIRMWARE("radeon/VERDE_smc.bin"); |
56 | MODULE_FIRMWARE("radeon/OLAND_pfp.bin"); | 59 | MODULE_FIRMWARE("radeon/OLAND_pfp.bin"); |
57 | MODULE_FIRMWARE("radeon/OLAND_me.bin"); | 60 | MODULE_FIRMWARE("radeon/OLAND_me.bin"); |
58 | MODULE_FIRMWARE("radeon/OLAND_ce.bin"); | 61 | MODULE_FIRMWARE("radeon/OLAND_ce.bin"); |
59 | MODULE_FIRMWARE("radeon/OLAND_mc.bin"); | 62 | MODULE_FIRMWARE("radeon/OLAND_mc.bin"); |
63 | MODULE_FIRMWARE("radeon/OLAND_mc2.bin"); | ||
60 | MODULE_FIRMWARE("radeon/OLAND_rlc.bin"); | 64 | MODULE_FIRMWARE("radeon/OLAND_rlc.bin"); |
61 | MODULE_FIRMWARE("radeon/OLAND_smc.bin"); | 65 | MODULE_FIRMWARE("radeon/OLAND_smc.bin"); |
62 | MODULE_FIRMWARE("radeon/HAINAN_pfp.bin"); | 66 | MODULE_FIRMWARE("radeon/HAINAN_pfp.bin"); |
63 | MODULE_FIRMWARE("radeon/HAINAN_me.bin"); | 67 | MODULE_FIRMWARE("radeon/HAINAN_me.bin"); |
64 | MODULE_FIRMWARE("radeon/HAINAN_ce.bin"); | 68 | MODULE_FIRMWARE("radeon/HAINAN_ce.bin"); |
65 | MODULE_FIRMWARE("radeon/HAINAN_mc.bin"); | 69 | MODULE_FIRMWARE("radeon/HAINAN_mc.bin"); |
70 | MODULE_FIRMWARE("radeon/HAINAN_mc2.bin"); | ||
66 | MODULE_FIRMWARE("radeon/HAINAN_rlc.bin"); | 71 | MODULE_FIRMWARE("radeon/HAINAN_rlc.bin"); |
67 | MODULE_FIRMWARE("radeon/HAINAN_smc.bin"); | 72 | MODULE_FIRMWARE("radeon/HAINAN_smc.bin"); |
68 | 73 | ||
@@ -1467,36 +1472,33 @@ int si_mc_load_microcode(struct radeon_device *rdev) | |||
1467 | const __be32 *fw_data; | 1472 | const __be32 *fw_data; |
1468 | u32 running, blackout = 0; | 1473 | u32 running, blackout = 0; |
1469 | u32 *io_mc_regs; | 1474 | u32 *io_mc_regs; |
1470 | int i, ucode_size, regs_size; | 1475 | int i, regs_size, ucode_size; |
1471 | 1476 | ||
1472 | if (!rdev->mc_fw) | 1477 | if (!rdev->mc_fw) |
1473 | return -EINVAL; | 1478 | return -EINVAL; |
1474 | 1479 | ||
1480 | ucode_size = rdev->mc_fw->size / 4; | ||
1481 | |||
1475 | switch (rdev->family) { | 1482 | switch (rdev->family) { |
1476 | case CHIP_TAHITI: | 1483 | case CHIP_TAHITI: |
1477 | io_mc_regs = (u32 *)&tahiti_io_mc_regs; | 1484 | io_mc_regs = (u32 *)&tahiti_io_mc_regs; |
1478 | ucode_size = SI_MC_UCODE_SIZE; | ||
1479 | regs_size = TAHITI_IO_MC_REGS_SIZE; | 1485 | regs_size = TAHITI_IO_MC_REGS_SIZE; |
1480 | break; | 1486 | break; |
1481 | case CHIP_PITCAIRN: | 1487 | case CHIP_PITCAIRN: |
1482 | io_mc_regs = (u32 *)&pitcairn_io_mc_regs; | 1488 | io_mc_regs = (u32 *)&pitcairn_io_mc_regs; |
1483 | ucode_size = SI_MC_UCODE_SIZE; | ||
1484 | regs_size = TAHITI_IO_MC_REGS_SIZE; | 1489 | regs_size = TAHITI_IO_MC_REGS_SIZE; |
1485 | break; | 1490 | break; |
1486 | case CHIP_VERDE: | 1491 | case CHIP_VERDE: |
1487 | default: | 1492 | default: |
1488 | io_mc_regs = (u32 *)&verde_io_mc_regs; | 1493 | io_mc_regs = (u32 *)&verde_io_mc_regs; |
1489 | ucode_size = SI_MC_UCODE_SIZE; | ||
1490 | regs_size = TAHITI_IO_MC_REGS_SIZE; | 1494 | regs_size = TAHITI_IO_MC_REGS_SIZE; |
1491 | break; | 1495 | break; |
1492 | case CHIP_OLAND: | 1496 | case CHIP_OLAND: |
1493 | io_mc_regs = (u32 *)&oland_io_mc_regs; | 1497 | io_mc_regs = (u32 *)&oland_io_mc_regs; |
1494 | ucode_size = OLAND_MC_UCODE_SIZE; | ||
1495 | regs_size = TAHITI_IO_MC_REGS_SIZE; | 1498 | regs_size = TAHITI_IO_MC_REGS_SIZE; |
1496 | break; | 1499 | break; |
1497 | case CHIP_HAINAN: | 1500 | case CHIP_HAINAN: |
1498 | io_mc_regs = (u32 *)&hainan_io_mc_regs; | 1501 | io_mc_regs = (u32 *)&hainan_io_mc_regs; |
1499 | ucode_size = OLAND_MC_UCODE_SIZE; | ||
1500 | regs_size = TAHITI_IO_MC_REGS_SIZE; | 1502 | regs_size = TAHITI_IO_MC_REGS_SIZE; |
1501 | break; | 1503 | break; |
1502 | } | 1504 | } |
@@ -1552,7 +1554,7 @@ static int si_init_microcode(struct radeon_device *rdev) | |||
1552 | const char *chip_name; | 1554 | const char *chip_name; |
1553 | const char *rlc_chip_name; | 1555 | const char *rlc_chip_name; |
1554 | size_t pfp_req_size, me_req_size, ce_req_size, rlc_req_size, mc_req_size; | 1556 | size_t pfp_req_size, me_req_size, ce_req_size, rlc_req_size, mc_req_size; |
1555 | size_t smc_req_size; | 1557 | size_t smc_req_size, mc2_req_size; |
1556 | char fw_name[30]; | 1558 | char fw_name[30]; |
1557 | int err; | 1559 | int err; |
1558 | 1560 | ||
@@ -1567,6 +1569,7 @@ static int si_init_microcode(struct radeon_device *rdev) | |||
1567 | ce_req_size = SI_CE_UCODE_SIZE * 4; | 1569 | ce_req_size = SI_CE_UCODE_SIZE * 4; |
1568 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; | 1570 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; |
1569 | mc_req_size = SI_MC_UCODE_SIZE * 4; | 1571 | mc_req_size = SI_MC_UCODE_SIZE * 4; |
1572 | mc2_req_size = TAHITI_MC_UCODE_SIZE * 4; | ||
1570 | smc_req_size = ALIGN(TAHITI_SMC_UCODE_SIZE, 4); | 1573 | smc_req_size = ALIGN(TAHITI_SMC_UCODE_SIZE, 4); |
1571 | break; | 1574 | break; |
1572 | case CHIP_PITCAIRN: | 1575 | case CHIP_PITCAIRN: |
@@ -1577,6 +1580,7 @@ static int si_init_microcode(struct radeon_device *rdev) | |||
1577 | ce_req_size = SI_CE_UCODE_SIZE * 4; | 1580 | ce_req_size = SI_CE_UCODE_SIZE * 4; |
1578 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; | 1581 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; |
1579 | mc_req_size = SI_MC_UCODE_SIZE * 4; | 1582 | mc_req_size = SI_MC_UCODE_SIZE * 4; |
1583 | mc2_req_size = PITCAIRN_MC_UCODE_SIZE * 4; | ||
1580 | smc_req_size = ALIGN(PITCAIRN_SMC_UCODE_SIZE, 4); | 1584 | smc_req_size = ALIGN(PITCAIRN_SMC_UCODE_SIZE, 4); |
1581 | break; | 1585 | break; |
1582 | case CHIP_VERDE: | 1586 | case CHIP_VERDE: |
@@ -1587,6 +1591,7 @@ static int si_init_microcode(struct radeon_device *rdev) | |||
1587 | ce_req_size = SI_CE_UCODE_SIZE * 4; | 1591 | ce_req_size = SI_CE_UCODE_SIZE * 4; |
1588 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; | 1592 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; |
1589 | mc_req_size = SI_MC_UCODE_SIZE * 4; | 1593 | mc_req_size = SI_MC_UCODE_SIZE * 4; |
1594 | mc2_req_size = VERDE_MC_UCODE_SIZE * 4; | ||
1590 | smc_req_size = ALIGN(VERDE_SMC_UCODE_SIZE, 4); | 1595 | smc_req_size = ALIGN(VERDE_SMC_UCODE_SIZE, 4); |
1591 | break; | 1596 | break; |
1592 | case CHIP_OLAND: | 1597 | case CHIP_OLAND: |
@@ -1596,7 +1601,7 @@ static int si_init_microcode(struct radeon_device *rdev) | |||
1596 | me_req_size = SI_PM4_UCODE_SIZE * 4; | 1601 | me_req_size = SI_PM4_UCODE_SIZE * 4; |
1597 | ce_req_size = SI_CE_UCODE_SIZE * 4; | 1602 | ce_req_size = SI_CE_UCODE_SIZE * 4; |
1598 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; | 1603 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; |
1599 | mc_req_size = OLAND_MC_UCODE_SIZE * 4; | 1604 | mc_req_size = mc2_req_size = OLAND_MC_UCODE_SIZE * 4; |
1600 | smc_req_size = ALIGN(OLAND_SMC_UCODE_SIZE, 4); | 1605 | smc_req_size = ALIGN(OLAND_SMC_UCODE_SIZE, 4); |
1601 | break; | 1606 | break; |
1602 | case CHIP_HAINAN: | 1607 | case CHIP_HAINAN: |
@@ -1606,7 +1611,7 @@ static int si_init_microcode(struct radeon_device *rdev) | |||
1606 | me_req_size = SI_PM4_UCODE_SIZE * 4; | 1611 | me_req_size = SI_PM4_UCODE_SIZE * 4; |
1607 | ce_req_size = SI_CE_UCODE_SIZE * 4; | 1612 | ce_req_size = SI_CE_UCODE_SIZE * 4; |
1608 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; | 1613 | rlc_req_size = SI_RLC_UCODE_SIZE * 4; |
1609 | mc_req_size = OLAND_MC_UCODE_SIZE * 4; | 1614 | mc_req_size = mc2_req_size = OLAND_MC_UCODE_SIZE * 4; |
1610 | smc_req_size = ALIGN(HAINAN_SMC_UCODE_SIZE, 4); | 1615 | smc_req_size = ALIGN(HAINAN_SMC_UCODE_SIZE, 4); |
1611 | break; | 1616 | break; |
1612 | default: BUG(); | 1617 | default: BUG(); |
@@ -1659,16 +1664,22 @@ static int si_init_microcode(struct radeon_device *rdev) | |||
1659 | err = -EINVAL; | 1664 | err = -EINVAL; |
1660 | } | 1665 | } |
1661 | 1666 | ||
1662 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name); | 1667 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name); |
1663 | err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); | 1668 | err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); |
1664 | if (err) | 1669 | if (err) { |
1665 | goto out; | 1670 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name); |
1666 | if (rdev->mc_fw->size != mc_req_size) { | 1671 | err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); |
1672 | if (err) | ||
1673 | goto out; | ||
1674 | } | ||
1675 | if ((rdev->mc_fw->size != mc_req_size) && | ||
1676 | (rdev->mc_fw->size != mc2_req_size)) { | ||
1667 | printk(KERN_ERR | 1677 | printk(KERN_ERR |
1668 | "si_mc: Bogus length %zu in firmware \"%s\"\n", | 1678 | "si_mc: Bogus length %zu in firmware \"%s\"\n", |
1669 | rdev->mc_fw->size, fw_name); | 1679 | rdev->mc_fw->size, fw_name); |
1670 | err = -EINVAL; | 1680 | err = -EINVAL; |
1671 | } | 1681 | } |
1682 | DRM_INFO("%s: %zu bytes\n", fw_name, rdev->mc_fw->size); | ||
1672 | 1683 | ||
1673 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); | 1684 | snprintf(fw_name, sizeof(fw_name), "radeon/%s_smc.bin", chip_name); |
1674 | err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); | 1685 | err = request_firmware(&rdev->smc_fw, fw_name, rdev->dev); |