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authorRalf Baechle <ralf@linux-mips.org>2006-06-07 15:10:06 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 12:39:21 -0400
commit8f2f360da9262091153c97d756c40eabdde75f1a (patch)
tree057e7afec78f5f2f56e487f4c8dea5d62553a3e6
parentedc123d18397008fcd4fdf04f60e033ba1042834 (diff)
[MIPS] IP27: Nuke leftovers of _STANDALONE
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--include/asm-mips/sn/addrs.h22
-rw-r--r--include/asm-mips/sn/sn0/addrs.h76
2 files changed, 3 insertions, 95 deletions
diff --git a/include/asm-mips/sn/addrs.h b/include/asm-mips/sn/addrs.h
index 00da24f506f6..6c8a5577ddf1 100644
--- a/include/asm-mips/sn/addrs.h
+++ b/include/asm-mips/sn/addrs.h
@@ -248,14 +248,6 @@
248 * for _x. 248 * for _x.
249 */ 249 */
250 250
251#ifdef _STANDALONE
252
253/* DO NOT USE THESE DIRECTLY IN THE KERNEL. SEE BELOW. */
254#define LOCAL_HUB(_x) (HUBREG_CAST (IALIAS_BASE + (_x)))
255#define REMOTE_HUB(_n, _x) (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) + \
256 0x800000 + (_x)))
257#endif /* _STANDALONE */
258
259/* 251/*
260 * WARNING: 252 * WARNING:
261 * When certain Hub chip workaround are defined, it's not sufficient 253 * When certain Hub chip workaround are defined, it's not sufficient
@@ -322,20 +314,6 @@
322 PHYS_TO_K0(NODE_OFFSET(nasid) | ARCS_SPB_OFFSET) 314 PHYS_TO_K0(NODE_OFFSET(nasid) | ARCS_SPB_OFFSET)
323#define ARCS_SPB_SIZE 0x0400 315#define ARCS_SPB_SIZE 0x0400
324 316
325#ifdef _STANDALONE
326
327#define ARCS_TVECTOR_OFFSET 0x2800
328#define ARCS_PVECTOR_OFFSET 0x2c00
329
330/*
331 * These addresses are used by the master CPU to install the transfer
332 * and private vectors. All others use the SPB to find them.
333 */
334#define TVADDR (NODE_CAC_BASE(get_nasid()) + ARCS_TVECTOR_OFFSET)
335#define PVADDR (NODE_CAC_BASE(get_nasid()) + ARCS_PVECTOR_OFFSET)
336
337#endif /* _STANDALONE */
338
339#define KLDIR_OFFSET 0x2000 317#define KLDIR_OFFSET 0x2000
340#define KLDIR_ADDR(nasid) \ 318#define KLDIR_ADDR(nasid) \
341 TO_NODE_UNCAC((nasid), KLDIR_OFFSET) 319 TO_NODE_UNCAC((nasid), KLDIR_OFFSET)
diff --git a/include/asm-mips/sn/sn0/addrs.h b/include/asm-mips/sn/sn0/addrs.h
index 7cb9c31f6878..0ee8cbcb5b03 100644
--- a/include/asm-mips/sn/sn0/addrs.h
+++ b/include/asm-mips/sn/sn0/addrs.h
@@ -85,15 +85,15 @@
85#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \ 85#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \
86 NASID_SHFT) & NASID_BITMASK) 86 NASID_SHFT) & NASID_BITMASK)
87 87
88#if !defined(__ASSEMBLY__) && !defined(_STANDALONE) 88#if !defined(__ASSEMBLY__)
89 89
90#define NODE_SWIN_BASE(nasid, widget) \ 90#define NODE_SWIN_BASE(nasid, widget) \
91 ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \ 91 ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) \
92 : RAW_NODE_SWIN_BASE(nasid, widget)) 92 : RAW_NODE_SWIN_BASE(nasid, widget))
93#else /* __ASSEMBLY__ || _STANDALONE */ 93#else /* __ASSEMBLY__ */
94#define NODE_SWIN_BASE(nasid, widget) \ 94#define NODE_SWIN_BASE(nasid, widget) \
95 (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS)) 95 (NODE_IO_BASE(nasid) + (UINT64_CAST (widget) << SWIN_SIZE_BITS))
96#endif /* __ASSEMBLY__ || _STANDALONE */ 96#endif /* __ASSEMBLY__ */
97 97
98/* 98/*
99 * The following definitions pertain to the IO special address 99 * The following definitions pertain to the IO special address
@@ -276,76 +276,6 @@
276 276
277#define _ARCSPROM 277#define _ARCSPROM
278 278
279#ifdef _STANDALONE
280
281/*
282 * The PROM needs to pass the device base address and the
283 * device pci cfg space address to the device drivers during
284 * install. The COMPONENT->Key field is used for this purpose.
285 * Macros needed by SN0 device drivers to convert the
286 * COMPONENT->Key field to the respective base address.
287 * Key field looks as follows:
288 *
289 * +----------------------------------------------------+
290 * |devnasid | widget |pciid |hubwidid|hstnasid | adap |
291 * | 2 | 1 | 1 | 1 | 2 | 1 |
292 * +----------------------------------------------------+
293 * | | | | | | |
294 * 64 48 40 32 24 8 0
295 *
296 * These are used by standalone drivers till the io infrastructure
297 * is in place.
298 */
299
300#ifndef __ASSEMBLY__
301
302#define uchar unsigned char
303
304#define KEY_DEVNASID_SHFT 48
305#define KEY_WIDID_SHFT 40
306#define KEY_PCIID_SHFT 32
307#define KEY_HUBWID_SHFT 24
308#define KEY_HSTNASID_SHFT 8
309
310#define MK_SN0_KEY(nasid, widid, pciid) \
311 ((((__psunsigned_t)nasid)<< KEY_DEVNASID_SHFT |\
312 ((__psunsigned_t)widid) << KEY_WIDID_SHFT) |\
313 ((__psunsigned_t)pciid) << KEY_PCIID_SHFT)
314
315#define ADD_HUBWID_KEY(key,hubwid)\
316 (key|=((__psunsigned_t)hubwid << KEY_HUBWID_SHFT))
317
318#define ADD_HSTNASID_KEY(key,hstnasid)\
319 (key|=((__psunsigned_t)hstnasid << KEY_HSTNASID_SHFT))
320
321#define GET_DEVNASID_FROM_KEY(key) ((short)(key >> KEY_DEVNASID_SHFT))
322#define GET_WIDID_FROM_KEY(key) ((uchar)(key >> KEY_WIDID_SHFT))
323#define GET_PCIID_FROM_KEY(key) ((uchar)(key >> KEY_PCIID_SHFT))
324#define GET_HUBWID_FROM_KEY(key) ((uchar)(key >> KEY_HUBWID_SHFT))
325#define GET_HSTNASID_FROM_KEY(key) ((short)(key >> KEY_HSTNASID_SHFT))
326
327#define PCI_64_TARGID_SHFT 60
328
329#define GET_PCIBASE_FROM_KEY(key) (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
330 GET_WIDID_FROM_KEY(key))\
331 | BRIDGE_DEVIO(GET_PCIID_FROM_KEY(key)))
332
333#define GET_PCICFGBASE_FROM_KEY(key) \
334 (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
335 GET_WIDID_FROM_KEY(key))\
336 | BRIDGE_TYPE0_CFG_DEV(GET_PCIID_FROM_KEY(key)))
337
338#define GET_WIDBASE_FROM_KEY(key) \
339 (NODE_SWIN_BASE(GET_DEVNASID_FROM_KEY(key),\
340 GET_WIDID_FROM_KEY(key)))
341
342#define PUT_INSTALL_STATUS(c,s) c->Revision = s
343#define GET_INSTALL_STATUS(c) c->Revision
344
345#endif /* !__ASSEMBLY__ */
346
347#endif /* _STANDALONE */
348
349#if defined (HUB_ERR_STS_WAR) 279#if defined (HUB_ERR_STS_WAR)
350 280
351#define ERR_STS_WAR_REGISTER IIO_IIBUSERR 281#define ERR_STS_WAR_REGISTER IIO_IIBUSERR