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authorMichael Hennerich <michael.hennerich@analog.com>2008-04-24 16:41:49 -0400
committerBryan Wu <cooloney@kernel.org>2008-04-24 16:41:49 -0400
commit8e39df215c4b1d3e6f9e62f92d35ab1aa11104eb (patch)
tree527ef60461a6fcb076c9d6f37c20d5f44219dce7
parent2fb6cb41ecb315b1d84849663bb2793cdc41a96d (diff)
[Blackfin] arch: Equalize include files: Add PLL_DIV Masks
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
-rw-r--r--include/asm-blackfin/mach-bf561/defBF561.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index bee30230187b..366c9b9a0cb7 100644
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -871,6 +871,8 @@
871/* PLL_DIV Masks */ 871/* PLL_DIV Masks */
872#define SCLK_DIV(x) (x) /* SCLK = VCO / x */ 872#define SCLK_DIV(x) (x) /* SCLK = VCO / x */
873 873
874#define CSEL 0x30 /* Core Select */
875#define SSEL 0xf /* System Select */
874#define CCLK_DIV1 0x00000000 /* CCLK = VCO / 1 */ 876#define CCLK_DIV1 0x00000000 /* CCLK = VCO / 1 */
875#define CCLK_DIV2 0x00000010 /* CCLK = VCO / 2 */ 877#define CCLK_DIV2 0x00000010 /* CCLK = VCO / 2 */
876#define CCLK_DIV4 0x00000020 /* CCLK = VCO / 4 */ 878#define CCLK_DIV4 0x00000020 /* CCLK = VCO / 4 */