diff options
author | YoungJun Cho <yj44.cho@samsung.com> | 2014-07-17 05:01:18 -0400 |
---|---|---|
committer | Inki Dae <daeinki@gmail.com> | 2014-08-03 03:52:14 -0400 |
commit | 8e1c06cf65819d9e0fff061324f9f7edff83583e (patch) | |
tree | 359906c027d3b37196a88fe7927c3c339fcf5fd9 | |
parent | e35d7223de18e01df8922676464572db8b1453a1 (diff) |
ARM: dts: samsung-fimd: add LCD I80 interface specific properties
In case of using MIPI DSI based I80 interface panel,
the relevant registers should be set.
So this patch adds relevant DT bindings.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
-rw-r--r-- | Documentation/devicetree/bindings/video/samsung-fimd.txt | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/video/samsung-fimd.txt b/Documentation/devicetree/bindings/video/samsung-fimd.txt index 2dad41b689af..8428fcff8037 100644 --- a/Documentation/devicetree/bindings/video/samsung-fimd.txt +++ b/Documentation/devicetree/bindings/video/samsung-fimd.txt | |||
@@ -44,6 +44,34 @@ Optional Properties: | |||
44 | - display-timings: timing settings for FIMD, as described in document [1]. | 44 | - display-timings: timing settings for FIMD, as described in document [1]. |
45 | Can be used in case timings cannot be provided otherwise | 45 | Can be used in case timings cannot be provided otherwise |
46 | or to override timings provided by the panel. | 46 | or to override timings provided by the panel. |
47 | - samsung,sysreg: handle to syscon used to control the system registers | ||
48 | - i80-if-timings: timing configuration for lcd i80 interface support. | ||
49 | - cs-setup: clock cycles for the active period of address signal is enabled | ||
50 | until chip select is enabled. | ||
51 | If not specified, the default value(0) will be used. | ||
52 | - wr-setup: clock cycles for the active period of CS signal is enabled until | ||
53 | write signal is enabled. | ||
54 | If not specified, the default value(0) will be used. | ||
55 | - wr-active: clock cycles for the active period of CS is enabled. | ||
56 | If not specified, the default value(1) will be used. | ||
57 | - wr-hold: clock cycles for the active period of CS is disabled until write | ||
58 | signal is disabled. | ||
59 | If not specified, the default value(0) will be used. | ||
60 | |||
61 | The parameters are defined as: | ||
62 | |||
63 | VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|?? | ||
64 | : : : : : | ||
65 | Address Output --:<XXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XX | ||
66 | | cs-setup+1 | : : : | ||
67 | |<---------->| : : : | ||
68 | Chip Select ???????????????|____________:____________:____________|?? | ||
69 | | wr-setup+1 | | wr-hold+1 | | ||
70 | |<---------->| |<---------->| | ||
71 | Write Enable ????????????????????????????|____________|??????????????? | ||
72 | | wr-active+1| | ||
73 | |<---------->| | ||
74 | Video Data ----------------------------<XXXXXXXXXXXXXXXXXXXXXXXXX>-- | ||
47 | 75 | ||
48 | The device node can contain 'port' child nodes according to the bindings defined | 76 | The device node can contain 'port' child nodes according to the bindings defined |
49 | in [2]. The following are properties specific to those nodes: | 77 | in [2]. The following are properties specific to those nodes: |