aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2013-09-30 12:08:46 -0400
committerOlof Johansson <olof@lixom.net>2013-09-30 12:08:46 -0400
commit8e17a7f32a554837b060410d9d0cfeb9ce8d3e0d (patch)
treefc9f739b9b7d4f8d4ba42ee69f4a122bbc4c5371
parent0ebf7dc47a13771a37f1bd1290b30b10e1c8e29a (diff)
parentc44c8e9d96b9aa8624409d6098f16dabc4afc6c2 (diff)
Merge tag 'ux500-dt-for-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
From Linus Walleij: This is a huge device tree and ATAG removal series for ux500: - Move all the clock definitions over to the device tree - Remove all now-redundant AUXDATA and make the ux500 device tree only * tag 'ux500-dt-for-v3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (92 commits) ARM: ux500: delete devices-common remnants clk: ux500: Provide a look-up for the ARMSS clock ARM: ux500: Enable CPUFreq on Snowball ARM: ux500: Provide a Device Tree node for CPUFreq in the DBx500 ARM: ux500: Provide a clock lookup for the Hash driver ARM: ux500: Provide a clock lookup for the Crypto driver ARM: ux500: Fix trivial white-space error in the DBX500 DTSI file ARM: ux500: Remove ATAG booting support for Snowball ARM: ux500: Remove ATAG booting support for HREF ARM: ux500: Remove ATAG booting support for U8520 ARM: ux500: Remove ATAG booting support for MOP500 ARM: ux500: Purge UIB framework when booting with ATAGs ARM: ux500: Take out STUIB support when not booting with Device Tree ARM: ux500: Remove BU21013 ROHM TS support when booting with only ATAGs ARM: ux500: Don't register the STMPE/SKE when booting with ATAG support ARM: ux500: Delete U8500 UIB support when booting with ATAGs ARM: ux500: Don't register Synaptics RMI4 TS when booting with ATAGs ARM: ux500: Purge DB8500 PRCMU registration when not booting with DT ARM: ux500: Stop requesting the SoC device to play 'parent' role ARM: ux500: Remove UART support when booting without Device Tree ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/usb/ux500-usb.txt2
-rw-r--r--arch/arm/boot/dts/ste-dbx5x0.dtsi141
-rw-r--r--arch/arm/boot/dts/ste-href.dtsi82
-rw-r--r--arch/arm/boot/dts/ste-hrefv60plus.dts132
-rw-r--r--arch/arm/boot/dts/ste-snowball.dts85
-rw-r--r--arch/arm/mach-ux500/Makefile5
-rw-r--r--arch/arm/mach-ux500/board-mop500-audio.c50
-rw-r--r--arch/arm/mach-ux500/board-mop500-sdi.c51
-rw-r--r--arch/arm/mach-ux500/board-mop500-stuib.c120
-rw-r--r--arch/arm/mach-ux500/board-mop500-u8500uib.c92
-rw-r--r--arch/arm/mach-ux500/board-mop500-uib.c133
-rw-r--r--arch/arm/mach-ux500/board-mop500.c637
-rw-r--r--arch/arm/mach-ux500/board-mop500.h16
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c124
-rw-r--r--arch/arm/mach-ux500/cpu.c19
-rw-r--r--arch/arm/mach-ux500/devices-common.c60
-rw-r--r--arch/arm/mach-ux500/devices-common.h149
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c94
-rw-r--r--arch/arm/mach-ux500/devices-db8500.h110
-rw-r--r--arch/arm/mach-ux500/devices.h8
-rw-r--r--arch/arm/mach-ux500/setup.h1
-rw-r--r--arch/arm/mach-ux500/timer.c4
-rw-r--r--arch/arm/mach-ux500/usb.c135
-rw-r--r--drivers/clk/ux500/Makefile1
-rw-r--r--drivers/clk/ux500/u8500_of_clk.c559
-rw-r--r--drivers/clk/ux500/u8540_clk.c2
-rw-r--r--drivers/mfd/db8500-prcmu.c1
-rw-r--r--drivers/mfd/dbx500-prcmu-regs.h1
-rw-r--r--drivers/usb/musb/ux500.c2
-rw-r--r--include/dt-bindings/mfd/dbx500-prcmu.h83
-rw-r--r--include/linux/mfd/dbx500-prcmu.h70
-rw-r--r--include/linux/platform_data/clk-ux500.h3
32 files changed, 811 insertions, 2161 deletions
diff --git a/Documentation/devicetree/bindings/usb/ux500-usb.txt b/Documentation/devicetree/bindings/usb/ux500-usb.txt
index 330d6ec15401..439a41c79afa 100644
--- a/Documentation/devicetree/bindings/usb/ux500-usb.txt
+++ b/Documentation/devicetree/bindings/usb/ux500-usb.txt
@@ -15,7 +15,7 @@ Optional properties:
15Example: 15Example:
16 16
17usb_per5@a03e0000 { 17usb_per5@a03e0000 {
18 compatible = "stericsson,db8500-musb", "mentor,musb"; 18 compatible = "stericsson,db8500-musb";
19 reg = <0xa03e0000 0x10000>; 19 reg = <0xa03e0000 0x10000>;
20 interrupts = <0 23 0x4>; 20 interrupts = <0 23 0x4>;
21 interrupt-names = "mc"; 21 interrupt-names = "mc";
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 1c1091eedade..2ef30c1c1997 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -10,6 +10,7 @@
10 */ 10 */
11 11
12#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/mfd/dbx500-prcmu.h>
13#include "skeleton.dtsi" 14#include "skeleton.dtsi"
14 15
15/ { 16/ {
@@ -42,16 +43,56 @@
42 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>; 43 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
43 }; 44 };
44 45
46
47 clocks {
48 compatible = "stericsson,u8500-clks";
49
50 prcmu_clk: prcmu-clock {
51 #clock-cells = <1>;
52 };
53
54 prcc_pclk: prcc-periph-clock {
55 #clock-cells = <2>;
56 };
57
58 prcc_kclk: prcc-kernel-clock {
59 #clock-cells = <2>;
60 };
61
62 rtc_clk: rtc32k-clock {
63 #clock-cells = <0>;
64 };
65
66 smp_twd_clk: smp-twd-clock {
67 #clock-cells = <0>;
68 };
69 };
70
71 mtu@a03c6000 {
72 /* Nomadik System Timer */
73 compatible = "st,nomadik-mtu";
74 reg = <0xa03c6000 0x1000>;
75 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
76
77 clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;
78 clock-names = "timclk", "apb_pclk";
79 };
80
45 timer@a0410600 { 81 timer@a0410600 {
46 compatible = "arm,cortex-a9-twd-timer"; 82 compatible = "arm,cortex-a9-twd-timer";
47 reg = <0xa0410600 0x20>; 83 reg = <0xa0410600 0x20>;
48 interrupts = <1 13 0x304>; /* IRQ level high per-CPU */ 84 interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
85
86 clocks = <&smp_twd_clk>;
49 }; 87 };
50 88
51 rtc@80154000 { 89 rtc@80154000 {
52 compatible = "arm,rtc-pl031", "arm,primecell"; 90 compatible = "arm,rtc-pl031", "arm,primecell";
53 reg = <0x80154000 0x1000>; 91 reg = <0x80154000 0x1000>;
54 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; 92 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
93
94 clocks = <&rtc_clk>;
95 clock-names = "apb_pclk";
55 }; 96 };
56 97
57 gpio0: gpio@8012e000 { 98 gpio0: gpio@8012e000 {
@@ -65,6 +106,8 @@
65 gpio-controller; 106 gpio-controller;
66 #gpio-cells = <2>; 107 #gpio-cells = <2>;
67 gpio-bank = <0>; 108 gpio-bank = <0>;
109
110 clocks = <&prcc_pclk 1 9>;
68 }; 111 };
69 112
70 gpio1: gpio@8012e080 { 113 gpio1: gpio@8012e080 {
@@ -78,6 +121,8 @@
78 gpio-controller; 121 gpio-controller;
79 #gpio-cells = <2>; 122 #gpio-cells = <2>;
80 gpio-bank = <1>; 123 gpio-bank = <1>;
124
125 clocks = <&prcc_pclk 1 9>;
81 }; 126 };
82 127
83 gpio2: gpio@8000e000 { 128 gpio2: gpio@8000e000 {
@@ -91,6 +136,8 @@
91 gpio-controller; 136 gpio-controller;
92 #gpio-cells = <2>; 137 #gpio-cells = <2>;
93 gpio-bank = <2>; 138 gpio-bank = <2>;
139
140 clocks = <&prcc_pclk 3 8>;
94 }; 141 };
95 142
96 gpio3: gpio@8000e080 { 143 gpio3: gpio@8000e080 {
@@ -104,6 +151,8 @@
104 gpio-controller; 151 gpio-controller;
105 #gpio-cells = <2>; 152 #gpio-cells = <2>;
106 gpio-bank = <3>; 153 gpio-bank = <3>;
154
155 clocks = <&prcc_pclk 3 8>;
107 }; 156 };
108 157
109 gpio4: gpio@8000e100 { 158 gpio4: gpio@8000e100 {
@@ -117,6 +166,8 @@
117 gpio-controller; 166 gpio-controller;
118 #gpio-cells = <2>; 167 #gpio-cells = <2>;
119 gpio-bank = <4>; 168 gpio-bank = <4>;
169
170 clocks = <&prcc_pclk 3 8>;
120 }; 171 };
121 172
122 gpio5: gpio@8000e180 { 173 gpio5: gpio@8000e180 {
@@ -130,6 +181,8 @@
130 gpio-controller; 181 gpio-controller;
131 #gpio-cells = <2>; 182 #gpio-cells = <2>;
132 gpio-bank = <5>; 183 gpio-bank = <5>;
184
185 clocks = <&prcc_pclk 3 8>;
133 }; 186 };
134 187
135 gpio6: gpio@8011e000 { 188 gpio6: gpio@8011e000 {
@@ -143,6 +196,8 @@
143 gpio-controller; 196 gpio-controller;
144 #gpio-cells = <2>; 197 #gpio-cells = <2>;
145 gpio-bank = <6>; 198 gpio-bank = <6>;
199
200 clocks = <&prcc_pclk 2 1>;
146 }; 201 };
147 202
148 gpio7: gpio@8011e080 { 203 gpio7: gpio@8011e080 {
@@ -156,6 +211,8 @@
156 gpio-controller; 211 gpio-controller;
157 #gpio-cells = <2>; 212 #gpio-cells = <2>;
158 gpio-bank = <7>; 213 gpio-bank = <7>;
214
215 clocks = <&prcc_pclk 2 1>;
159 }; 216 };
160 217
161 gpio8: gpio@a03fe000 { 218 gpio8: gpio@a03fe000 {
@@ -169,6 +226,8 @@
169 gpio-controller; 226 gpio-controller;
170 #gpio-cells = <2>; 227 #gpio-cells = <2>;
171 gpio-bank = <8>; 228 gpio-bank = <8>;
229
230 clocks = <&prcc_pclk 6 1>;
172 }; 231 };
173 232
174 pinctrl { 233 pinctrl {
@@ -177,8 +236,7 @@
177 }; 236 };
178 237
179 usb_per5@a03e0000 { 238 usb_per5@a03e0000 {
180 compatible = "stericsson,db8500-musb", 239 compatible = "stericsson,db8500-musb";
181 "mentor,musb";
182 reg = <0xa03e0000 0x10000>; 240 reg = <0xa03e0000 0x10000>;
183 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; 241 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
184 interrupt-names = "mc"; 242 interrupt-names = "mc";
@@ -210,6 +268,8 @@
210 "iep_6_14", "oep_6_14", 268 "iep_6_14", "oep_6_14",
211 "iep_7_15", "oep_7_15", 269 "iep_7_15", "oep_7_15",
212 "iep_8", "oep_8"; 270 "iep_8", "oep_8";
271
272 clocks = <&prcc_pclk 5 0>;
213 }; 273 };
214 274
215 dma: dma-controller@801C0000 { 275 dma: dma-controller@801C0000 {
@@ -220,6 +280,8 @@
220 280
221 #dma-cells = <3>; 281 #dma-cells = <3>;
222 memcpy-channels = <56 57 58 59 60>; 282 memcpy-channels = <56 57 58 59 60>;
283
284 clocks = <&prcmu_clk PRCMU_DMACLK>;
223 }; 285 };
224 286
225 prcmu: prcmu@80157000 { 287 prcmu: prcmu@80157000 {
@@ -238,6 +300,13 @@
238 reg = <0x80157450 0xC>; 300 reg = <0x80157450 0xC>;
239 }; 301 };
240 302
303 cpufreq {
304 compatible = "stericsson,cpufreq-ux500";
305 clocks = <&prcmu_clk PRCMU_ARMSS>;
306 clock-names = "armss";
307 status = "disabled";
308 };
309
241 thermal@801573c0 { 310 thermal@801573c0 {
242 compatible = "stericsson,db8500-thermal"; 311 compatible = "stericsson,db8500-thermal";
243 reg = <0x801573c0 0x40>; 312 reg = <0x801573c0 0x40>;
@@ -559,65 +628,74 @@
559 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 628 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
560 reg = <0x80004000 0x1000>; 629 reg = <0x80004000 0x1000>;
561 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; 630 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
562 arm,primecell-periphid = <0x180024>;
563 631
564 #address-cells = <1>; 632 #address-cells = <1>;
565 #size-cells = <0>; 633 #size-cells = <0>;
566 v-i2c-supply = <&db8500_vape_reg>; 634 v-i2c-supply = <&db8500_vape_reg>;
567 635
568 clock-frequency = <400000>; 636 clock-frequency = <400000>;
637 clocks = <&prcc_kclk 3 3>, <&prcc_pclk 3 3>;
638 clock-names = "i2cclk", "apb_pclk";
569 }; 639 };
570 640
571 i2c@80122000 { 641 i2c@80122000 {
572 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 642 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
573 reg = <0x80122000 0x1000>; 643 reg = <0x80122000 0x1000>;
574 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; 644 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
575 arm,primecell-periphid = <0x180024>;
576 645
577 #address-cells = <1>; 646 #address-cells = <1>;
578 #size-cells = <0>; 647 #size-cells = <0>;
579 v-i2c-supply = <&db8500_vape_reg>; 648 v-i2c-supply = <&db8500_vape_reg>;
580 649
581 clock-frequency = <400000>; 650 clock-frequency = <400000>;
651
652 clocks = <&prcc_kclk 1 2>, <&prcc_pclk 1 2>;
653 clock-names = "i2cclk", "apb_pclk";
582 }; 654 };
583 655
584 i2c@80128000 { 656 i2c@80128000 {
585 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 657 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
586 reg = <0x80128000 0x1000>; 658 reg = <0x80128000 0x1000>;
587 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; 659 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
588 arm,primecell-periphid = <0x180024>;
589 660
590 #address-cells = <1>; 661 #address-cells = <1>;
591 #size-cells = <0>; 662 #size-cells = <0>;
592 v-i2c-supply = <&db8500_vape_reg>; 663 v-i2c-supply = <&db8500_vape_reg>;
593 664
594 clock-frequency = <400000>; 665 clock-frequency = <400000>;
666
667 clocks = <&prcc_kclk 1 6>, <&prcc_pclk 1 6>;
668 clock-names = "i2cclk", "apb_pclk";
595 }; 669 };
596 670
597 i2c@80110000 { 671 i2c@80110000 {
598 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 672 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
599 reg = <0x80110000 0x1000>; 673 reg = <0x80110000 0x1000>;
600 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>; 674 interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>;
601 arm,primecell-periphid = <0x180024>;
602 675
603 #address-cells = <1>; 676 #address-cells = <1>;
604 #size-cells = <0>; 677 #size-cells = <0>;
605 v-i2c-supply = <&db8500_vape_reg>; 678 v-i2c-supply = <&db8500_vape_reg>;
606 679
607 clock-frequency = <400000>; 680 clock-frequency = <400000>;
681
682 clocks = <&prcc_kclk 2 0>, <&prcc_pclk 2 0>;
683 clock-names = "i2cclk", "apb_pclk";
608 }; 684 };
609 685
610 i2c@8012a000 { 686 i2c@8012a000 {
611 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell"; 687 compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";
612 reg = <0x8012a000 0x1000>; 688 reg = <0x8012a000 0x1000>;
613 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; 689 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
614 arm,primecell-periphid = <0x180024>;
615 690
616 #address-cells = <1>; 691 #address-cells = <1>;
617 #size-cells = <0>; 692 #size-cells = <0>;
618 v-i2c-supply = <&db8500_vape_reg>; 693 v-i2c-supply = <&db8500_vape_reg>;
619 694
620 clock-frequency = <400000>; 695 clock-frequency = <400000>;
696
697 clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;
698 clock-names = "i2cclk", "apb_pclk";
621 }; 699 };
622 700
623 ssp@80002000 { 701 ssp@80002000 {
@@ -638,6 +716,9 @@
638 <&dma 13 0 0x0>; /* Logical - MemToDev */ 716 <&dma 13 0 0x0>; /* Logical - MemToDev */
639 dma-names = "rx", "tx"; 717 dma-names = "rx", "tx";
640 718
719 clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
720 clock-names = "uart", "apb_pclk";
721
641 status = "disabled"; 722 status = "disabled";
642 }; 723 };
643 724
@@ -650,6 +731,9 @@
650 <&dma 12 0 0x0>; /* Logical - MemToDev */ 731 <&dma 12 0 0x0>; /* Logical - MemToDev */
651 dma-names = "rx", "tx"; 732 dma-names = "rx", "tx";
652 733
734 clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;
735 clock-names = "uart", "apb_pclk";
736
653 status = "disabled"; 737 status = "disabled";
654 }; 738 };
655 739
@@ -662,6 +746,9 @@
662 <&dma 11 0 0x0>; /* Logical - MemToDev */ 746 <&dma 11 0 0x0>; /* Logical - MemToDev */
663 dma-names = "rx", "tx"; 747 dma-names = "rx", "tx";
664 748
749 clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;
750 clock-names = "uart", "apb_pclk";
751
665 status = "disabled"; 752 status = "disabled";
666 }; 753 };
667 754
@@ -674,6 +761,9 @@
674 <&dma 29 0 0x0>; /* Logical - MemToDev */ 761 <&dma 29 0 0x0>; /* Logical - MemToDev */
675 dma-names = "rx", "tx"; 762 dma-names = "rx", "tx";
676 763
764 clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
765 clock-names = "sdi", "apb_pclk";
766
677 status = "disabled"; 767 status = "disabled";
678 }; 768 };
679 769
@@ -686,6 +776,9 @@
686 <&dma 32 0 0x0>; /* Logical - MemToDev */ 776 <&dma 32 0 0x0>; /* Logical - MemToDev */
687 dma-names = "rx", "tx"; 777 dma-names = "rx", "tx";
688 778
779 clocks = <&prcc_kclk 2 4>, <&prcc_pclk 2 6>;
780 clock-names = "sdi", "apb_pclk";
781
689 status = "disabled"; 782 status = "disabled";
690 }; 783 };
691 784
@@ -698,6 +791,9 @@
698 <&dma 28 0 0x0>; /* Logical - MemToDev */ 791 <&dma 28 0 0x0>; /* Logical - MemToDev */
699 dma-names = "rx", "tx"; 792 dma-names = "rx", "tx";
700 793
794 clocks = <&prcc_kclk 3 4>, <&prcc_pclk 3 4>;
795 clock-names = "sdi", "apb_pclk";
796
701 status = "disabled"; 797 status = "disabled";
702 }; 798 };
703 799
@@ -705,6 +801,10 @@
705 compatible = "arm,pl18x", "arm,primecell"; 801 compatible = "arm,pl18x", "arm,primecell";
706 reg = <0x80119000 0x1000>; 802 reg = <0x80119000 0x1000>;
707 interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>; 803 interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
804
805 clocks = <&prcc_kclk 2 5>, <&prcc_pclk 2 7>;
806 clock-names = "sdi", "apb_pclk";
807
708 status = "disabled"; 808 status = "disabled";
709 }; 809 };
710 810
@@ -717,6 +817,9 @@
717 <&dma 42 0 0x0>; /* Logical - MemToDev */ 817 <&dma 42 0 0x0>; /* Logical - MemToDev */
718 dma-names = "rx", "tx"; 818 dma-names = "rx", "tx";
719 819
820 clocks = <&prcc_kclk 2 2>, <&prcc_pclk 2 4>;
821 clock-names = "sdi", "apb_pclk";
822
720 status = "disabled"; 823 status = "disabled";
721 }; 824 };
722 825
@@ -724,6 +827,10 @@
724 compatible = "arm,pl18x", "arm,primecell"; 827 compatible = "arm,pl18x", "arm,primecell";
725 reg = <0x80008000 0x1000>; 828 reg = <0x80008000 0x1000>;
726 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; 829 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
830
831 clocks = <&prcc_kclk 3 7>, <&prcc_pclk 3 7>;
832 clock-names = "sdi", "apb_pclk";
833
727 status = "disabled"; 834 status = "disabled";
728 }; 835 };
729 836
@@ -732,6 +839,10 @@
732 reg = <0x80123000 0x1000>; 839 reg = <0x80123000 0x1000>;
733 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; 840 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
734 v-ape-supply = <&db8500_vape_reg>; 841 v-ape-supply = <&db8500_vape_reg>;
842
843 clocks = <&prcc_kclk 1 3>, <&prcc_pclk 1 3>;
844 clock-names = "msp", "apb_pclk";
845
735 status = "disabled"; 846 status = "disabled";
736 }; 847 };
737 848
@@ -740,6 +851,10 @@
740 reg = <0x80124000 0x1000>; 851 reg = <0x80124000 0x1000>;
741 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>; 852 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
742 v-ape-supply = <&db8500_vape_reg>; 853 v-ape-supply = <&db8500_vape_reg>;
854
855 clocks = <&prcc_kclk 1 4>, <&prcc_pclk 1 4>;
856 clock-names = "msp", "apb_pclk";
857
743 status = "disabled"; 858 status = "disabled";
744 }; 859 };
745 860
@@ -749,6 +864,10 @@
749 reg = <0x80117000 0x1000>; 864 reg = <0x80117000 0x1000>;
750 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; 865 interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
751 v-ape-supply = <&db8500_vape_reg>; 866 v-ape-supply = <&db8500_vape_reg>;
867
868 clocks = <&prcc_kclk 2 3>, <&prcc_pclk 2 5>;
869 clock-names = "msp", "apb_pclk";
870
752 status = "disabled"; 871 status = "disabled";
753 }; 872 };
754 873
@@ -757,6 +876,10 @@
757 reg = <0x80125000 0x1000>; 876 reg = <0x80125000 0x1000>;
758 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>; 877 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
759 v-ape-supply = <&db8500_vape_reg>; 878 v-ape-supply = <&db8500_vape_reg>;
879
880 clocks = <&prcc_kclk 1 10>, <&prcc_pclk 1 11>;
881 clock-names = "msp", "apb_pclk";
882
760 status = "disabled"; 883 status = "disabled";
761 }; 884 };
762 885
@@ -772,7 +895,7 @@
772 cpufreq-cooling { 895 cpufreq-cooling {
773 compatible = "stericsson,db8500-cpufreq-cooling"; 896 compatible = "stericsson,db8500-cpufreq-cooling";
774 status = "disabled"; 897 status = "disabled";
775 }; 898 };
776 899
777 vmmci: regulator-gpio { 900 vmmci: regulator-gpio {
778 compatible = "regulator-gpio"; 901 compatible = "regulator-gpio";
@@ -797,6 +920,7 @@
797 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; 920 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
798 921
799 v-ape-supply = <&db8500_vape_reg>; 922 v-ape-supply = <&db8500_vape_reg>;
923 clocks = <&prcc_pclk 6 1>;
800 }; 924 };
801 925
802 hash@a03c2000 { 926 hash@a03c2000 {
@@ -804,6 +928,7 @@
804 reg = <0xa03c2000 0x1000>; 928 reg = <0xa03c2000 0x1000>;
805 929
806 v-ape-supply = <&db8500_vape_reg>; 930 v-ape-supply = <&db8500_vape_reg>;
931 clocks = <&prcc_pclk 6 2>;
807 }; 932 };
808 }; 933 };
809}; 934};
diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi
index 370e03f5e7b2..f88a659aea3b 100644
--- a/arch/arm/boot/dts/ste-href.dtsi
+++ b/arch/arm/boot/dts/ste-href.dtsi
@@ -167,88 +167,6 @@
167 }; 167 };
168 168
169 prcmu@80157000 { 169 prcmu@80157000 {
170 db8500-prcmu-regulators {
171 db8500_vape_reg: db8500_vape {
172 regulator-name = "db8500-vape";
173 };
174
175 db8500_varm_reg: db8500_varm {
176 regulator-name = "db8500-varm";
177 };
178
179 db8500_vmodem_reg: db8500_vmodem {
180 regulator-name = "db8500-vmodem";
181 };
182
183 db8500_vpll_reg: db8500_vpll {
184 regulator-name = "db8500-vpll";
185 };
186
187 db8500_vsmps1_reg: db8500_vsmps1 {
188 regulator-name = "db8500-vsmps1";
189 };
190
191 db8500_vsmps2_reg: db8500_vsmps2 {
192 regulator-name = "db8500-vsmps2";
193 };
194
195 db8500_vsmps3_reg: db8500_vsmps3 {
196 regulator-name = "db8500-vsmps3";
197 };
198
199 db8500_vrf1_reg: db8500_vrf1 {
200 regulator-name = "db8500-vrf1";
201 };
202
203 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
204 regulator-name = "db8500-sva-mmdsp";
205 };
206
207 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
208 regulator-name = "db8500-sva-mmdsp-ret";
209 };
210
211 db8500_sva_pipe_reg: db8500_sva_pipe {
212 regulator-name = "db8500_sva_pipe";
213 };
214
215 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
216 regulator-name = "db8500_sia_mmdsp";
217 };
218
219 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
220 regulator-name = "db8500-sia-mmdsp-ret";
221 };
222
223 db8500_sia_pipe_reg: db8500_sia_pipe {
224 regulator-name = "db8500-sia-pipe";
225 };
226
227 db8500_sga_reg: db8500_sga {
228 regulator-name = "db8500-sga";
229 };
230
231 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
232 regulator-name = "db8500-b2r2-mcde";
233 };
234
235 db8500_esram12_reg: db8500_esram12 {
236 regulator-name = "db8500-esram12";
237 };
238
239 db8500_esram12_ret_reg: db8500_esram12_ret {
240 regulator-name = "db8500-esram12-ret";
241 };
242
243 db8500_esram34_reg: db8500_esram34 {
244 regulator-name = "db8500-esram34";
245 };
246
247 db8500_esram34_ret_reg: db8500_esram34_ret {
248 regulator-name = "db8500-esram34-ret";
249 };
250 };
251
252 ab8500 { 170 ab8500 {
253 ab8500-regulators { 171 ab8500-regulators {
254 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { 172 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
diff --git a/arch/arm/boot/dts/ste-hrefv60plus.dts b/arch/arm/boot/dts/ste-hrefv60plus.dts
index 6e52ebbf113f..bb3cfc7280e8 100644
--- a/arch/arm/boot/dts/ste-hrefv60plus.dts
+++ b/arch/arm/boot/dts/ste-hrefv60plus.dts
@@ -74,137 +74,5 @@
74 74
75 status = "okay"; 75 status = "okay";
76 }; 76 };
77
78 prcmu@80157000 {
79 db8500-prcmu-regulators {
80 db8500_vape_reg: db8500_vape {
81 regulator-name = "db8500-vape";
82 };
83
84 db8500_varm_reg: db8500_varm {
85 regulator-name = "db8500-varm";
86 };
87
88 db8500_vmodem_reg: db8500_vmodem {
89 regulator-name = "db8500-vmodem";
90 };
91
92 db8500_vpll_reg: db8500_vpll {
93 regulator-name = "db8500-vpll";
94 };
95
96 db8500_vsmps1_reg: db8500_vsmps1 {
97 regulator-name = "db8500-vsmps1";
98 };
99
100 db8500_vsmps2_reg: db8500_vsmps2 {
101 regulator-name = "db8500-vsmps2";
102 };
103
104 db8500_vsmps3_reg: db8500_vsmps3 {
105 regulator-name = "db8500-vsmps3";
106 };
107
108 db8500_vrf1_reg: db8500_vrf1 {
109 regulator-name = "db8500-vrf1";
110 };
111
112 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
113 regulator-name = "db8500-sva-mmdsp";
114 };
115
116 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
117 regulator-name = "db8500-sva-mmdsp-ret";
118 };
119
120 db8500_sva_pipe_reg: db8500_sva_pipe {
121 regulator-name = "db8500_sva_pipe";
122 };
123
124 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
125 regulator-name = "db8500_sia_mmdsp";
126 };
127
128 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
129 regulator-name = "db8500-sia-mmdsp-ret";
130 };
131
132 db8500_sia_pipe_reg: db8500_sia_pipe {
133 regulator-name = "db8500-sia-pipe";
134 };
135
136 db8500_sga_reg: db8500_sga {
137 regulator-name = "db8500-sga";
138 };
139
140 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
141 regulator-name = "db8500-b2r2-mcde";
142 };
143
144 db8500_esram12_reg: db8500_esram12 {
145 regulator-name = "db8500-esram12";
146 };
147
148 db8500_esram12_ret_reg: db8500_esram12_ret {
149 regulator-name = "db8500-esram12-ret";
150 };
151
152 db8500_esram34_reg: db8500_esram34 {
153 regulator-name = "db8500-esram34";
154 };
155
156 db8500_esram34_ret_reg: db8500_esram34_ret {
157 regulator-name = "db8500-esram34-ret";
158 };
159 };
160
161 ab8500 {
162 ab8500-regulators {
163 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
164 regulator-name = "V-DISPLAY";
165 };
166
167 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
168 regulator-name = "V-eMMC1";
169 };
170
171 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
172 regulator-name = "V-MMC-SD";
173 };
174
175 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
176 regulator-name = "V-INTCORE";
177 };
178
179 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
180 regulator-name = "V-TVOUT";
181 };
182
183 ab8500_ldo_usb_reg: ab8500_ldo_usb {
184 regulator-name = "dummy";
185 };
186
187 ab8500_ldo_audio_reg: ab8500_ldo_audio {
188 regulator-name = "V-AUD";
189 };
190
191 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
192 regulator-name = "V-AMIC1";
193 };
194
195 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
196 regulator-name = "V-AMIC2";
197 };
198
199 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
200 regulator-name = "V-DMIC";
201 };
202
203 ab8500_ldo_ana_reg: ab8500_ldo_ana {
204 regulator-name = "V-CSI/DSI";
205 };
206 };
207 };
208 };
209 }; 77 };
210}; 78};
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index f1fc128e249d..f0b39f835914 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -111,12 +111,13 @@
111 vdd33a-supply = <&en_3v3_reg>; 111 vdd33a-supply = <&en_3v3_reg>;
112 vddvario-supply = <&db8500_vape_reg>; 112 vddvario-supply = <&db8500_vape_reg>;
113 113
114
115 reg-shift = <1>; 114 reg-shift = <1>;
116 reg-io-width = <2>; 115 reg-io-width = <2>;
117 smsc,force-internal-phy; 116 smsc,force-internal-phy;
118 smsc,irq-active-high; 117 smsc,irq-active-high;
119 smsc,irq-push-pull; 118 smsc,irq-push-pull;
119
120 clocks = <&prcc_pclk 3 0>;
120 }; 121 };
121 }; 122 };
122 123
@@ -170,86 +171,8 @@
170 }; 171 };
171 172
172 prcmu@80157000 { 173 prcmu@80157000 {
173 db8500-prcmu-regulators { 174 cpufreq {
174 db8500_vape_reg: db8500_vape { 175 status = "okay";
175 regulator-name = "db8500-vape";
176 };
177
178 db8500_varm_reg: db8500_varm {
179 regulator-name = "db8500-varm";
180 };
181
182 db8500_vmodem_reg: db8500_vmodem {
183 regulator-name = "db8500-vmodem";
184 };
185
186 db8500_vpll_reg: db8500_vpll {
187 regulator-name = "db8500-vpll";
188 };
189
190 db8500_vsmps1_reg: db8500_vsmps1 {
191 regulator-name = "db8500-vsmps1";
192 };
193
194 db8500_vsmps2_reg: db8500_vsmps2 {
195 regulator-name = "db8500-vsmps2";
196 };
197
198 db8500_vsmps3_reg: db8500_vsmps3 {
199 regulator-name = "db8500-vsmps3";
200 };
201
202 db8500_vrf1_reg: db8500_vrf1 {
203 regulator-name = "db8500-vrf1";
204 };
205
206 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
207 regulator-name = "db8500-sva-mmdsp";
208 };
209
210 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
211 regulator-name = "db8500-sva-mmdsp-ret";
212 };
213
214 db8500_sva_pipe_reg: db8500_sva_pipe {
215 regulator-name = "db8500_sva_pipe";
216 };
217
218 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
219 regulator-name = "db8500_sia_mmdsp";
220 };
221
222 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
223 regulator-name = "db8500-sia-mmdsp-ret";
224 };
225
226 db8500_sia_pipe_reg: db8500_sia_pipe {
227 regulator-name = "db8500-sia-pipe";
228 };
229
230 db8500_sga_reg: db8500_sga {
231 regulator-name = "db8500-sga";
232 };
233
234 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
235 regulator-name = "db8500-b2r2-mcde";
236 };
237
238 db8500_esram12_reg: db8500_esram12 {
239 regulator-name = "db8500-esram12";
240 };
241
242 db8500_esram12_ret_reg: db8500_esram12_ret {
243 regulator-name = "db8500-esram12-ret";
244 };
245
246 db8500_esram34_reg: db8500_esram34 {
247 regulator-name = "db8500-esram34";
248 };
249
250 db8500_esram34_ret_reg: db8500_esram34_ret {
251 regulator-name = "db8500-esram34-ret";
252 };
253 }; 176 };
254 177
255 thermal@801573c0 { 178 thermal@801573c0 {
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index fe1f3e26b88b..616b96e86ad4 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -2,14 +2,11 @@
2# Makefile for the linux kernel, U8500 machine. 2# Makefile for the linux kernel, U8500 machine.
3# 3#
4 4
5obj-y := cpu.o devices.o devices-common.o \ 5obj-y := cpu.o devices.o id.o timer.o pm.o
6 id.o usb.o timer.o pm.o
7obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o 6obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
8obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o 7obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
9obj-$(CONFIG_MACH_MOP500) += board-mop500.o board-mop500-sdi.o \ 8obj-$(CONFIG_MACH_MOP500) += board-mop500.o board-mop500-sdi.o \
10 board-mop500-regulators.o \ 9 board-mop500-regulators.o \
11 board-mop500-uib.o board-mop500-stuib.o \
12 board-mop500-u8500uib.o \
13 board-mop500-pins.o \ 10 board-mop500-pins.o \
14 board-mop500-audio.o 11 board-mop500-audio.o
15obj-$(CONFIG_SMP) += platsmp.o headsmp.o 12obj-$(CONFIG_SMP) += platsmp.o headsmp.o
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index ec0807247e60..154e15f59702 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -68,40 +68,6 @@ static struct stedma40_chan_cfg msp2_dma_tx = {
68 .phy_channel = 1, 68 .phy_channel = 1,
69}; 69};
70 70
71static struct platform_device *db8500_add_msp_i2s(struct device *parent,
72 int id,
73 resource_size_t base, int irq,
74 struct msp_i2s_platform_data *pdata)
75{
76 struct platform_device *pdev;
77 struct resource res[] = {
78 DEFINE_RES_MEM(base, SZ_4K),
79 DEFINE_RES_IRQ(irq),
80 };
81
82 pr_info("Register platform-device 'ux500-msp-i2s', id %d, irq %d\n",
83 id, irq);
84 pdev = platform_device_register_resndata(parent, "ux500-msp-i2s", id,
85 res, ARRAY_SIZE(res),
86 pdata, sizeof(*pdata));
87 if (!pdev) {
88 pr_err("Failed to register platform-device 'ux500-msp-i2s.%d'!\n",
89 id);
90 return NULL;
91 }
92
93 return pdev;
94}
95
96/* Platform device for ASoC MOP500 machine */
97static struct platform_device snd_soc_mop500 = {
98 .name = "snd-soc-mop500",
99 .id = 0,
100 .dev = {
101 .platform_data = NULL,
102 },
103};
104
105struct msp_i2s_platform_data msp2_platform_data = { 71struct msp_i2s_platform_data msp2_platform_data = {
106 .id = MSP_I2S_2, 72 .id = MSP_I2S_2,
107 .msp_i2s_dma_rx = &msp2_dma_rx, 73 .msp_i2s_dma_rx = &msp2_dma_rx,
@@ -113,19 +79,3 @@ struct msp_i2s_platform_data msp3_platform_data = {
113 .msp_i2s_dma_rx = &msp1_dma_rx, 79 .msp_i2s_dma_rx = &msp1_dma_rx,
114 .msp_i2s_dma_tx = NULL, 80 .msp_i2s_dma_tx = NULL,
115}; 81};
116
117void mop500_audio_init(struct device *parent)
118{
119 pr_info("%s: Register platform-device 'snd-soc-mop500'.\n", __func__);
120 platform_device_register(&snd_soc_mop500);
121
122 pr_info("Initialize MSP I2S-devices.\n");
123 db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
124 &msp0_platform_data);
125 db8500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1,
126 &msp1_platform_data);
127 db8500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2,
128 &msp2_platform_data);
129 db8500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1,
130 &msp3_platform_data);
131}
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index b3e61a38e5c8..26600a1c5319 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -65,18 +65,6 @@ struct mmci_platform_data mop500_sdi0_data = {
65#endif 65#endif
66}; 66};
67 67
68static void sdi0_configure(struct device *parent)
69{
70 /* Add the device, force v2 to subrevision 1 */
71 db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
72}
73
74void mop500_sdi_tc35892_init(struct device *parent)
75{
76 mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
77 sdi0_configure(parent);
78}
79
80/* 68/*
81 * SDI1 (SDIO WLAN) 69 * SDI1 (SDIO WLAN)
82 */ 70 */
@@ -178,42 +166,3 @@ struct mmci_platform_data mop500_sdi4_data = {
178 .dma_tx_param = &mop500_sdi4_dma_cfg_tx, 166 .dma_tx_param = &mop500_sdi4_dma_cfg_tx,
179#endif 167#endif
180}; 168};
181
182void __init mop500_sdi_init(struct device *parent)
183{
184 /* PoP:ed eMMC */
185 db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
186 /* On-board eMMC */
187 db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
188
189 /*
190 * On boards with the TC35892 GPIO expander, sdi0 will finally
191 * be added when the TC35892 initializes and calls
192 * mop500_sdi_tc35892_init() above.
193 */
194}
195
196void __init snowball_sdi_init(struct device *parent)
197{
198 /* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
199 mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
200 /* On-board eMMC */
201 db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
202 /* External Micro SD slot */
203 mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
204 mop500_sdi0_data.cd_invert = true;
205 sdi0_configure(parent);
206}
207
208void __init hrefv60_sdi_init(struct device *parent)
209{
210 /* PoP:ed eMMC */
211 db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
212 /* On-board eMMC */
213 db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
214 /* External Micro SD slot */
215 mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
216 sdi0_configure(parent);
217 /* WLAN SDIO channel */
218 db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
219}
diff --git a/arch/arm/mach-ux500/board-mop500-stuib.c b/arch/arm/mach-ux500/board-mop500-stuib.c
deleted file mode 100644
index 7e1f294f0434..000000000000
--- a/arch/arm/mach-ux500/board-mop500-stuib.c
+++ /dev/null
@@ -1,120 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL), version 2
5 */
6
7#include <linux/kernel.h>
8#include <linux/init.h>
9#include <linux/mfd/stmpe.h>
10#include <linux/input/bu21013.h>
11#include <linux/gpio.h>
12#include <linux/interrupt.h>
13#include <linux/i2c.h>
14#include <linux/input/matrix_keypad.h>
15#include <asm/mach-types.h>
16
17#include "board-mop500.h"
18
19/* STMPE/SKE keypad use this key layout */
20static const unsigned int mop500_keymap[] = {
21 KEY(2, 5, KEY_END),
22 KEY(4, 1, KEY_POWER),
23 KEY(3, 5, KEY_VOLUMEDOWN),
24 KEY(1, 3, KEY_3),
25 KEY(5, 2, KEY_RIGHT),
26 KEY(5, 0, KEY_9),
27
28 KEY(0, 5, KEY_MENU),
29 KEY(7, 6, KEY_ENTER),
30 KEY(4, 5, KEY_0),
31 KEY(6, 7, KEY_2),
32 KEY(3, 4, KEY_UP),
33 KEY(3, 3, KEY_DOWN),
34
35 KEY(6, 4, KEY_SEND),
36 KEY(6, 2, KEY_BACK),
37 KEY(4, 2, KEY_VOLUMEUP),
38 KEY(5, 5, KEY_1),
39 KEY(4, 3, KEY_LEFT),
40 KEY(3, 2, KEY_7),
41};
42
43static const struct matrix_keymap_data mop500_keymap_data = {
44 .keymap = mop500_keymap,
45 .keymap_size = ARRAY_SIZE(mop500_keymap),
46};
47/*
48 * STMPE1601
49 */
50static struct stmpe_keypad_platform_data stmpe1601_keypad_data = {
51 .debounce_ms = 64,
52 .scan_count = 8,
53 .no_autorepeat = true,
54 .keymap_data = &mop500_keymap_data,
55};
56
57static struct stmpe_platform_data stmpe1601_data = {
58 .id = 1,
59 .blocks = STMPE_BLOCK_KEYPAD,
60 .irq_trigger = IRQF_TRIGGER_FALLING,
61 .irq_base = MOP500_STMPE1601_IRQ(0),
62 .keypad = &stmpe1601_keypad_data,
63 .autosleep = true,
64 .autosleep_timeout = 1024,
65};
66
67static struct i2c_board_info __initdata mop500_i2c0_devices_stuib[] = {
68 {
69 I2C_BOARD_INFO("stmpe1601", 0x40),
70 .irq = NOMADIK_GPIO_TO_IRQ(218),
71 .platform_data = &stmpe1601_data,
72 .flags = I2C_CLIENT_WAKE,
73 },
74};
75
76/*
77 * BU21013 ROHM touchscreen interface on the STUIBs
78 */
79
80#define TOUCH_GPIO_PIN 84
81
82#define TOUCH_XMAX 384
83#define TOUCH_YMAX 704
84
85#define PRCMU_CLOCK_OCR 0x1CC
86#define TSC_EXT_CLOCK_9_6MHZ 0x840000
87
88static struct bu21013_platform_device tsc_plat_device = {
89 .touch_pin = TOUCH_GPIO_PIN,
90 .touch_x_max = TOUCH_XMAX,
91 .touch_y_max = TOUCH_YMAX,
92 .ext_clk = false,
93 .x_flip = false,
94 .y_flip = true,
95};
96
97static struct i2c_board_info __initdata u8500_i2c3_devices_stuib[] = {
98 {
99 I2C_BOARD_INFO("bu21013_tp", 0x5C),
100 .platform_data = &tsc_plat_device,
101 },
102 {
103 I2C_BOARD_INFO("bu21013_tp", 0x5D),
104 .platform_data = &tsc_plat_device,
105 },
106};
107
108void __init mop500_stuib_init(void)
109{
110 if (machine_is_hrefv60())
111 tsc_plat_device.cs_pin = HREFV60_TOUCH_RST_GPIO;
112 else
113 tsc_plat_device.cs_pin = GPIO_BU21013_CS;
114
115 mop500_uib_i2c_add(0, mop500_i2c0_devices_stuib,
116 ARRAY_SIZE(mop500_i2c0_devices_stuib));
117
118 mop500_uib_i2c_add(3, u8500_i2c3_devices_stuib,
119 ARRAY_SIZE(u8500_i2c3_devices_stuib));
120}
diff --git a/arch/arm/mach-ux500/board-mop500-u8500uib.c b/arch/arm/mach-ux500/board-mop500-u8500uib.c
deleted file mode 100644
index d397c19570af..000000000000
--- a/arch/arm/mach-ux500/board-mop500-u8500uib.c
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Board data for the U8500 UIB, also known as the New UIB
5 * License terms: GNU General Public License (GPL), version 2
6 */
7#include <linux/gpio.h>
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/i2c.h>
11#include <linux/interrupt.h>
12#include <linux/mfd/tc3589x.h>
13#include <linux/input/matrix_keypad.h>
14
15#include "irqs.h"
16
17#include "board-mop500.h"
18
19static struct i2c_board_info __initdata mop500_i2c3_devices_u8500[] = {
20 {
21 I2C_BOARD_INFO("synaptics_rmi4_i2c", 0x4B),
22 .irq = NOMADIK_GPIO_TO_IRQ(84),
23 },
24};
25
26/*
27 * TC35893
28 */
29static const unsigned int u8500_keymap[] = {
30 KEY(3, 1, KEY_END),
31 KEY(4, 1, KEY_POWER),
32 KEY(6, 4, KEY_VOLUMEDOWN),
33 KEY(4, 2, KEY_EMAIL),
34 KEY(3, 3, KEY_RIGHT),
35 KEY(2, 5, KEY_BACKSPACE),
36
37 KEY(6, 7, KEY_MENU),
38 KEY(5, 0, KEY_ENTER),
39 KEY(4, 3, KEY_0),
40 KEY(3, 4, KEY_DOT),
41 KEY(5, 2, KEY_UP),
42 KEY(3, 5, KEY_DOWN),
43
44 KEY(4, 5, KEY_SEND),
45 KEY(0, 5, KEY_BACK),
46 KEY(6, 2, KEY_VOLUMEUP),
47 KEY(1, 3, KEY_SPACE),
48 KEY(7, 6, KEY_LEFT),
49 KEY(5, 5, KEY_SEARCH),
50};
51
52static struct matrix_keymap_data u8500_keymap_data = {
53 .keymap = u8500_keymap,
54 .keymap_size = ARRAY_SIZE(u8500_keymap),
55};
56
57static struct tc3589x_keypad_platform_data tc35893_data = {
58 .krow = TC_KPD_ROWS,
59 .kcol = TC_KPD_COLUMNS,
60 .debounce_period = TC_KPD_DEBOUNCE_PERIOD,
61 .settle_time = TC_KPD_SETTLE_TIME,
62 .irqtype = IRQF_TRIGGER_FALLING,
63 .enable_wakeup = true,
64 .keymap_data = &u8500_keymap_data,
65 .no_autorepeat = true,
66};
67
68static struct tc3589x_platform_data tc3589x_keypad_data = {
69 .block = TC3589x_BLOCK_KEYPAD,
70 .keypad = &tc35893_data,
71 .irq_base = MOP500_EGPIO_IRQ_BASE,
72};
73
74static struct i2c_board_info __initdata mop500_i2c0_devices_u8500[] = {
75 {
76 I2C_BOARD_INFO("tc3589x", 0x44),
77 .platform_data = &tc3589x_keypad_data,
78 .irq = NOMADIK_GPIO_TO_IRQ(218),
79 .flags = I2C_CLIENT_WAKE,
80 },
81};
82
83
84void __init mop500_u8500uib_init(void)
85{
86 mop500_uib_i2c_add(3, mop500_i2c3_devices_u8500,
87 ARRAY_SIZE(mop500_i2c3_devices_u8500));
88
89 mop500_uib_i2c_add(0, mop500_i2c0_devices_u8500,
90 ARRAY_SIZE(mop500_i2c0_devices_u8500));
91
92}
diff --git a/arch/arm/mach-ux500/board-mop500-uib.c b/arch/arm/mach-ux500/board-mop500-uib.c
deleted file mode 100644
index bdaa422da028..000000000000
--- a/arch/arm/mach-ux500/board-mop500-uib.c
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL), version 2
6 */
7
8#define pr_fmt(fmt) "mop500-uib: " fmt
9
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/i2c.h>
13
14#include "board-mop500.h"
15#include "id.h"
16
17enum mop500_uib {
18 STUIB,
19 U8500UIB,
20};
21
22struct uib {
23 const char *name;
24 const char *option;
25 void (*init)(void);
26};
27
28static struct uib __initdata mop500_uibs[] = {
29 [STUIB] = {
30 .name = "ST-UIB",
31 .option = "stuib",
32 .init = mop500_stuib_init,
33 },
34 [U8500UIB] = {
35 .name = "U8500-UIB",
36 .option = "u8500uib",
37 .init = mop500_u8500uib_init,
38 },
39};
40
41static struct uib *mop500_uib;
42
43static int __init mop500_uib_setup(char *str)
44{
45 int i;
46
47 for (i = 0; i < ARRAY_SIZE(mop500_uibs); i++) {
48 struct uib *uib = &mop500_uibs[i];
49
50 if (!strcmp(str, uib->option)) {
51 mop500_uib = uib;
52 break;
53 }
54 }
55
56 if (i == ARRAY_SIZE(mop500_uibs))
57 pr_err("invalid uib= option (%s)\n", str);
58
59 return 1;
60}
61__setup("uib=", mop500_uib_setup);
62
63/*
64 * The UIBs are detected after the I2C host controllers are registered, so
65 * i2c_register_board_info() can't be used.
66 */
67void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
68 unsigned n)
69{
70 struct i2c_adapter *adap;
71 struct i2c_client *client;
72 int i;
73
74 adap = i2c_get_adapter(busnum);
75 if (!adap) {
76 pr_err("failed to get adapter i2c%d\n", busnum);
77 return;
78 }
79
80 for (i = 0; i < n; i++) {
81 client = i2c_new_device(adap, &info[i]);
82 if (!client)
83 pr_err("failed to register %s to i2c%d\n",
84 info[i].type, busnum);
85 }
86
87 i2c_put_adapter(adap);
88}
89
90static void __init __mop500_uib_init(struct uib *uib, const char *why)
91{
92 pr_info("%s (%s)\n", uib->name, why);
93 uib->init();
94}
95
96/*
97 * Detect the UIB attached based on the presence or absence of i2c devices.
98 */
99int __init mop500_uib_init(void)
100{
101 struct uib *uib = mop500_uib;
102 struct i2c_adapter *i2c0;
103 int ret;
104
105 if (!cpu_is_u8500_family())
106 return -ENODEV;
107
108 if (uib) {
109 __mop500_uib_init(uib, "from uib= boot argument");
110 return 0;
111 }
112
113 i2c0 = i2c_get_adapter(0);
114 if (!i2c0) {
115 __mop500_uib_init(&mop500_uibs[STUIB],
116 "fallback, could not get i2c0");
117 return -ENODEV;
118 }
119
120 /* U8500-UIB has the TC35893 at 0x44 on I2C0, the ST-UIB doesn't. */
121 ret = i2c_smbus_xfer(i2c0, 0x44, 0, I2C_SMBUS_WRITE, 0,
122 I2C_SMBUS_QUICK, NULL);
123 i2c_put_adapter(i2c0);
124
125 if (ret == 0)
126 uib = &mop500_uibs[U8500UIB];
127 else
128 uib = &mop500_uibs[STUIB];
129
130 __mop500_uib_init(uib, "detected");
131
132 return 0;
133}
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index ad0806eff762..514d40b625a4 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -14,27 +14,16 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/i2c.h>
18#include <linux/platform_data/i2c-nomadik.h>
19#include <linux/platform_data/db8500_thermal.h> 17#include <linux/platform_data/db8500_thermal.h>
20#include <linux/gpio.h>
21#include <linux/amba/bus.h> 18#include <linux/amba/bus.h>
22#include <linux/amba/pl022.h> 19#include <linux/amba/pl022.h>
23#include <linux/amba/serial.h>
24#include <linux/spi/spi.h>
25#include <linux/mfd/abx500/ab8500.h> 20#include <linux/mfd/abx500/ab8500.h>
26#include <linux/regulator/ab8500.h> 21#include <linux/regulator/ab8500.h>
27#include <linux/regulator/fixed.h> 22#include <linux/regulator/fixed.h>
28#include <linux/regulator/driver.h> 23#include <linux/regulator/driver.h>
29#include <linux/regulator/gpio-regulator.h>
30#include <linux/mfd/tc3589x.h>
31#include <linux/mfd/tps6105x.h> 24#include <linux/mfd/tps6105x.h>
32#include <linux/mfd/abx500/ab8500-gpio.h>
33#include <linux/mfd/abx500/ab8500-codec.h>
34#include <linux/platform_data/leds-lp55xx.h> 25#include <linux/platform_data/leds-lp55xx.h>
35#include <linux/input.h> 26#include <linux/input.h>
36#include <linux/smsc911x.h>
37#include <linux/gpio_keys.h>
38#include <linux/delay.h> 27#include <linux/delay.h>
39#include <linux/leds.h> 28#include <linux/leds.h>
40#include <linux/pinctrl/consumer.h> 29#include <linux/pinctrl/consumer.h>
@@ -46,7 +35,6 @@
46#include "setup.h" 35#include "setup.h"
47#include "devices.h" 36#include "devices.h"
48#include "irqs.h" 37#include "irqs.h"
49#include <linux/platform_data/crypto-ux500.h>
50 38
51#include "ste-dma40-db8500.h" 39#include "ste-dma40-db8500.h"
52#include "db8500-regs.h" 40#include "db8500-regs.h"
@@ -54,401 +42,9 @@
54#include "board-mop500.h" 42#include "board-mop500.h"
55#include "board-mop500-regulators.h" 43#include "board-mop500-regulators.h"
56 44
57static struct gpio_led snowball_led_array[] = {
58 {
59 .name = "user_led",
60 .default_trigger = "heartbeat",
61 .gpio = 142,
62 },
63};
64
65static struct gpio_led_platform_data snowball_led_data = {
66 .leds = snowball_led_array,
67 .num_leds = ARRAY_SIZE(snowball_led_array),
68};
69
70static struct platform_device snowball_led_dev = {
71 .name = "leds-gpio",
72 .dev = {
73 .platform_data = &snowball_led_data,
74 },
75};
76
77static struct fixed_voltage_config snowball_gpio_en_3v3_data = {
78 .supply_name = "EN-3V3",
79 .gpio = SNOWBALL_EN_3V3_ETH_GPIO,
80 .microvolts = 3300000,
81 .enable_high = 1,
82 .init_data = &gpio_en_3v3_regulator,
83 .startup_delay = 5000, /* 1200us */
84};
85
86static struct platform_device snowball_gpio_en_3v3_regulator_dev = {
87 .name = "reg-fixed-voltage",
88 .id = 1,
89 .dev = {
90 .platform_data = &snowball_gpio_en_3v3_data,
91 },
92};
93
94/* Dynamically populated. */
95static struct gpio sdi0_reg_gpios[] = {
96 { 0, GPIOF_OUT_INIT_LOW, "mmci_vsel" },
97};
98
99static struct gpio_regulator_state sdi0_reg_states[] = {
100 { .value = 2900000, .gpios = (0 << 0) },
101 { .value = 1800000, .gpios = (1 << 0) },
102};
103
104static struct gpio_regulator_config sdi0_reg_info = {
105 .supply_name = "ext-mmc-level-shifter",
106 .gpios = sdi0_reg_gpios,
107 .nr_gpios = ARRAY_SIZE(sdi0_reg_gpios),
108 .states = sdi0_reg_states,
109 .nr_states = ARRAY_SIZE(sdi0_reg_states),
110 .type = REGULATOR_VOLTAGE,
111 .enable_high = 1,
112 .enabled_at_boot = 0,
113 .init_data = &sdi0_reg_init_data,
114 .startup_delay = 100,
115};
116
117static struct platform_device sdi0_regulator = {
118 .name = "gpio-regulator",
119 .id = -1,
120 .dev = {
121 .platform_data = &sdi0_reg_info,
122 },
123};
124
125static struct abx500_gpio_platform_data ab8500_gpio_pdata = {
126 .gpio_base = MOP500_AB8500_PIN_GPIO(1),
127};
128
129/* ab8500-codec */
130static struct ab8500_codec_platform_data ab8500_codec_pdata = {
131 .amics = {
132 .mic1_type = AMIC_TYPE_DIFFERENTIAL,
133 .mic2_type = AMIC_TYPE_DIFFERENTIAL,
134 .mic1a_micbias = AMIC_MICBIAS_VAMIC1,
135 .mic1b_micbias = AMIC_MICBIAS_VAMIC1,
136 .mic2_micbias = AMIC_MICBIAS_VAMIC2
137 },
138 .ear_cmv = EAR_CMV_0_95V
139};
140
141static struct gpio_keys_button snowball_key_array[] = {
142 {
143 .gpio = 32,
144 .type = EV_KEY,
145 .code = KEY_1,
146 .desc = "userpb",
147 .active_low = 1,
148 .debounce_interval = 50,
149 .wakeup = 1,
150 },
151 {
152 .gpio = 151,
153 .type = EV_KEY,
154 .code = KEY_2,
155 .desc = "extkb1",
156 .active_low = 1,
157 .debounce_interval = 50,
158 .wakeup = 1,
159 },
160 {
161 .gpio = 152,
162 .type = EV_KEY,
163 .code = KEY_3,
164 .desc = "extkb2",
165 .active_low = 1,
166 .debounce_interval = 50,
167 .wakeup = 1,
168 },
169 {
170 .gpio = 161,
171 .type = EV_KEY,
172 .code = KEY_4,
173 .desc = "extkb3",
174 .active_low = 1,
175 .debounce_interval = 50,
176 .wakeup = 1,
177 },
178 {
179 .gpio = 162,
180 .type = EV_KEY,
181 .code = KEY_5,
182 .desc = "extkb4",
183 .active_low = 1,
184 .debounce_interval = 50,
185 .wakeup = 1,
186 },
187};
188
189static struct gpio_keys_platform_data snowball_key_data = {
190 .buttons = snowball_key_array,
191 .nbuttons = ARRAY_SIZE(snowball_key_array),
192};
193
194static struct platform_device snowball_key_dev = {
195 .name = "gpio-keys",
196 .id = -1,
197 .dev = {
198 .platform_data = &snowball_key_data,
199 }
200};
201
202static struct smsc911x_platform_config snowball_sbnet_cfg = {
203 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
204 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
205 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
206 .shift = 1,
207};
208
209static struct resource sbnet_res[] = {
210 {
211 .name = "smsc911x-memory",
212 .start = (0x5000 << 16),
213 .end = (0x5000 << 16) + 0xffff,
214 .flags = IORESOURCE_MEM,
215 },
216 {
217 .start = NOMADIK_GPIO_TO_IRQ(140),
218 .end = NOMADIK_GPIO_TO_IRQ(140),
219 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
220 },
221};
222
223static struct platform_device snowball_sbnet_dev = {
224 .name = "smsc911x",
225 .num_resources = ARRAY_SIZE(sbnet_res),
226 .resource = sbnet_res,
227 .dev = {
228 .platform_data = &snowball_sbnet_cfg,
229 },
230};
231
232struct ab8500_platform_data ab8500_platdata = { 45struct ab8500_platform_data ab8500_platdata = {
233 .irq_base = MOP500_AB8500_IRQ_BASE, 46 .irq_base = MOP500_AB8500_IRQ_BASE,
234 .regulator = &ab8500_regulator_plat_data, 47 .regulator = &ab8500_regulator_plat_data,
235 .gpio = &ab8500_gpio_pdata,
236 .codec = &ab8500_codec_pdata,
237};
238
239static struct platform_device u8500_cpufreq_cooling_device = {
240 .name = "db8500-cpufreq-cooling",
241};
242
243/*
244 * TPS61052
245 */
246
247static struct tps6105x_platform_data mop500_tps61052_data = {
248 .mode = TPS6105X_MODE_VOLTAGE,
249 .regulator_data = &tps61052_regulator,
250};
251
252/*
253 * TC35892
254 */
255
256static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
257{
258 struct device *parent = NULL;
259#if 0
260 /* FIXME: Is the sdi actually part of tc3589x? */
261 parent = tc3589x->dev;
262#endif
263 mop500_sdi_tc35892_init(parent);
264}
265
266static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
267 .gpio_base = MOP500_EGPIO(0),
268 .setup = mop500_tc35892_init,
269};
270
271static struct tc3589x_platform_data mop500_tc35892_data = {
272 .block = TC3589x_BLOCK_GPIO,
273 .gpio = &mop500_tc35892_gpio_data,
274 .irq_base = MOP500_EGPIO_IRQ_BASE,
275};
276
277static struct lp55xx_led_config lp5521_pri_led[] = {
278 [0] = {
279 .chan_nr = 0,
280 .led_current = 0x2f,
281 .max_current = 0x5f,
282 },
283 [1] = {
284 .chan_nr = 1,
285 .led_current = 0x2f,
286 .max_current = 0x5f,
287 },
288 [2] = {
289 .chan_nr = 2,
290 .led_current = 0x2f,
291 .max_current = 0x5f,
292 },
293};
294
295static struct lp55xx_platform_data __initdata lp5521_pri_data = {
296 .label = "lp5521_pri",
297 .led_config = &lp5521_pri_led[0],
298 .num_channels = 3,
299 .clock_mode = LP55XX_CLOCK_EXT,
300};
301
302static struct lp55xx_led_config lp5521_sec_led[] = {
303 [0] = {
304 .chan_nr = 0,
305 .led_current = 0x2f,
306 .max_current = 0x5f,
307 },
308 [1] = {
309 .chan_nr = 1,
310 .led_current = 0x2f,
311 .max_current = 0x5f,
312 },
313 [2] = {
314 .chan_nr = 2,
315 .led_current = 0x2f,
316 .max_current = 0x5f,
317 },
318};
319
320static struct lp55xx_platform_data __initdata lp5521_sec_data = {
321 .label = "lp5521_sec",
322 .led_config = &lp5521_sec_led[0],
323 .num_channels = 3,
324 .clock_mode = LP55XX_CLOCK_EXT,
325};
326
327/* I2C0 devices only available on the first HREF/MOP500 */
328static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
329 {
330 I2C_BOARD_INFO("tc3589x", 0x42),
331 .irq = NOMADIK_GPIO_TO_IRQ(217),
332 .platform_data = &mop500_tc35892_data,
333 },
334 {
335 I2C_BOARD_INFO("tps61052", 0x33),
336 .platform_data = &mop500_tps61052_data,
337 },
338};
339
340static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
341 {
342 /* lp5521 LED driver, 1st device */
343 I2C_BOARD_INFO("lp5521", 0x33),
344 .platform_data = &lp5521_pri_data,
345 },
346 {
347 /* lp5521 LED driver, 2st device */
348 I2C_BOARD_INFO("lp5521", 0x34),
349 .platform_data = &lp5521_sec_data,
350 },
351 {
352 /* Light sensor Rohm BH1780GLI */
353 I2C_BOARD_INFO("bh1780", 0x29),
354 },
355};
356
357static int __init mop500_i2c_board_init(void)
358{
359 if (machine_is_u8500())
360 mop500_uib_i2c_add(0, mop500_i2c0_devices,
361 ARRAY_SIZE(mop500_i2c0_devices));
362 mop500_uib_i2c_add(2, mop500_i2c2_devices,
363 ARRAY_SIZE(mop500_i2c2_devices));
364 return 0;
365}
366device_initcall(mop500_i2c_board_init);
367
368static void __init mop500_i2c_init(struct device *parent)
369{
370 db8500_add_i2c0(parent, NULL);
371 db8500_add_i2c1(parent, NULL);
372 db8500_add_i2c2(parent, NULL);
373 db8500_add_i2c3(parent, NULL);
374}
375
376static struct gpio_keys_button mop500_gpio_keys[] = {
377 {
378 .desc = "SFH7741 Proximity Sensor",
379 .type = EV_SW,
380 .code = SW_FRONT_PROXIMITY,
381 .active_low = 0,
382 .can_disable = 1,
383 }
384};
385
386static struct regulator *prox_regulator;
387static int mop500_prox_activate(struct device *dev);
388static void mop500_prox_deactivate(struct device *dev);
389
390static struct gpio_keys_platform_data mop500_gpio_keys_data = {
391 .buttons = mop500_gpio_keys,
392 .nbuttons = ARRAY_SIZE(mop500_gpio_keys),
393 .enable = mop500_prox_activate,
394 .disable = mop500_prox_deactivate,
395};
396
397static struct platform_device mop500_gpio_keys_device = {
398 .name = "gpio-keys",
399 .id = 0,
400 .dev = {
401 .platform_data = &mop500_gpio_keys_data,
402 },
403};
404
405static int mop500_prox_activate(struct device *dev)
406{
407 prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
408 "vcc");
409 if (IS_ERR(prox_regulator)) {
410 dev_err(&mop500_gpio_keys_device.dev,
411 "no regulator\n");
412 return PTR_ERR(prox_regulator);
413 }
414
415 return regulator_enable(prox_regulator);
416}
417
418static void mop500_prox_deactivate(struct device *dev)
419{
420 regulator_disable(prox_regulator);
421 regulator_put(prox_regulator);
422}
423
424static struct cryp_platform_data u8500_cryp1_platform_data = {
425 .mem_to_engine = {
426 .dir = DMA_MEM_TO_DEV,
427 .dev_type = DB8500_DMA_DEV48_CAC1,
428 .mode = STEDMA40_MODE_LOGICAL,
429 },
430 .engine_to_mem = {
431 .dir = DMA_DEV_TO_MEM,
432 .dev_type = DB8500_DMA_DEV48_CAC1,
433 .mode = STEDMA40_MODE_LOGICAL,
434 }
435};
436
437static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {
438 .dir = DMA_MEM_TO_DEV,
439 .dev_type = DB8500_DMA_DEV50_HAC1_TX,
440 .mode = STEDMA40_MODE_LOGICAL,
441};
442
443static struct hash_platform_data u8500_hash1_platform_data = {
444 .mem_to_engine = &u8500_hash_dma_cfg_tx,
445 .dma_filter = stedma40_filter,
446};
447
448/* add any platform devices here - TODO */
449static struct platform_device *mop500_platform_devs[] __initdata = {
450 &mop500_gpio_keys_device,
451 &sdi0_regulator,
452}; 48};
453 49
454#ifdef CONFIG_STE_DMA40 50#ifdef CONFIG_STE_DMA40
@@ -480,236 +76,3 @@ struct pl022_ssp_controller ssp0_plat = {
480 */ 76 */
481 .num_chipselect = 5, 77 .num_chipselect = 5,
482}; 78};
483
484static void __init mop500_spi_init(struct device *parent)
485{
486 db8500_add_ssp0(parent, &ssp0_plat);
487}
488
489#ifdef CONFIG_STE_DMA40
490static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
491 .mode = STEDMA40_MODE_LOGICAL,
492 .dir = DMA_DEV_TO_MEM,
493 .dev_type = DB8500_DMA_DEV13_UART0,
494};
495
496static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
497 .mode = STEDMA40_MODE_LOGICAL,
498 .dir = DMA_MEM_TO_DEV,
499 .dev_type = DB8500_DMA_DEV13_UART0,
500};
501
502static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
503 .mode = STEDMA40_MODE_LOGICAL,
504 .dir = DMA_DEV_TO_MEM,
505 .dev_type = DB8500_DMA_DEV12_UART1,
506};
507
508static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
509 .mode = STEDMA40_MODE_LOGICAL,
510 .dir = DMA_MEM_TO_DEV,
511 .dev_type = DB8500_DMA_DEV12_UART1,
512};
513
514static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
515 .mode = STEDMA40_MODE_LOGICAL,
516 .dir = DMA_DEV_TO_MEM,
517 .dev_type = DB8500_DMA_DEV11_UART2,
518};
519
520static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
521 .mode = STEDMA40_MODE_LOGICAL,
522 .dir = DMA_MEM_TO_DEV,
523 .dev_type = DB8500_DMA_DEV11_UART2,
524};
525#endif
526
527struct amba_pl011_data uart0_plat = {
528#ifdef CONFIG_STE_DMA40
529 .dma_filter = stedma40_filter,
530 .dma_rx_param = &uart0_dma_cfg_rx,
531 .dma_tx_param = &uart0_dma_cfg_tx,
532#endif
533};
534
535struct amba_pl011_data uart1_plat = {
536#ifdef CONFIG_STE_DMA40
537 .dma_filter = stedma40_filter,
538 .dma_rx_param = &uart1_dma_cfg_rx,
539 .dma_tx_param = &uart1_dma_cfg_tx,
540#endif
541};
542
543struct amba_pl011_data uart2_plat = {
544#ifdef CONFIG_STE_DMA40
545 .dma_filter = stedma40_filter,
546 .dma_rx_param = &uart2_dma_cfg_rx,
547 .dma_tx_param = &uart2_dma_cfg_tx,
548#endif
549};
550
551static void __init mop500_uart_init(struct device *parent)
552{
553 db8500_add_uart0(parent, &uart0_plat);
554 db8500_add_uart1(parent, &uart1_plat);
555 db8500_add_uart2(parent, &uart2_plat);
556}
557
558static void __init u8500_cryp1_hash1_init(struct device *parent)
559{
560 db8500_add_cryp1(parent, &u8500_cryp1_platform_data);
561 db8500_add_hash1(parent, &u8500_hash1_platform_data);
562}
563
564static struct platform_device *snowball_platform_devs[] __initdata = {
565 &snowball_led_dev,
566 &snowball_key_dev,
567 &snowball_sbnet_dev,
568 &snowball_gpio_en_3v3_regulator_dev,
569 &u8500_cpufreq_cooling_device,
570 &sdi0_regulator,
571};
572
573static void __init mop500_init_machine(void)
574{
575 struct device *parent = NULL;
576 int i;
577
578 platform_device_register(&db8500_prcmu_device);
579 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
580
581 sdi0_reg_info.enable_gpio = GPIO_SDMMC_EN;
582 sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL;
583
584 mop500_pinmaps_init();
585 parent = u8500_init_devices();
586
587 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
588 mop500_platform_devs[i]->dev.parent = parent;
589
590 platform_add_devices(mop500_platform_devs,
591 ARRAY_SIZE(mop500_platform_devs));
592
593 mop500_i2c_init(parent);
594 mop500_sdi_init(parent);
595 mop500_spi_init(parent);
596 mop500_audio_init(parent);
597 mop500_uart_init(parent);
598 u8500_cryp1_hash1_init(parent);
599
600 /* This board has full regulator constraints */
601 regulator_has_full_constraints();
602}
603
604
605static void __init snowball_init_machine(void)
606{
607 struct device *parent = NULL;
608 int i;
609
610 platform_device_register(&db8500_prcmu_device);
611
612 sdi0_reg_info.enable_gpio = SNOWBALL_SDMMC_EN_GPIO;
613 sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO;
614
615 snowball_pinmaps_init();
616 parent = u8500_init_devices();
617
618 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
619 snowball_platform_devs[i]->dev.parent = parent;
620
621 platform_add_devices(snowball_platform_devs,
622 ARRAY_SIZE(snowball_platform_devs));
623
624 mop500_i2c_init(parent);
625 snowball_sdi_init(parent);
626 mop500_spi_init(parent);
627 mop500_audio_init(parent);
628 mop500_uart_init(parent);
629
630 u8500_cryp1_hash1_init(parent);
631
632 /* This board has full regulator constraints */
633 regulator_has_full_constraints();
634}
635
636static void __init hrefv60_init_machine(void)
637{
638 struct device *parent = NULL;
639 int i;
640
641 platform_device_register(&db8500_prcmu_device);
642 /*
643 * The HREFv60 board removed a GPIO expander and routed
644 * all these GPIO pins to the internal GPIO controller
645 * instead.
646 */
647 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
648
649 sdi0_reg_info.enable_gpio = HREFV60_SDMMC_EN_GPIO;
650 sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO;
651
652 hrefv60_pinmaps_init();
653 parent = u8500_init_devices();
654
655 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
656 mop500_platform_devs[i]->dev.parent = parent;
657
658 platform_add_devices(mop500_platform_devs,
659 ARRAY_SIZE(mop500_platform_devs));
660
661 mop500_i2c_init(parent);
662 hrefv60_sdi_init(parent);
663 mop500_spi_init(parent);
664 mop500_audio_init(parent);
665 mop500_uart_init(parent);
666
667 /* This board has full regulator constraints */
668 regulator_has_full_constraints();
669}
670
671MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
672 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
673 .atag_offset = 0x100,
674 .smp = smp_ops(ux500_smp_ops),
675 .map_io = u8500_map_io,
676 .init_irq = ux500_init_irq,
677 /* we re-use nomadik timer here */
678 .init_time = ux500_timer_init,
679 .init_machine = mop500_init_machine,
680 .init_late = ux500_init_late,
681 .restart = ux500_restart,
682MACHINE_END
683
684MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
685 .atag_offset = 0x100,
686 .map_io = u8500_map_io,
687 .init_irq = ux500_init_irq,
688 .init_time = ux500_timer_init,
689 .init_machine = mop500_init_machine,
690 .init_late = ux500_init_late,
691 .restart = ux500_restart,
692MACHINE_END
693
694MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
695 .atag_offset = 0x100,
696 .smp = smp_ops(ux500_smp_ops),
697 .map_io = u8500_map_io,
698 .init_irq = ux500_init_irq,
699 .init_time = ux500_timer_init,
700 .init_machine = hrefv60_init_machine,
701 .init_late = ux500_init_late,
702 .restart = ux500_restart,
703MACHINE_END
704
705MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
706 .atag_offset = 0x100,
707 .smp = smp_ops(ux500_smp_ops),
708 .map_io = u8500_map_io,
709 .init_irq = ux500_init_irq,
710 /* we re-use nomadik timer here */
711 .init_time = ux500_timer_init,
712 .init_machine = snowball_init_machine,
713 .init_late = NULL,
714 .restart = ux500_restart,
715MACHINE_END
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index d6fab166cbf1..511d6febbe99 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -79,7 +79,6 @@
79#define SNOWBALL_EN_3V3_ETH_GPIO MOP500_AB8500_PIN_GPIO(26) /* GPIO26 */ 79#define SNOWBALL_EN_3V3_ETH_GPIO MOP500_AB8500_PIN_GPIO(26) /* GPIO26 */
80 80
81struct device; 81struct device;
82struct i2c_board_info;
83extern struct mmci_platform_data mop500_sdi0_data; 82extern struct mmci_platform_data mop500_sdi0_data;
84extern struct mmci_platform_data mop500_sdi1_data; 83extern struct mmci_platform_data mop500_sdi1_data;
85extern struct mmci_platform_data mop500_sdi2_data; 84extern struct mmci_platform_data mop500_sdi2_data;
@@ -88,25 +87,10 @@ extern struct msp_i2s_platform_data msp0_platform_data;
88extern struct msp_i2s_platform_data msp1_platform_data; 87extern struct msp_i2s_platform_data msp1_platform_data;
89extern struct msp_i2s_platform_data msp2_platform_data; 88extern struct msp_i2s_platform_data msp2_platform_data;
90extern struct msp_i2s_platform_data msp3_platform_data; 89extern struct msp_i2s_platform_data msp3_platform_data;
91extern struct arm_pmu_platdata db8500_pmu_platdata;
92extern struct amba_pl011_data uart0_plat;
93extern struct amba_pl011_data uart1_plat;
94extern struct amba_pl011_data uart2_plat;
95extern struct pl022_ssp_controller ssp0_plat; 90extern struct pl022_ssp_controller ssp0_plat;
96extern struct stedma40_platform_data dma40_plat_data;
97 91
98extern void mop500_sdi_init(struct device *parent);
99extern void snowball_sdi_init(struct device *parent);
100extern void hrefv60_sdi_init(struct device *parent);
101extern void mop500_sdi_tc35892_init(struct device *parent);
102void __init mop500_u8500uib_init(void);
103void __init mop500_stuib_init(void);
104void __init mop500_pinmaps_init(void); 92void __init mop500_pinmaps_init(void);
105void __init snowball_pinmaps_init(void); 93void __init snowball_pinmaps_init(void);
106void __init hrefv60_pinmaps_init(void); 94void __init hrefv60_pinmaps_init(void);
107void mop500_audio_init(struct device *parent);
108 95
109int __init mop500_uib_init(void);
110void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
111 unsigned n);
112#endif 96#endif
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 301c3460d96a..2e85c1e72535 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -32,7 +32,6 @@
32#include "irqs.h" 32#include "irqs.h"
33 33
34#include "devices-db8500.h" 34#include "devices-db8500.h"
35#include "ste-dma40-db8500.h"
36#include "db8500-regs.h" 35#include "db8500-regs.h"
37#include "board-mop500.h" 36#include "board-mop500.h"
38#include "id.h" 37#include "id.h"
@@ -93,14 +92,6 @@ void __init u8500_map_io(void)
93 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 92 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
94} 93}
95 94
96static struct resource db8500_pmu_resources[] = {
97 [0] = {
98 .start = IRQ_DB8500_PMU,
99 .end = IRQ_DB8500_PMU,
100 .flags = IORESOURCE_IRQ,
101 },
102};
103
104/* 95/*
105 * The PMU IRQ lines of two cores are wired together into a single interrupt. 96 * The PMU IRQ lines of two cores are wired together into a single interrupt.
106 * Bounce the interrupt to the other core if it's not ours. 97 * Bounce the interrupt to the other core if it's not ours.
@@ -125,54 +116,6 @@ struct arm_pmu_platdata db8500_pmu_platdata = {
125 .handle_irq = db8500_pmu_handler, 116 .handle_irq = db8500_pmu_handler,
126}; 117};
127 118
128static struct platform_device db8500_pmu_device = {
129 .name = "arm-pmu",
130 .id = -1,
131 .num_resources = ARRAY_SIZE(db8500_pmu_resources),
132 .resource = db8500_pmu_resources,
133 .dev.platform_data = &db8500_pmu_platdata,
134};
135
136static struct platform_device *platform_devs[] __initdata = {
137 &u8500_dma40_device,
138 &db8500_pmu_device,
139};
140
141static resource_size_t __initdata db8500_gpio_base[] = {
142 U8500_GPIOBANK0_BASE,
143 U8500_GPIOBANK1_BASE,
144 U8500_GPIOBANK2_BASE,
145 U8500_GPIOBANK3_BASE,
146 U8500_GPIOBANK4_BASE,
147 U8500_GPIOBANK5_BASE,
148 U8500_GPIOBANK6_BASE,
149 U8500_GPIOBANK7_BASE,
150 U8500_GPIOBANK8_BASE,
151};
152
153static void __init db8500_add_gpios(struct device *parent)
154{
155 struct nmk_gpio_platform_data pdata = {
156 .supports_sleepmode = true,
157 };
158
159 dbx500_add_gpios(parent, db8500_gpio_base,
160 ARRAY_SIZE(db8500_gpio_base),
161 IRQ_DB8500_GPIO0, &pdata);
162 dbx500_add_pinctrl(parent, "pinctrl-db8500", U8500_PRCMU_BASE);
163}
164
165static int usb_db8500_dma_cfg[] = {
166 DB8500_DMA_DEV38_USB_OTG_IEP_AND_OEP_1_9,
167 DB8500_DMA_DEV37_USB_OTG_IEP_AND_OEP_2_10,
168 DB8500_DMA_DEV36_USB_OTG_IEP_AND_OEP_3_11,
169 DB8500_DMA_DEV19_USB_OTG_IEP_AND_OEP_4_12,
170 DB8500_DMA_DEV18_USB_OTG_IEP_AND_OEP_5_13,
171 DB8500_DMA_DEV17_USB_OTG_IEP_AND_OEP_6_14,
172 DB8500_DMA_DEV16_USB_OTG_IEP_AND_OEP_7_15,
173 DB8500_DMA_DEV39_USB_OTG_IEP_AND_OEP_8
174};
175
176static const char *db8500_read_soc_id(void) 119static const char *db8500_read_soc_id(void)
177{ 120{
178 void __iomem *uid = __io_address(U8500_BB_UID_BASE); 121 void __iomem *uid = __io_address(U8500_BB_UID_BASE);
@@ -192,60 +135,22 @@ static struct device * __init db8500_soc_device_init(void)
192 return ux500_soc_device_init(soc_id); 135 return ux500_soc_device_init(soc_id);
193} 136}
194 137
195/*
196 * This function is called from the board init
197 */
198struct device * __init u8500_init_devices(void)
199{
200 struct device *parent;
201 int i;
202
203 parent = db8500_soc_device_init();
204
205 db8500_add_rtc(parent);
206 db8500_add_gpios(parent);
207 db8500_add_usb(parent, usb_db8500_dma_cfg, usb_db8500_dma_cfg);
208
209 for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
210 platform_devs[i]->dev.parent = parent;
211
212 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
213
214 return parent;
215}
216
217#ifdef CONFIG_MACH_UX500_DT 138#ifdef CONFIG_MACH_UX500_DT
218static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 139static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
219 /* Requires call-back bindings. */ 140 /* Requires call-back bindings. */
220 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 141 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
221 /* Requires DMA bindings. */ 142 /* Requires DMA bindings. */
222 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", NULL), 143 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
223 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL), 144 "ux500-msp-i2s.0", &msp0_platform_data),
224 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL), 145 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
225 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), 146 "ux500-msp-i2s.1", &msp1_platform_data),
226 OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", NULL), 147 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
227 OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", NULL), 148 "ux500-msp-i2s.2", &msp2_platform_data),
228 OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", NULL), 149 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
229 OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", NULL), 150 "ux500-msp-i2s.3", &msp3_platform_data),
230 /* Requires clock name bindings. */ 151 /* Requires non-DT:able platform data. */
231 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
232 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
233 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
234 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
235 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
236 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
237 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
238 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
239 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
240 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80004000, "nmk-i2c.0", NULL),
241 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80122000, "nmk-i2c.1", NULL),
242 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
243 OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
244 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
245 OF_DEV_AUXDATA("stericsson,db8500-musb", 0xa03e0000, "musb-ux500.0", NULL),
246 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", 152 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
247 &db8500_prcmu_pdata), 153 &db8500_prcmu_pdata),
248 OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x.0", NULL),
249 OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL), 154 OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
250 OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL), 155 OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
251 OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0", 156 OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
@@ -253,17 +158,6 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
253 /* Requires device name bindings. */ 158 /* Requires device name bindings. */
254 OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE, 159 OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE,
255 "pinctrl-db8500", NULL), 160 "pinctrl-db8500", NULL),
256 /* Requires clock name and DMA bindings. */
257 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
258 "ux500-msp-i2s.0", &msp0_platform_data),
259 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
260 "ux500-msp-i2s.1", &msp1_platform_data),
261 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
262 "ux500-msp-i2s.2", &msp2_platform_data),
263 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
264 "ux500-msp-i2s.3", &msp3_platform_data),
265 /* Requires clock name bindings and channel address lookup table. */
266 OF_DEV_AUXDATA("stericsson,db8500-dma40", 0x801C0000, "dma40.0", NULL),
267 {}, 161 {},
268}; 162};
269 163
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 5d7eebcabc63..f84d4397896b 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -78,9 +78,17 @@ void __init ux500_init_irq(void)
78 if (cpu_is_u8500_family()) { 78 if (cpu_is_u8500_family()) {
79 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); 79 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
80 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); 80 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
81 u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, 81
82 U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, 82 if (of_have_populated_dt())
83 U8500_CLKRST6_BASE); 83 u8500_of_clk_init(U8500_CLKRST1_BASE,
84 U8500_CLKRST2_BASE,
85 U8500_CLKRST3_BASE,
86 U8500_CLKRST5_BASE,
87 U8500_CLKRST6_BASE);
88 else
89 u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
90 U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
91 U8500_CLKRST6_BASE);
84 } else if (cpu_is_u9540()) { 92 } else if (cpu_is_u9540()) {
85 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); 93 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
86 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); 94 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
@@ -96,11 +104,6 @@ void __init ux500_init_irq(void)
96 } 104 }
97} 105}
98 106
99void __init ux500_init_late(void)
100{
101 mop500_uib_init();
102}
103
104static const char * __init ux500_get_machine(void) 107static const char * __init ux500_get_machine(void)
105{ 108{
106 return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber()); 109 return kasprintf(GFP_KERNEL, "DB%4x", dbx500_partnumber());
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
deleted file mode 100644
index f71b3d7bd4fb..000000000000
--- a/arch/arm/mach-ux500/devices-common.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL), version 2.
6 */
7
8#include <linux/kernel.h>
9#include <linux/dma-mapping.h>
10#include <linux/err.h>
11#include <linux/irq.h>
12#include <linux/slab.h>
13#include <linux/platform_device.h>
14#include <linux/platform_data/pinctrl-nomadik.h>
15
16#include "irqs.h"
17
18#include "devices-common.h"
19
20static struct platform_device *
21dbx500_add_gpio(struct device *parent, int id, resource_size_t addr, int irq,
22 struct nmk_gpio_platform_data *pdata)
23{
24 struct resource resources[] = {
25 {
26 .start = addr,
27 .end = addr + 127,
28 .flags = IORESOURCE_MEM,
29 },
30 {
31 .start = irq,
32 .end = irq,
33 .flags = IORESOURCE_IRQ,
34 }
35 };
36
37 return platform_device_register_resndata(
38 parent,
39 "gpio",
40 id,
41 resources,
42 ARRAY_SIZE(resources),
43 pdata,
44 sizeof(*pdata));
45}
46
47void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
48 int irq, struct nmk_gpio_platform_data *pdata)
49{
50 int first = 0;
51 int i;
52
53 for (i = 0; i < num; i++, first += 32, irq++) {
54 pdata->first_gpio = first;
55 pdata->first_irq = NOMADIK_GPIO_TO_IRQ(first);
56 pdata->num_gpio = 32;
57
58 dbx500_add_gpio(parent, i, base[i], irq, pdata);
59 }
60}
diff --git a/arch/arm/mach-ux500/devices-common.h b/arch/arm/mach-ux500/devices-common.h
deleted file mode 100644
index 96fa4ac89e2e..000000000000
--- a/arch/arm/mach-ux500/devices-common.h
+++ /dev/null
@@ -1,149 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL), version 2.
6 */
7
8#ifndef __DEVICES_COMMON_H
9#define __DEVICES_COMMON_H
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13#include <linux/sys_soc.h>
14#include <linux/amba/bus.h>
15#include <linux/platform_data/i2c-nomadik.h>
16#include <linux/platform_data/crypto-ux500.h>
17
18struct spi_master_cntlr;
19
20static inline struct amba_device *
21dbx500_add_msp_spi(struct device *parent, const char *name,
22 resource_size_t base, int irq,
23 struct spi_master_cntlr *pdata)
24{
25 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
26 pdata, 0);
27}
28
29static inline struct amba_device *
30dbx500_add_spi(struct device *parent, const char *name, resource_size_t base,
31 int irq, struct spi_master_cntlr *pdata,
32 u32 periphid)
33{
34 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
35 pdata, periphid);
36}
37
38struct mmci_platform_data;
39
40static inline struct amba_device *
41dbx500_add_sdi(struct device *parent, const char *name, resource_size_t base,
42 int irq, struct mmci_platform_data *pdata, u32 periphid)
43{
44 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0,
45 pdata, periphid);
46}
47
48struct amba_pl011_data;
49
50static inline struct amba_device *
51dbx500_add_uart(struct device *parent, const char *name, resource_size_t base,
52 int irq, struct amba_pl011_data *pdata)
53{
54 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
55}
56
57struct nmk_i2c_controller;
58
59static inline struct amba_device *
60dbx500_add_i2c(struct device *parent, int id, resource_size_t base, int irq,
61 struct nmk_i2c_controller *data)
62{
63 /* Conjure a name similar to what the platform device used to have */
64 char name[16];
65
66 snprintf(name, sizeof(name), "nmk-i2c.%d", id);
67 return amba_apb_device_add(parent, name, base, SZ_4K, irq, 0, data, 0);
68}
69
70static inline struct amba_device *
71dbx500_add_rtc(struct device *parent, resource_size_t base, int irq)
72{
73 return amba_apb_device_add(parent, "rtc-pl031", base, SZ_4K, irq,
74 0, NULL, 0);
75}
76
77struct cryp_platform_data;
78
79static inline struct platform_device *
80dbx500_add_cryp1(struct device *parent, int id, resource_size_t base, int irq,
81 struct cryp_platform_data *pdata)
82{
83 struct resource res[] = {
84 DEFINE_RES_MEM(base, SZ_4K),
85 DEFINE_RES_IRQ(irq),
86 };
87
88 struct platform_device_info pdevinfo = {
89 .parent = parent,
90 .name = "cryp1",
91 .id = id,
92 .res = res,
93 .num_res = ARRAY_SIZE(res),
94 .data = pdata,
95 .size_data = sizeof(*pdata),
96 .dma_mask = DMA_BIT_MASK(32),
97 };
98
99 return platform_device_register_full(&pdevinfo);
100}
101
102struct hash_platform_data;
103
104static inline struct platform_device *
105dbx500_add_hash1(struct device *parent, int id, resource_size_t base,
106 struct hash_platform_data *pdata)
107{
108 struct resource res[] = {
109 DEFINE_RES_MEM(base, SZ_4K),
110 };
111
112 struct platform_device_info pdevinfo = {
113 .parent = parent,
114 .name = "hash1",
115 .id = id,
116 .res = res,
117 .num_res = ARRAY_SIZE(res),
118 .data = pdata,
119 .size_data = sizeof(*pdata),
120 .dma_mask = DMA_BIT_MASK(32),
121 };
122
123 return platform_device_register_full(&pdevinfo);
124}
125
126struct nmk_gpio_platform_data;
127
128void dbx500_add_gpios(struct device *parent, resource_size_t *base, int num,
129 int irq, struct nmk_gpio_platform_data *pdata);
130
131static inline void
132dbx500_add_pinctrl(struct device *parent, const char *name,
133 resource_size_t base)
134{
135 struct resource res[] = {
136 DEFINE_RES_MEM(base, SZ_8K),
137 };
138 struct platform_device_info pdevinfo = {
139 .parent = parent,
140 .name = name,
141 .id = -1,
142 .res = res,
143 .num_res = ARRAY_SIZE(res),
144 };
145
146 platform_device_register_full(&pdevinfo);
147}
148
149#endif
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index bc316062e0c2..c59f89d058ff 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -9,10 +9,8 @@
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/interrupt.h> 10#include <linux/interrupt.h>
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/gpio.h>
13#include <linux/amba/bus.h> 12#include <linux/amba/bus.h>
14#include <linux/amba/pl022.h> 13#include <linux/amba/pl022.h>
15#include <linux/platform_data/dma-ste-dma40.h>
16#include <linux/mfd/dbx500-prcmu.h> 14#include <linux/mfd/dbx500-prcmu.h>
17 15
18#include "setup.h" 16#include "setup.h"
@@ -20,62 +18,6 @@
20 18
21#include "db8500-regs.h" 19#include "db8500-regs.h"
22#include "devices-db8500.h" 20#include "devices-db8500.h"
23#include "ste-dma40-db8500.h"
24
25static struct resource dma40_resources[] = {
26 [0] = {
27 .start = U8500_DMA_BASE,
28 .end = U8500_DMA_BASE + SZ_4K - 1,
29 .flags = IORESOURCE_MEM,
30 .name = "base",
31 },
32 [1] = {
33 .start = U8500_DMA_LCPA_BASE,
34 .end = U8500_DMA_LCPA_BASE + 2 * SZ_1K - 1,
35 .flags = IORESOURCE_MEM,
36 .name = "lcpa",
37 },
38 [2] = {
39 .start = IRQ_DB8500_DMA,
40 .end = IRQ_DB8500_DMA,
41 .flags = IORESOURCE_IRQ,
42 }
43};
44
45struct stedma40_platform_data dma40_plat_data = {
46 .disabled_channels = {-1},
47};
48
49struct platform_device u8500_dma40_device = {
50 .dev = {
51 .platform_data = &dma40_plat_data,
52 .coherent_dma_mask = DMA_BIT_MASK(32),
53 },
54 .name = "dma40",
55 .id = 0,
56 .num_resources = ARRAY_SIZE(dma40_resources),
57 .resource = dma40_resources
58};
59
60struct resource keypad_resources[] = {
61 [0] = {
62 .start = U8500_SKE_BASE,
63 .end = U8500_SKE_BASE + SZ_4K - 1,
64 .flags = IORESOURCE_MEM,
65 },
66 [1] = {
67 .start = IRQ_DB8500_KB,
68 .end = IRQ_DB8500_KB,
69 .flags = IORESOURCE_IRQ,
70 },
71};
72
73struct platform_device u8500_ske_keypad_device = {
74 .name = "nmk-ske-keypad",
75 .id = -1,
76 .num_resources = ARRAY_SIZE(keypad_resources),
77 .resource = keypad_resources,
78};
79 21
80struct prcmu_pdata db8500_prcmu_pdata = { 22struct prcmu_pdata db8500_prcmu_pdata = {
81 .ab_platdata = &ab8500_platdata, 23 .ab_platdata = &ab8500_platdata,
@@ -84,39 +26,3 @@ struct prcmu_pdata db8500_prcmu_pdata = {
84 .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET, 26 .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
85 .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET, 27 .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
86}; 28};
87
88static struct resource db8500_prcmu_res[] = {
89 {
90 .name = "prcmu",
91 .start = U8500_PRCMU_BASE,
92 .end = U8500_PRCMU_BASE + SZ_8K - 1,
93 .flags = IORESOURCE_MEM,
94 },
95 {
96 .name = "prcmu-tcdm",
97 .start = U8500_PRCMU_TCDM_BASE,
98 .end = U8500_PRCMU_TCDM_BASE + SZ_4K - 1,
99 .flags = IORESOURCE_MEM,
100 },
101 {
102 .name = "irq",
103 .start = IRQ_DB8500_PRCMU1,
104 .end = IRQ_DB8500_PRCMU1,
105 .flags = IORESOURCE_IRQ,
106 },
107 {
108 .name = "prcmu-tcpm",
109 .start = U8500_PRCMU_TCPM_BASE,
110 .end = U8500_PRCMU_TCPM_BASE + SZ_32K - 1,
111 .flags = IORESOURCE_MEM,
112 },
113};
114
115struct platform_device db8500_prcmu_device = {
116 .name = "db8500-prcmu",
117 .resource = db8500_prcmu_res,
118 .num_resources = ARRAY_SIZE(db8500_prcmu_res),
119 .dev = {
120 .platform_data = &db8500_prcmu_pdata,
121 },
122};
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index 321998320f98..b8ffc9979bb2 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -8,122 +8,12 @@
8#ifndef __DEVICES_DB8500_H 8#ifndef __DEVICES_DB8500_H
9#define __DEVICES_DB8500_H 9#define __DEVICES_DB8500_H
10 10
11#include <linux/platform_data/usb-musb-ux500.h>
12#include "irqs.h" 11#include "irqs.h"
13#include "db8500-regs.h" 12#include "db8500-regs.h"
14#include "devices-common.h"
15 13
16struct ske_keypad_platform_data;
17struct pl022_ssp_controller;
18struct platform_device; 14struct platform_device;
19 15
20extern struct ab8500_platform_data ab8500_platdata; 16extern struct ab8500_platform_data ab8500_platdata;
21extern struct prcmu_pdata db8500_prcmu_pdata; 17extern struct prcmu_pdata db8500_prcmu_pdata;
22extern struct platform_device db8500_prcmu_device;
23 18
24static inline struct platform_device *
25db8500_add_ske_keypad(struct device *parent,
26 struct ske_keypad_platform_data *pdata,
27 size_t size)
28{
29 struct resource resources[] = {
30 DEFINE_RES_MEM(U8500_SKE_BASE, SZ_4K),
31 DEFINE_RES_IRQ(IRQ_DB8500_KB),
32 };
33
34 return platform_device_register_resndata(parent, "nmk-ske-keypad", -1,
35 resources, 2, pdata, size);
36}
37
38static inline struct amba_device *
39db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
40 int irq, struct pl022_ssp_controller *pdata)
41{
42 return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
43}
44
45#define db8500_add_i2c0(parent, pdata) \
46 dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
47#define db8500_add_i2c1(parent, pdata) \
48 dbx500_add_i2c(parent, 1, U8500_I2C1_BASE, IRQ_DB8500_I2C1, pdata)
49#define db8500_add_i2c2(parent, pdata) \
50 dbx500_add_i2c(parent, 2, U8500_I2C2_BASE, IRQ_DB8500_I2C2, pdata)
51#define db8500_add_i2c3(parent, pdata) \
52 dbx500_add_i2c(parent, 3, U8500_I2C3_BASE, IRQ_DB8500_I2C3, pdata)
53#define db8500_add_i2c4(parent, pdata) \
54 dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)
55
56#define db8500_add_msp0_spi(parent, pdata) \
57 dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \
58 IRQ_DB8500_MSP0, pdata)
59#define db8500_add_msp1_spi(parent, pdata) \
60 dbx500_add_msp_spi(parent, "msp1", U8500_MSP1_BASE, \
61 IRQ_DB8500_MSP1, pdata)
62#define db8500_add_msp2_spi(parent, pdata) \
63 dbx500_add_msp_spi(parent, "msp2", U8500_MSP2_BASE, \
64 IRQ_DB8500_MSP2, pdata)
65#define db8500_add_msp3_spi(parent, pdata) \
66 dbx500_add_msp_spi(parent, "msp3", U8500_MSP3_BASE, \
67 IRQ_DB8500_MSP1, pdata)
68
69#define db8500_add_rtc(parent) \
70 dbx500_add_rtc(parent, U8500_RTC_BASE, IRQ_DB8500_RTC);
71
72#define db8500_add_usb(parent, rx_cfg, tx_cfg) \
73 ux500_add_usb(parent, U8500_USBOTG_BASE, \
74 IRQ_DB8500_USBOTG, rx_cfg, tx_cfg)
75
76#define db8500_add_sdi0(parent, pdata, pid) \
77 dbx500_add_sdi(parent, "sdi0", U8500_SDI0_BASE, \
78 IRQ_DB8500_SDMMC0, pdata, pid)
79#define db8500_add_sdi1(parent, pdata, pid) \
80 dbx500_add_sdi(parent, "sdi1", U8500_SDI1_BASE, \
81 IRQ_DB8500_SDMMC1, pdata, pid)
82#define db8500_add_sdi2(parent, pdata, pid) \
83 dbx500_add_sdi(parent, "sdi2", U8500_SDI2_BASE, \
84 IRQ_DB8500_SDMMC2, pdata, pid)
85#define db8500_add_sdi3(parent, pdata, pid) \
86 dbx500_add_sdi(parent, "sdi3", U8500_SDI3_BASE, \
87 IRQ_DB8500_SDMMC3, pdata, pid)
88#define db8500_add_sdi4(parent, pdata, pid) \
89 dbx500_add_sdi(parent, "sdi4", U8500_SDI4_BASE, \
90 IRQ_DB8500_SDMMC4, pdata, pid)
91#define db8500_add_sdi5(parent, pdata, pid) \
92 dbx500_add_sdi(parent, "sdi5", U8500_SDI5_BASE, \
93 IRQ_DB8500_SDMMC5, pdata, pid)
94
95#define db8500_add_ssp0(parent, pdata) \
96 db8500_add_ssp(parent, "ssp0", U8500_SSP0_BASE, \
97 IRQ_DB8500_SSP0, pdata)
98#define db8500_add_ssp1(parent, pdata) \
99 db8500_add_ssp(parent, "ssp1", U8500_SSP1_BASE, \
100 IRQ_DB8500_SSP1, pdata)
101
102#define db8500_add_spi0(parent, pdata) \
103 dbx500_add_spi(parent, "spi0", U8500_SPI0_BASE, \
104 IRQ_DB8500_SPI0, pdata, 0)
105#define db8500_add_spi1(parent, pdata) \
106 dbx500_add_spi(parent, "spi1", U8500_SPI1_BASE, \
107 IRQ_DB8500_SPI1, pdata, 0)
108#define db8500_add_spi2(parent, pdata) \
109 dbx500_add_spi(parent, "spi2", U8500_SPI2_BASE, \
110 IRQ_DB8500_SPI2, pdata, 0)
111#define db8500_add_spi3(parent, pdata) \
112 dbx500_add_spi(parent, "spi3", U8500_SPI3_BASE, \
113 IRQ_DB8500_SPI3, pdata, 0)
114
115#define db8500_add_uart0(parent, pdata) \
116 dbx500_add_uart(parent, "uart0", U8500_UART0_BASE, \
117 IRQ_DB8500_UART0, pdata)
118#define db8500_add_uart1(parent, pdata) \
119 dbx500_add_uart(parent, "uart1", U8500_UART1_BASE, \
120 IRQ_DB8500_UART1, pdata)
121#define db8500_add_uart2(parent, pdata) \
122 dbx500_add_uart(parent, "uart2", U8500_UART2_BASE, \
123 IRQ_DB8500_UART2, pdata)
124
125#define db8500_add_cryp1(parent, pdata) \
126 dbx500_add_cryp1(parent, -1, U8500_CRYP1_BASE, IRQ_DB8500_CRYP1, pdata)
127#define db8500_add_hash1(parent, pdata) \
128 dbx500_add_hash1(parent, -1, U8500_HASH1_BASE, pdata)
129#endif 19#endif
diff --git a/arch/arm/mach-ux500/devices.h b/arch/arm/mach-ux500/devices.h
index cbc6f1e4104d..5bca7c605cd6 100644
--- a/arch/arm/mach-ux500/devices.h
+++ b/arch/arm/mach-ux500/devices.h
@@ -10,14 +10,6 @@
10struct platform_device; 10struct platform_device;
11struct amba_device; 11struct amba_device;
12 12
13extern struct platform_device u8500_gpio_devs[];
14
15extern struct amba_device ux500_pl031_device; 13extern struct amba_device ux500_pl031_device;
16 14
17extern struct platform_device ux500_hash1_device;
18extern struct platform_device ux500_cryp1_device;
19
20extern struct platform_device u8500_dma40_device;
21extern struct platform_device ux500_ske_keypad_device;
22
23#endif 15#endif
diff --git a/arch/arm/mach-ux500/setup.h b/arch/arm/mach-ux500/setup.h
index 656324aad18e..bdb356498a74 100644
--- a/arch/arm/mach-ux500/setup.h
+++ b/arch/arm/mach-ux500/setup.h
@@ -24,7 +24,6 @@ extern void __init u8500_map_io(void);
24extern struct device * __init u8500_init_devices(void); 24extern struct device * __init u8500_init_devices(void);
25 25
26extern void __init ux500_init_irq(void); 26extern void __init ux500_init_irq(void);
27extern void __init ux500_init_late(void);
28 27
29extern struct device *ux500_soc_device_init(const char *soc_id); 28extern struct device *ux500_soc_device_init(const char *soc_id);
30 29
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index b6bd0efcbe64..05a4ff78b3bd 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -97,8 +97,8 @@ dt_fail:
97 * sched_clock with higher rating then MTU since is always-on. 97 * sched_clock with higher rating then MTU since is always-on.
98 * 98 *
99 */ 99 */
100 100 if (!of_have_populated_dt())
101 nmdk_timer_init(mtu_timer_base, IRQ_MTU0); 101 nmdk_timer_init(mtu_timer_base, IRQ_MTU0);
102 clksrc_dbx500_prcmu_init(prcmu_timer_base); 102 clksrc_dbx500_prcmu_init(prcmu_timer_base);
103 ux500_twd_init(); 103 ux500_twd_init();
104} 104}
diff --git a/arch/arm/mach-ux500/usb.c b/arch/arm/mach-ux500/usb.c
deleted file mode 100644
index b7bd8d3a5507..000000000000
--- a/arch/arm/mach-ux500/usb.c
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2011
3 *
4 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 */
7#include <linux/platform_device.h>
8#include <linux/usb/musb.h>
9#include <linux/dma-mapping.h>
10#include <linux/platform_data/usb-musb-ux500.h>
11#include <linux/platform_data/dma-ste-dma40.h>
12
13#include "db8500-regs.h"
14
15#define MUSB_DMA40_RX_CH { \
16 .mode = STEDMA40_MODE_LOGICAL, \
17 .dir = DMA_DEV_TO_MEM, \
18 }
19
20#define MUSB_DMA40_TX_CH { \
21 .mode = STEDMA40_MODE_LOGICAL, \
22 .dir = DMA_MEM_TO_DEV, \
23 }
24
25static struct stedma40_chan_cfg musb_dma_rx_ch[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS]
26 = {
27 MUSB_DMA40_RX_CH,
28 MUSB_DMA40_RX_CH,
29 MUSB_DMA40_RX_CH,
30 MUSB_DMA40_RX_CH,
31 MUSB_DMA40_RX_CH,
32 MUSB_DMA40_RX_CH,
33 MUSB_DMA40_RX_CH,
34 MUSB_DMA40_RX_CH
35};
36
37static struct stedma40_chan_cfg musb_dma_tx_ch[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS]
38 = {
39 MUSB_DMA40_TX_CH,
40 MUSB_DMA40_TX_CH,
41 MUSB_DMA40_TX_CH,
42 MUSB_DMA40_TX_CH,
43 MUSB_DMA40_TX_CH,
44 MUSB_DMA40_TX_CH,
45 MUSB_DMA40_TX_CH,
46 MUSB_DMA40_TX_CH,
47};
48
49static void *ux500_dma_rx_param_array[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS] = {
50 &musb_dma_rx_ch[0],
51 &musb_dma_rx_ch[1],
52 &musb_dma_rx_ch[2],
53 &musb_dma_rx_ch[3],
54 &musb_dma_rx_ch[4],
55 &musb_dma_rx_ch[5],
56 &musb_dma_rx_ch[6],
57 &musb_dma_rx_ch[7]
58};
59
60static void *ux500_dma_tx_param_array[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS] = {
61 &musb_dma_tx_ch[0],
62 &musb_dma_tx_ch[1],
63 &musb_dma_tx_ch[2],
64 &musb_dma_tx_ch[3],
65 &musb_dma_tx_ch[4],
66 &musb_dma_tx_ch[5],
67 &musb_dma_tx_ch[6],
68 &musb_dma_tx_ch[7]
69};
70
71static struct ux500_musb_board_data musb_board_data = {
72 .dma_rx_param_array = ux500_dma_rx_param_array,
73 .dma_tx_param_array = ux500_dma_tx_param_array,
74 .dma_filter = stedma40_filter,
75};
76
77static struct musb_hdrc_platform_data musb_platform_data = {
78 .mode = MUSB_OTG,
79 .board_data = &musb_board_data,
80};
81
82static struct resource usb_resources[] = {
83 [0] = {
84 .name = "usb-mem",
85 .flags = IORESOURCE_MEM,
86 },
87
88 [1] = {
89 .name = "mc", /* hard-coded in musb */
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94struct platform_device ux500_musb_device = {
95 .name = "musb-ux500",
96 .id = 0,
97 .dev = {
98 .platform_data = &musb_platform_data,
99 .coherent_dma_mask = DMA_BIT_MASK(32),
100 },
101 .num_resources = ARRAY_SIZE(usb_resources),
102 .resource = usb_resources,
103};
104
105static inline void ux500_usb_dma_update_rx_ch_config(int *dev_type)
106{
107 u32 idx;
108
109 for (idx = 0; idx < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS; idx++)
110 musb_dma_rx_ch[idx].dev_type = dev_type[idx];
111}
112
113static inline void ux500_usb_dma_update_tx_ch_config(int *dev_type)
114{
115 u32 idx;
116
117 for (idx = 0; idx < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS; idx++)
118 musb_dma_tx_ch[idx].dev_type = dev_type[idx];
119}
120
121void ux500_add_usb(struct device *parent, resource_size_t base, int irq,
122 int *dma_rx_cfg, int *dma_tx_cfg)
123{
124 ux500_musb_device.resource[0].start = base;
125 ux500_musb_device.resource[0].end = base + SZ_64K - 1;
126 ux500_musb_device.resource[1].start = irq;
127 ux500_musb_device.resource[1].end = irq;
128
129 ux500_usb_dma_update_rx_ch_config(dma_rx_cfg);
130 ux500_usb_dma_update_tx_ch_config(dma_tx_cfg);
131
132 ux500_musb_device.dev.parent = parent;
133
134 platform_device_register(&ux500_musb_device);
135}
diff --git a/drivers/clk/ux500/Makefile b/drivers/clk/ux500/Makefile
index c6a806ed0e8c..521483f0ba33 100644
--- a/drivers/clk/ux500/Makefile
+++ b/drivers/clk/ux500/Makefile
@@ -8,6 +8,7 @@ obj-y += clk-prcmu.o
8obj-y += clk-sysctrl.o 8obj-y += clk-sysctrl.o
9 9
10# Clock definitions 10# Clock definitions
11obj-y += u8500_of_clk.o
11obj-y += u8500_clk.o 12obj-y += u8500_clk.o
12obj-y += u9540_clk.o 13obj-y += u9540_clk.o
13obj-y += u8540_clk.o 14obj-y += u8540_clk.o
diff --git a/drivers/clk/ux500/u8500_of_clk.c b/drivers/clk/ux500/u8500_of_clk.c
new file mode 100644
index 000000000000..b768b507c95c
--- /dev/null
+++ b/drivers/clk/ux500/u8500_of_clk.c
@@ -0,0 +1,559 @@
1/*
2 * Clock definitions for u8500 platform.
3 *
4 * Copyright (C) 2012 ST-Ericsson SA
5 * Author: Ulf Hansson <ulf.hansson@linaro.org>
6 *
7 * License terms: GNU General Public License (GPL) version 2
8 */
9
10#include <linux/of.h>
11#include <linux/clk.h>
12#include <linux/clkdev.h>
13#include <linux/clk-provider.h>
14#include <linux/mfd/dbx500-prcmu.h>
15#include <linux/platform_data/clk-ux500.h>
16#include "clk.h"
17
18#define PRCC_NUM_PERIPH_CLUSTERS 6
19#define PRCC_PERIPHS_PER_CLUSTER 32
20
21static struct clk *prcmu_clk[PRCMU_NUM_CLKS];
22static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
23static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER];
24
25#define PRCC_SHOW(clk, base, bit) \
26 clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit]
27#define PRCC_PCLK_STORE(clk, base, bit) \
28 prcc_pclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk
29#define PRCC_KCLK_STORE(clk, base, bit) \
30 prcc_kclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk
31
32struct clk *ux500_twocell_get(struct of_phandle_args *clkspec, void *data)
33{
34 struct clk **clk_data = data;
35 unsigned int base, bit;
36
37 if (clkspec->args_count != 2)
38 return ERR_PTR(-EINVAL);
39
40 base = clkspec->args[0];
41 bit = clkspec->args[1];
42
43 if (base != 1 && base != 2 && base != 3 && base != 5 && base != 6) {
44 pr_err("%s: invalid PRCC base %d\n", __func__, base);
45 return ERR_PTR(-EINVAL);
46 }
47
48 return PRCC_SHOW(clk_data, base, bit);
49}
50
51static const struct of_device_id u8500_clk_of_match[] = {
52 { .compatible = "stericsson,u8500-clks", },
53 { },
54};
55
56void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
57 u32 clkrst5_base, u32 clkrst6_base)
58{
59 struct prcmu_fw_version *fw_version;
60 struct device_node *np = NULL;
61 struct device_node *child = NULL;
62 const char *sgaclk_parent = NULL;
63 struct clk *clk, *rtc_clk, *twd_clk;
64
65 if (of_have_populated_dt())
66 np = of_find_matching_node(NULL, u8500_clk_of_match);
67 if (!np) {
68 pr_err("Either DT or U8500 Clock node not found\n");
69 return;
70 }
71
72 /* Clock sources */
73 clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0,
74 CLK_IS_ROOT|CLK_IGNORE_UNUSED);
75 prcmu_clk[PRCMU_PLLSOC0] = clk;
76
77 clk = clk_reg_prcmu_gate("soc1_pll", NULL, PRCMU_PLLSOC1,
78 CLK_IS_ROOT|CLK_IGNORE_UNUSED);
79 prcmu_clk[PRCMU_PLLSOC1] = clk;
80
81 clk = clk_reg_prcmu_gate("ddr_pll", NULL, PRCMU_PLLDDR,
82 CLK_IS_ROOT|CLK_IGNORE_UNUSED);
83 prcmu_clk[PRCMU_PLLDDR] = clk;
84
85 /* FIXME: Add sys, ulp and int clocks here. */
86
87 rtc_clk = clk_register_fixed_rate(NULL, "rtc32k", "NULL",
88 CLK_IS_ROOT|CLK_IGNORE_UNUSED,
89 32768);
90
91 /* PRCMU clocks */
92 fw_version = prcmu_get_fw_version();
93 if (fw_version != NULL) {
94 switch (fw_version->project) {
95 case PRCMU_FW_PROJECT_U8500_C2:
96 case PRCMU_FW_PROJECT_U8520:
97 case PRCMU_FW_PROJECT_U8420:
98 sgaclk_parent = "soc0_pll";
99 break;
100 default:
101 break;
102 }
103 }
104
105 if (sgaclk_parent)
106 clk = clk_reg_prcmu_gate("sgclk", sgaclk_parent,
107 PRCMU_SGACLK, 0);
108 else
109 clk = clk_reg_prcmu_gate("sgclk", NULL,
110 PRCMU_SGACLK, CLK_IS_ROOT);
111 prcmu_clk[PRCMU_SGACLK] = clk;
112
113 clk = clk_reg_prcmu_gate("uartclk", NULL, PRCMU_UARTCLK, CLK_IS_ROOT);
114 prcmu_clk[PRCMU_UARTCLK] = clk;
115
116 clk = clk_reg_prcmu_gate("msp02clk", NULL, PRCMU_MSP02CLK, CLK_IS_ROOT);
117 prcmu_clk[PRCMU_MSP02CLK] = clk;
118
119 clk = clk_reg_prcmu_gate("msp1clk", NULL, PRCMU_MSP1CLK, CLK_IS_ROOT);
120 prcmu_clk[PRCMU_MSP1CLK] = clk;
121
122 clk = clk_reg_prcmu_gate("i2cclk", NULL, PRCMU_I2CCLK, CLK_IS_ROOT);
123 prcmu_clk[PRCMU_I2CCLK] = clk;
124
125 clk = clk_reg_prcmu_gate("slimclk", NULL, PRCMU_SLIMCLK, CLK_IS_ROOT);
126 prcmu_clk[PRCMU_SLIMCLK] = clk;
127
128 clk = clk_reg_prcmu_gate("per1clk", NULL, PRCMU_PER1CLK, CLK_IS_ROOT);
129 prcmu_clk[PRCMU_PER1CLK] = clk;
130
131 clk = clk_reg_prcmu_gate("per2clk", NULL, PRCMU_PER2CLK, CLK_IS_ROOT);
132 prcmu_clk[PRCMU_PER2CLK] = clk;
133
134 clk = clk_reg_prcmu_gate("per3clk", NULL, PRCMU_PER3CLK, CLK_IS_ROOT);
135 prcmu_clk[PRCMU_PER3CLK] = clk;
136
137 clk = clk_reg_prcmu_gate("per5clk", NULL, PRCMU_PER5CLK, CLK_IS_ROOT);
138 prcmu_clk[PRCMU_PER5CLK] = clk;
139
140 clk = clk_reg_prcmu_gate("per6clk", NULL, PRCMU_PER6CLK, CLK_IS_ROOT);
141 prcmu_clk[PRCMU_PER6CLK] = clk;
142
143 clk = clk_reg_prcmu_gate("per7clk", NULL, PRCMU_PER7CLK, CLK_IS_ROOT);
144 prcmu_clk[PRCMU_PER7CLK] = clk;
145
146 clk = clk_reg_prcmu_scalable("lcdclk", NULL, PRCMU_LCDCLK, 0,
147 CLK_IS_ROOT|CLK_SET_RATE_GATE);
148 prcmu_clk[PRCMU_LCDCLK] = clk;
149
150 clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK, CLK_IS_ROOT);
151 prcmu_clk[PRCMU_BMLCLK] = clk;
152
153 clk = clk_reg_prcmu_scalable("hsitxclk", NULL, PRCMU_HSITXCLK, 0,
154 CLK_IS_ROOT|CLK_SET_RATE_GATE);
155 prcmu_clk[PRCMU_HSITXCLK] = clk;
156
157 clk = clk_reg_prcmu_scalable("hsirxclk", NULL, PRCMU_HSIRXCLK, 0,
158 CLK_IS_ROOT|CLK_SET_RATE_GATE);
159 prcmu_clk[PRCMU_HSIRXCLK] = clk;
160
161 clk = clk_reg_prcmu_scalable("hdmiclk", NULL, PRCMU_HDMICLK, 0,
162 CLK_IS_ROOT|CLK_SET_RATE_GATE);
163 prcmu_clk[PRCMU_HDMICLK] = clk;
164
165 clk = clk_reg_prcmu_gate("apeatclk", NULL, PRCMU_APEATCLK, CLK_IS_ROOT);
166 prcmu_clk[PRCMU_APEATCLK] = clk;
167
168 clk = clk_reg_prcmu_gate("apetraceclk", NULL, PRCMU_APETRACECLK,
169 CLK_IS_ROOT);
170 prcmu_clk[PRCMU_APETRACECLK] = clk;
171
172 clk = clk_reg_prcmu_gate("mcdeclk", NULL, PRCMU_MCDECLK, CLK_IS_ROOT);
173 prcmu_clk[PRCMU_MCDECLK] = clk;
174
175 clk = clk_reg_prcmu_opp_gate("ipi2cclk", NULL, PRCMU_IPI2CCLK,
176 CLK_IS_ROOT);
177 prcmu_clk[PRCMU_IPI2CCLK] = clk;
178
179 clk = clk_reg_prcmu_gate("dsialtclk", NULL, PRCMU_DSIALTCLK,
180 CLK_IS_ROOT);
181 prcmu_clk[PRCMU_DSIALTCLK] = clk;
182
183 clk = clk_reg_prcmu_gate("dmaclk", NULL, PRCMU_DMACLK, CLK_IS_ROOT);
184 prcmu_clk[PRCMU_DMACLK] = clk;
185
186 clk = clk_reg_prcmu_gate("b2r2clk", NULL, PRCMU_B2R2CLK, CLK_IS_ROOT);
187 prcmu_clk[PRCMU_B2R2CLK] = clk;
188
189 clk = clk_reg_prcmu_scalable("tvclk", NULL, PRCMU_TVCLK, 0,
190 CLK_IS_ROOT|CLK_SET_RATE_GATE);
191 prcmu_clk[PRCMU_TVCLK] = clk;
192
193 clk = clk_reg_prcmu_gate("sspclk", NULL, PRCMU_SSPCLK, CLK_IS_ROOT);
194 prcmu_clk[PRCMU_SSPCLK] = clk;
195
196 clk = clk_reg_prcmu_gate("rngclk", NULL, PRCMU_RNGCLK, CLK_IS_ROOT);
197 prcmu_clk[PRCMU_RNGCLK] = clk;
198
199 clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, CLK_IS_ROOT);
200 prcmu_clk[PRCMU_UICCCLK] = clk;
201
202 clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, CLK_IS_ROOT);
203 prcmu_clk[PRCMU_TIMCLK] = clk;
204
205 clk = clk_reg_prcmu_opp_volt_scalable("sdmmcclk", NULL, PRCMU_SDMMCCLK,
206 100000000,
207 CLK_IS_ROOT|CLK_SET_RATE_GATE);
208 prcmu_clk[PRCMU_SDMMCCLK] = clk;
209
210 clk = clk_reg_prcmu_scalable("dsi_pll", "hdmiclk",
211 PRCMU_PLLDSI, 0, CLK_SET_RATE_GATE);
212 prcmu_clk[PRCMU_PLLDSI] = clk;
213
214 clk = clk_reg_prcmu_scalable("dsi0clk", "dsi_pll",
215 PRCMU_DSI0CLK, 0, CLK_SET_RATE_GATE);
216 prcmu_clk[PRCMU_DSI0CLK] = clk;
217
218 clk = clk_reg_prcmu_scalable("dsi1clk", "dsi_pll",
219 PRCMU_DSI1CLK, 0, CLK_SET_RATE_GATE);
220 prcmu_clk[PRCMU_DSI1CLK] = clk;
221
222 clk = clk_reg_prcmu_scalable("dsi0escclk", "tvclk",
223 PRCMU_DSI0ESCCLK, 0, CLK_SET_RATE_GATE);
224 prcmu_clk[PRCMU_DSI0ESCCLK] = clk;
225
226 clk = clk_reg_prcmu_scalable("dsi1escclk", "tvclk",
227 PRCMU_DSI1ESCCLK, 0, CLK_SET_RATE_GATE);
228 prcmu_clk[PRCMU_DSI1ESCCLK] = clk;
229
230 clk = clk_reg_prcmu_scalable("dsi2escclk", "tvclk",
231 PRCMU_DSI2ESCCLK, 0, CLK_SET_RATE_GATE);
232 prcmu_clk[PRCMU_DSI2ESCCLK] = clk;
233
234 clk = clk_reg_prcmu_scalable_rate("armss", NULL,
235 PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED);
236 prcmu_clk[PRCMU_ARMSS] = clk;
237
238 twd_clk = clk_register_fixed_factor(NULL, "smp_twd", "armss",
239 CLK_IGNORE_UNUSED, 1, 2);
240
241 /*
242 * FIXME: Add special handled PRCMU clocks here:
243 * 1. clkout0yuv, use PRCMU as parent + need regulator + pinctrl.
244 * 2. ab9540_clkout1yuv, see clkout0yuv
245 */
246
247 /* PRCC P-clocks */
248 clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", clkrst1_base,
249 BIT(0), 0);
250 PRCC_PCLK_STORE(clk, 1, 0);
251
252 clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", clkrst1_base,
253 BIT(1), 0);
254 PRCC_PCLK_STORE(clk, 1, 1);
255
256 clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", clkrst1_base,
257 BIT(2), 0);
258 PRCC_PCLK_STORE(clk, 1, 2);
259
260 clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", clkrst1_base,
261 BIT(3), 0);
262 PRCC_PCLK_STORE(clk, 1, 3);
263
264 clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", clkrst1_base,
265 BIT(4), 0);
266 PRCC_PCLK_STORE(clk, 1, 4);
267
268 clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", clkrst1_base,
269 BIT(5), 0);
270 PRCC_PCLK_STORE(clk, 1, 5);
271
272 clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", clkrst1_base,
273 BIT(6), 0);
274 PRCC_PCLK_STORE(clk, 1, 6);
275
276 clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", clkrst1_base,
277 BIT(7), 0);
278 PRCC_PCLK_STORE(clk, 1, 7);
279
280 clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", clkrst1_base,
281 BIT(8), 0);
282 PRCC_PCLK_STORE(clk, 1, 8);
283
284 clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", clkrst1_base,
285 BIT(9), 0);
286 PRCC_PCLK_STORE(clk, 1, 9);
287
288 clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", clkrst1_base,
289 BIT(10), 0);
290 PRCC_PCLK_STORE(clk, 1, 10);
291
292 clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", clkrst1_base,
293 BIT(11), 0);
294 PRCC_PCLK_STORE(clk, 1, 11);
295
296 clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", clkrst2_base,
297 BIT(0), 0);
298 PRCC_PCLK_STORE(clk, 2, 0);
299
300 clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", clkrst2_base,
301 BIT(1), 0);
302 PRCC_PCLK_STORE(clk, 2, 1);
303
304 clk = clk_reg_prcc_pclk("p2_pclk2", "per2clk", clkrst2_base,
305 BIT(2), 0);
306 PRCC_PCLK_STORE(clk, 2, 2);
307
308 clk = clk_reg_prcc_pclk("p2_pclk3", "per2clk", clkrst2_base,
309 BIT(3), 0);
310 PRCC_PCLK_STORE(clk, 2, 3);
311
312 clk = clk_reg_prcc_pclk("p2_pclk4", "per2clk", clkrst2_base,
313 BIT(4), 0);
314 PRCC_PCLK_STORE(clk, 2, 4);
315
316 clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", clkrst2_base,
317 BIT(5), 0);
318 PRCC_PCLK_STORE(clk, 2, 5);
319
320 clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", clkrst2_base,
321 BIT(6), 0);
322 PRCC_PCLK_STORE(clk, 2, 6);
323
324 clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", clkrst2_base,
325 BIT(7), 0);
326 PRCC_PCLK_STORE(clk, 2, 7);
327
328 clk = clk_reg_prcc_pclk("p2_pclk8", "per2clk", clkrst2_base,
329 BIT(8), 0);
330 PRCC_PCLK_STORE(clk, 2, 8);
331
332 clk = clk_reg_prcc_pclk("p2_pclk9", "per2clk", clkrst2_base,
333 BIT(9), 0);
334 PRCC_PCLK_STORE(clk, 2, 9);
335
336 clk = clk_reg_prcc_pclk("p2_pclk10", "per2clk", clkrst2_base,
337 BIT(10), 0);
338 PRCC_PCLK_STORE(clk, 2, 10);
339
340 clk = clk_reg_prcc_pclk("p2_pclk11", "per2clk", clkrst2_base,
341 BIT(11), 0);
342 PRCC_PCLK_STORE(clk, 2, 1);
343
344 clk = clk_reg_prcc_pclk("p2_pclk12", "per2clk", clkrst2_base,
345 BIT(12), 0);
346 PRCC_PCLK_STORE(clk, 2, 12);
347
348 clk = clk_reg_prcc_pclk("p3_pclk0", "per3clk", clkrst3_base,
349 BIT(0), 0);
350 PRCC_PCLK_STORE(clk, 3, 0);
351
352 clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", clkrst3_base,
353 BIT(1), 0);
354 PRCC_PCLK_STORE(clk, 3, 1);
355
356 clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", clkrst3_base,
357 BIT(2), 0);
358 PRCC_PCLK_STORE(clk, 3, 2);
359
360 clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", clkrst3_base,
361 BIT(3), 0);
362 PRCC_PCLK_STORE(clk, 3, 3);
363
364 clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", clkrst3_base,
365 BIT(4), 0);
366 PRCC_PCLK_STORE(clk, 3, 4);
367
368 clk = clk_reg_prcc_pclk("p3_pclk5", "per3clk", clkrst3_base,
369 BIT(5), 0);
370 PRCC_PCLK_STORE(clk, 3, 5);
371
372 clk = clk_reg_prcc_pclk("p3_pclk6", "per3clk", clkrst3_base,
373 BIT(6), 0);
374 PRCC_PCLK_STORE(clk, 3, 6);
375
376 clk = clk_reg_prcc_pclk("p3_pclk7", "per3clk", clkrst3_base,
377 BIT(7), 0);
378 PRCC_PCLK_STORE(clk, 3, 7);
379
380 clk = clk_reg_prcc_pclk("p3_pclk8", "per3clk", clkrst3_base,
381 BIT(8), 0);
382 PRCC_PCLK_STORE(clk, 3, 8);
383
384 clk = clk_reg_prcc_pclk("p5_pclk0", "per5clk", clkrst5_base,
385 BIT(0), 0);
386 PRCC_PCLK_STORE(clk, 5, 0);
387
388 clk = clk_reg_prcc_pclk("p5_pclk1", "per5clk", clkrst5_base,
389 BIT(1), 0);
390 PRCC_PCLK_STORE(clk, 5, 1);
391
392 clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", clkrst6_base,
393 BIT(0), 0);
394 PRCC_PCLK_STORE(clk, 6, 0);
395
396 clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", clkrst6_base,
397 BIT(1), 0);
398 PRCC_PCLK_STORE(clk, 6, 1);
399
400 clk = clk_reg_prcc_pclk("p6_pclk2", "per6clk", clkrst6_base,
401 BIT(2), 0);
402 PRCC_PCLK_STORE(clk, 6, 2);
403
404 clk = clk_reg_prcc_pclk("p6_pclk3", "per6clk", clkrst6_base,
405 BIT(3), 0);
406 PRCC_PCLK_STORE(clk, 6, 3);
407
408 clk = clk_reg_prcc_pclk("p6_pclk4", "per6clk", clkrst6_base,
409 BIT(4), 0);
410 PRCC_PCLK_STORE(clk, 6, 4);
411
412 clk = clk_reg_prcc_pclk("p6_pclk5", "per6clk", clkrst6_base,
413 BIT(5), 0);
414 PRCC_PCLK_STORE(clk, 6, 5);
415
416 clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", clkrst6_base,
417 BIT(6), 0);
418 PRCC_PCLK_STORE(clk, 6, 6);
419
420 clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", clkrst6_base,
421 BIT(7), 0);
422 PRCC_PCLK_STORE(clk, 6, 7);
423
424 /* PRCC K-clocks
425 *
426 * FIXME: Some drivers requires PERPIH[n| to be automatically enabled
427 * by enabling just the K-clock, even if it is not a valid parent to
428 * the K-clock. Until drivers get fixed we might need some kind of
429 * "parent muxed join".
430 */
431
432 /* Periph1 */
433 clk = clk_reg_prcc_kclk("p1_uart0_kclk", "uartclk",
434 clkrst1_base, BIT(0), CLK_SET_RATE_GATE);
435 PRCC_KCLK_STORE(clk, 1, 0);
436
437 clk = clk_reg_prcc_kclk("p1_uart1_kclk", "uartclk",
438 clkrst1_base, BIT(1), CLK_SET_RATE_GATE);
439 PRCC_KCLK_STORE(clk, 1, 1);
440
441 clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk",
442 clkrst1_base, BIT(2), CLK_SET_RATE_GATE);
443 PRCC_KCLK_STORE(clk, 1, 2);
444
445 clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk",
446 clkrst1_base, BIT(3), CLK_SET_RATE_GATE);
447 PRCC_KCLK_STORE(clk, 1, 3);
448
449 clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk",
450 clkrst1_base, BIT(4), CLK_SET_RATE_GATE);
451 PRCC_KCLK_STORE(clk, 1, 4);
452
453 clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk",
454 clkrst1_base, BIT(5), CLK_SET_RATE_GATE);
455 PRCC_KCLK_STORE(clk, 1, 5);
456
457 clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk",
458 clkrst1_base, BIT(6), CLK_SET_RATE_GATE);
459 PRCC_KCLK_STORE(clk, 1, 6);
460
461 clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk",
462 clkrst1_base, BIT(8), CLK_SET_RATE_GATE);
463 PRCC_KCLK_STORE(clk, 1, 8);
464
465 clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk",
466 clkrst1_base, BIT(9), CLK_SET_RATE_GATE);
467 PRCC_KCLK_STORE(clk, 1, 9);
468
469 clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk",
470 clkrst1_base, BIT(10), CLK_SET_RATE_GATE);
471 PRCC_KCLK_STORE(clk, 1, 10);
472
473 /* Periph2 */
474 clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk",
475 clkrst2_base, BIT(0), CLK_SET_RATE_GATE);
476 PRCC_KCLK_STORE(clk, 2, 0);
477
478 clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk",
479 clkrst2_base, BIT(2), CLK_SET_RATE_GATE);
480 PRCC_KCLK_STORE(clk, 2, 2);
481
482 clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk",
483 clkrst2_base, BIT(3), CLK_SET_RATE_GATE);
484 PRCC_KCLK_STORE(clk, 2, 3);
485
486 clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk",
487 clkrst2_base, BIT(4), CLK_SET_RATE_GATE);
488 PRCC_KCLK_STORE(clk, 2, 4);
489
490 clk = clk_reg_prcc_kclk("p2_sdi3_kclk", "sdmmcclk",
491 clkrst2_base, BIT(5), CLK_SET_RATE_GATE);
492 PRCC_KCLK_STORE(clk, 2, 5);
493
494 /* Note that rate is received from parent. */
495 clk = clk_reg_prcc_kclk("p2_ssirx_kclk", "hsirxclk",
496 clkrst2_base, BIT(6),
497 CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT);
498 PRCC_KCLK_STORE(clk, 2, 6);
499
500 clk = clk_reg_prcc_kclk("p2_ssitx_kclk", "hsitxclk",
501 clkrst2_base, BIT(7),
502 CLK_SET_RATE_GATE|CLK_SET_RATE_PARENT);
503 PRCC_KCLK_STORE(clk, 2, 7);
504
505 /* Periph3 */
506 clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk",
507 clkrst3_base, BIT(1), CLK_SET_RATE_GATE);
508 PRCC_KCLK_STORE(clk, 3, 1);
509
510 clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk",
511 clkrst3_base, BIT(2), CLK_SET_RATE_GATE);
512 PRCC_KCLK_STORE(clk, 3, 2);
513
514 clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk",
515 clkrst3_base, BIT(3), CLK_SET_RATE_GATE);
516 PRCC_KCLK_STORE(clk, 3, 3);
517
518 clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk",
519 clkrst3_base, BIT(4), CLK_SET_RATE_GATE);
520 PRCC_KCLK_STORE(clk, 3, 4);
521
522 clk = clk_reg_prcc_kclk("p3_ske_kclk", "rtc32k",
523 clkrst3_base, BIT(5), CLK_SET_RATE_GATE);
524 PRCC_KCLK_STORE(clk, 3, 5);
525
526 clk = clk_reg_prcc_kclk("p3_uart2_kclk", "uartclk",
527 clkrst3_base, BIT(6), CLK_SET_RATE_GATE);
528 PRCC_KCLK_STORE(clk, 3, 6);
529
530 clk = clk_reg_prcc_kclk("p3_sdi5_kclk", "sdmmcclk",
531 clkrst3_base, BIT(7), CLK_SET_RATE_GATE);
532 PRCC_KCLK_STORE(clk, 3, 7);
533
534 /* Periph6 */
535 clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk",
536 clkrst6_base, BIT(0), CLK_SET_RATE_GATE);
537 PRCC_KCLK_STORE(clk, 6, 0);
538
539 for_each_child_of_node(np, child) {
540 static struct clk_onecell_data clk_data;
541
542 if (!of_node_cmp(child->name, "prcmu-clock")) {
543 clk_data.clks = prcmu_clk;
544 clk_data.clk_num = ARRAY_SIZE(prcmu_clk);
545 of_clk_add_provider(child, of_clk_src_onecell_get, &clk_data);
546 }
547 if (!of_node_cmp(child->name, "prcc-periph-clock"))
548 of_clk_add_provider(child, ux500_twocell_get, prcc_pclk);
549
550 if (!of_node_cmp(child->name, "prcc-kernel-clock"))
551 of_clk_add_provider(child, ux500_twocell_get, prcc_kclk);
552
553 if (!of_node_cmp(child->name, "rtc32k-clock"))
554 of_clk_add_provider(child, of_clk_src_simple_get, rtc_clk);
555
556 if (!of_node_cmp(child->name, "smp-twd-clock"))
557 of_clk_add_provider(child, of_clk_src_simple_get, twd_clk);
558 }
559}
diff --git a/drivers/clk/ux500/u8540_clk.c b/drivers/clk/ux500/u8540_clk.c
index f26258869deb..20c8add90d11 100644
--- a/drivers/clk/ux500/u8540_clk.c
+++ b/drivers/clk/ux500/u8540_clk.c
@@ -83,7 +83,7 @@ void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
83 clk_register_clkdev(clk, NULL, "lcd"); 83 clk_register_clkdev(clk, NULL, "lcd");
84 clk_register_clkdev(clk, "lcd", "mcde"); 84 clk_register_clkdev(clk, "lcd", "mcde");
85 85
86 clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BML8580CLK, 86 clk = clk_reg_prcmu_opp_gate("bmlclk", NULL, PRCMU_BMLCLK,
87 CLK_IS_ROOT); 87 CLK_IS_ROOT);
88 clk_register_clkdev(clk, NULL, "bml"); 88 clk_register_clkdev(clk, NULL, "bml");
89 89
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 53f371dcbb6e..b9ce60c301de 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -480,7 +480,6 @@ static struct clk_mgt clk_mgt[PRCMU_NUM_REG_CLOCKS] = {
480 CLK_MGT_ENTRY(PER6CLK, PLL_DIV, true), 480 CLK_MGT_ENTRY(PER6CLK, PLL_DIV, true),
481 CLK_MGT_ENTRY(PER7CLK, PLL_DIV, true), 481 CLK_MGT_ENTRY(PER7CLK, PLL_DIV, true),
482 CLK_MGT_ENTRY(LCDCLK, PLL_FIX, true), 482 CLK_MGT_ENTRY(LCDCLK, PLL_FIX, true),
483 CLK_MGT_ENTRY(BML8580CLK, PLL_DIV, true),
484 CLK_MGT_ENTRY(BMLCLK, PLL_DIV, true), 483 CLK_MGT_ENTRY(BMLCLK, PLL_DIV, true),
485 CLK_MGT_ENTRY(HSITXCLK, PLL_DIV, true), 484 CLK_MGT_ENTRY(HSITXCLK, PLL_DIV, true),
486 CLK_MGT_ENTRY(HSIRXCLK, PLL_DIV, true), 485 CLK_MGT_ENTRY(HSIRXCLK, PLL_DIV, true),
diff --git a/drivers/mfd/dbx500-prcmu-regs.h b/drivers/mfd/dbx500-prcmu-regs.h
index 4f6f0fa5d3b7..7cc32a8ff01c 100644
--- a/drivers/mfd/dbx500-prcmu-regs.h
+++ b/drivers/mfd/dbx500-prcmu-regs.h
@@ -32,7 +32,6 @@
32#define PRCM_PER7CLK_MGT (0x040) 32#define PRCM_PER7CLK_MGT (0x040)
33#define PRCM_LCDCLK_MGT (0x044) 33#define PRCM_LCDCLK_MGT (0x044)
34#define PRCM_BMLCLK_MGT (0x04C) 34#define PRCM_BMLCLK_MGT (0x04C)
35#define PRCM_BML8580CLK_MGT (0x108)
36#define PRCM_HSITXCLK_MGT (0x050) 35#define PRCM_HSITXCLK_MGT (0x050)
37#define PRCM_HSIRXCLK_MGT (0x054) 36#define PRCM_HSIRXCLK_MGT (0x054)
38#define PRCM_HDMICLK_MGT (0x058) 37#define PRCM_HDMICLK_MGT (0x058)
diff --git a/drivers/usb/musb/ux500.c b/drivers/usb/musb/ux500.c
index 59256b12f746..c844499e4479 100644
--- a/drivers/usb/musb/ux500.c
+++ b/drivers/usb/musb/ux500.c
@@ -259,7 +259,7 @@ static int ux500_probe(struct platform_device *pdev)
259 goto err1; 259 goto err1;
260 } 260 }
261 261
262 clk = clk_get(&pdev->dev, "usb"); 262 clk = clk_get(&pdev->dev, NULL);
263 if (IS_ERR(clk)) { 263 if (IS_ERR(clk)) {
264 dev_err(&pdev->dev, "failed to get clock\n"); 264 dev_err(&pdev->dev, "failed to get clock\n");
265 ret = PTR_ERR(clk); 265 ret = PTR_ERR(clk);
diff --git a/include/dt-bindings/mfd/dbx500-prcmu.h b/include/dt-bindings/mfd/dbx500-prcmu.h
new file mode 100644
index 000000000000..552a2d174f01
--- /dev/null
+++ b/include/dt-bindings/mfd/dbx500-prcmu.h
@@ -0,0 +1,83 @@
1/*
2 * This header provides constants for the PRCMU bindings.
3 *
4 */
5
6#ifndef _DT_BINDINGS_MFD_PRCMU_H
7#define _DT_BINDINGS_MFD_PRCMU_H
8
9/*
10 * Clock identifiers.
11 */
12#define ARMCLK 0
13#define PRCMU_ACLK 1
14#define PRCMU_SVAMMCSPCLK 2
15#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */
16#define PRCMU_SIACLK 3
17#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */
18#define PRCMU_SGACLK 4
19#define PRCMU_UARTCLK 5
20#define PRCMU_MSP02CLK 6
21#define PRCMU_MSP1CLK 7
22#define PRCMU_I2CCLK 8
23#define PRCMU_SDMMCCLK 9
24#define PRCMU_SLIMCLK 10
25#define PRCMU_CAMCLK 10 /* DBx540 only. */
26#define PRCMU_PER1CLK 11
27#define PRCMU_PER2CLK 12
28#define PRCMU_PER3CLK 13
29#define PRCMU_PER5CLK 14
30#define PRCMU_PER6CLK 15
31#define PRCMU_PER7CLK 16
32#define PRCMU_LCDCLK 17
33#define PRCMU_BMLCLK 18
34#define PRCMU_HSITXCLK 19
35#define PRCMU_HSIRXCLK 20
36#define PRCMU_HDMICLK 21
37#define PRCMU_APEATCLK 22
38#define PRCMU_APETRACECLK 23
39#define PRCMU_MCDECLK 24
40#define PRCMU_IPI2CCLK 25
41#define PRCMU_DSIALTCLK 26
42#define PRCMU_DMACLK 27
43#define PRCMU_B2R2CLK 28
44#define PRCMU_TVCLK 29
45#define SPARE_UNIPROCLK 30
46#define PRCMU_SSPCLK 31
47#define PRCMU_RNGCLK 32
48#define PRCMU_UICCCLK 33
49#define PRCMU_G1CLK 34 /* DBx540 only. */
50#define PRCMU_HVACLK 35 /* DBx540 only. */
51#define PRCMU_SPARE1CLK 36
52#define PRCMU_SPARE2CLK 37
53
54#define PRCMU_NUM_REG_CLOCKS 38
55
56#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS
57#define PRCMU_SYSCLK 39
58#define PRCMU_CDCLK 40
59#define PRCMU_TIMCLK 41
60#define PRCMU_PLLSOC0 42
61#define PRCMU_PLLSOC1 43
62#define PRCMU_ARMSS 44
63#define PRCMU_PLLDDR 45
64
65/* DSI Clocks */
66#define PRCMU_PLLDSI 46
67#define PRCMU_DSI0CLK 47
68#define PRCMU_DSI1CLK 48
69#define PRCMU_DSI0ESCCLK 49
70#define PRCMU_DSI1ESCCLK 50
71#define PRCMU_DSI2ESCCLK 51
72
73/* LCD DSI PLL - Ux540 only */
74#define PRCMU_PLLDSI_LCD 52
75#define PRCMU_DSI0CLK_LCD 53
76#define PRCMU_DSI1CLK_LCD 54
77#define PRCMU_DSI0ESCCLK_LCD 55
78#define PRCMU_DSI1ESCCLK_LCD 56
79#define PRCMU_DSI2ESCCLK_LCD 57
80
81#define PRCMU_NUM_CLKS 58
82
83#endif
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index ca0790fba2f5..060e11256fbc 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -12,6 +12,8 @@
12#include <linux/notifier.h> 12#include <linux/notifier.h>
13#include <linux/err.h> 13#include <linux/err.h>
14 14
15#include <dt-bindings/mfd/dbx500-prcmu.h> /* For clock identifiers */
16
15/* Offset for the firmware version within the TCPM */ 17/* Offset for the firmware version within the TCPM */
16#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4 18#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
17#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8 19#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8
@@ -94,74 +96,6 @@ enum prcmu_wakeup_index {
94#define PRCMU_CLKSRC_ARMCLKFIX 0x46 96#define PRCMU_CLKSRC_ARMCLKFIX 0x46
95#define PRCMU_CLKSRC_HDMICLK 0x47 97#define PRCMU_CLKSRC_HDMICLK 0x47
96 98
97/*
98 * Clock identifiers.
99 */
100enum prcmu_clock {
101 PRCMU_SGACLK,
102 PRCMU_UARTCLK,
103 PRCMU_MSP02CLK,
104 PRCMU_MSP1CLK,
105 PRCMU_I2CCLK,
106 PRCMU_SDMMCCLK,
107 PRCMU_SPARE1CLK,
108 PRCMU_SLIMCLK,
109 PRCMU_PER1CLK,
110 PRCMU_PER2CLK,
111 PRCMU_PER3CLK,
112 PRCMU_PER5CLK,
113 PRCMU_PER6CLK,
114 PRCMU_PER7CLK,
115 PRCMU_LCDCLK,
116 PRCMU_BMLCLK,
117 PRCMU_HSITXCLK,
118 PRCMU_HSIRXCLK,
119 PRCMU_HDMICLK,
120 PRCMU_APEATCLK,
121 PRCMU_APETRACECLK,
122 PRCMU_MCDECLK,
123 PRCMU_IPI2CCLK,
124 PRCMU_DSIALTCLK,
125 PRCMU_DMACLK,
126 PRCMU_B2R2CLK,
127 PRCMU_TVCLK,
128 PRCMU_SSPCLK,
129 PRCMU_RNGCLK,
130 PRCMU_UICCCLK,
131 PRCMU_PWMCLK,
132 PRCMU_IRDACLK,
133 PRCMU_IRRCCLK,
134 PRCMU_SIACLK,
135 PRCMU_SVACLK,
136 PRCMU_ACLK,
137 PRCMU_HVACLK, /* Ux540 only */
138 PRCMU_G1CLK, /* Ux540 only */
139 PRCMU_SDMMCHCLK,
140 PRCMU_CAMCLK,
141 PRCMU_BML8580CLK,
142 PRCMU_NUM_REG_CLOCKS,
143 PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS,
144 PRCMU_CDCLK,
145 PRCMU_TIMCLK,
146 PRCMU_PLLSOC0,
147 PRCMU_PLLSOC1,
148 PRCMU_ARMSS,
149 PRCMU_PLLDDR,
150 PRCMU_PLLDSI,
151 PRCMU_DSI0CLK,
152 PRCMU_DSI1CLK,
153 PRCMU_DSI0ESCCLK,
154 PRCMU_DSI1ESCCLK,
155 PRCMU_DSI2ESCCLK,
156 /* LCD DSI PLL - Ux540 only */
157 PRCMU_PLLDSI_LCD,
158 PRCMU_DSI0CLK_LCD,
159 PRCMU_DSI1CLK_LCD,
160 PRCMU_DSI0ESCCLK_LCD,
161 PRCMU_DSI1ESCCLK_LCD,
162 PRCMU_DSI2ESCCLK_LCD,
163};
164
165/** 99/**
166 * enum prcmu_wdog_id - PRCMU watchdog IDs 100 * enum prcmu_wdog_id - PRCMU watchdog IDs
167 * @PRCMU_WDOG_ALL: use all timers 101 * @PRCMU_WDOG_ALL: use all timers
diff --git a/include/linux/platform_data/clk-ux500.h b/include/linux/platform_data/clk-ux500.h
index 9d98f3aaa16c..97baf831e071 100644
--- a/include/linux/platform_data/clk-ux500.h
+++ b/include/linux/platform_data/clk-ux500.h
@@ -10,6 +10,9 @@
10#ifndef __CLK_UX500_H 10#ifndef __CLK_UX500_H
11#define __CLK_UX500_H 11#define __CLK_UX500_H
12 12
13void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
14 u32 clkrst5_base, u32 clkrst6_base);
15
13void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, 16void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
14 u32 clkrst5_base, u32 clkrst6_base); 17 u32 clkrst5_base, u32 clkrst6_base);
15void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, 18void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-23 21:33:34 -0400