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authorKrzysztof Kozlowski <k.kozlowski@samsung.com>2014-04-16 10:36:45 -0400
committerThomas Gleixner <tglx@linutronix.de>2014-04-17 17:36:28 -0400
commit8db6e5104b77de5d0b7002b95069da0992a34be9 (patch)
tree3f5608957c40f5ee76e6991f5e1e01669c3841aa
parent30ccf03b4a6a2102a2219058bdc6d779dc637dd7 (diff)
clocksource: Exynos_mct: Register clock event after request_irq()
After hotplugging CPU1 the first call of interrupt handler for CPU1 oneshot timer was called on CPU0 because it fired before setting IRQ affinity. Affected are SoCs where Multi Core Timer interrupts are shared (SPI), e.g. Exynos 4210. During setup of the MCT timers the clock event device should be registered after setting the affinity for interrupt. This will prevent starting the timer too early. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Tomasz Figa <t.figa@samsung.com>, Cc: Daniel Lezcano <daniel.lezcano@linaro.org>, Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: linux-arm-kernel@lists.infradead.org, Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/20140416143316.299247848@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--drivers/clocksource/exynos_mct.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index b2d416368711..acf5a329d538 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -416,8 +416,6 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt)
416 evt->set_mode = exynos4_tick_set_mode; 416 evt->set_mode = exynos4_tick_set_mode;
417 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 417 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
418 evt->rating = 450; 418 evt->rating = 450;
419 clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
420 0xf, 0x7fffffff);
421 419
422 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); 420 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
423 421
@@ -434,6 +432,8 @@ static int exynos4_local_timer_setup(struct clock_event_device *evt)
434 } else { 432 } else {
435 enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0); 433 enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0);
436 } 434 }
435 clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
436 0xf, 0x7fffffff);
437 437
438 return 0; 438 return 0;
439} 439}