diff options
| author | Rabin Vincent <rabin.vincent@stericsson.com> | 2010-02-28 23:01:25 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-03-07 05:24:25 -0500 |
| commit | 8d2b09f5b0de2c0e37f50d04980bc81098988239 (patch) | |
| tree | 7bd8d81e4c5cc55adeaddb64e63e7d60d09ec5db | |
| parent | 51d47999b9452a8dc7ae58a11423c5db28f21ae1 (diff) | |
ARM: 5961/1: ux500: fix CLKRST addresses
Correct the base addresses of the CLKRST registers.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mach-ux500/include/mach/hardware.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h index 6da650202dc7..04ea836969b3 100644 --- a/arch/arm/mach-ux500/include/mach/hardware.h +++ b/arch/arm/mach-ux500/include/mach/hardware.h | |||
| @@ -68,12 +68,12 @@ | |||
| 68 | #define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) | 68 | #define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) |
| 69 | #define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000) | 69 | #define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000) |
| 70 | #define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) | 70 | #define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) |
| 71 | #define U8500_CLKRST6_BASE (U8500_PER7_BASE + 0xf000) | 71 | #define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) |
| 72 | 72 | ||
| 73 | /* per5 base addressess */ | 73 | /* per5 base addressess */ |
| 74 | #define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) | 74 | #define U8500_USBOTG_BASE (U8500_PER5_BASE + 0x00000) |
| 75 | #define U8500_GPIO5_BASE (U8500_PER5_BASE + 0x1e000) | 75 | #define U8500_GPIO5_BASE (U8500_PER5_BASE + 0x1e000) |
| 76 | #define U8500_CLKRST5_BASE (U8500_PER7_BASE + 0x1f000) | 76 | #define U8500_CLKRST5_BASE (U8500_PER5_BASE + 0x1f000) |
| 77 | 77 | ||
| 78 | /* per4 base addressess */ | 78 | /* per4 base addressess */ |
| 79 | #define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x0000) | 79 | #define U8500_BACKUPRAM0_BASE (U8500_PER4_BASE + 0x0000) |
| @@ -95,7 +95,7 @@ | |||
| 95 | #define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) | 95 | #define U8500_UART2_BASE (U8500_PER3_BASE + 0x7000) |
| 96 | #define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) | 96 | #define U8500_SDI5_BASE (U8500_PER3_BASE + 0x8000) |
| 97 | #define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xe000) | 97 | #define U8500_GPIO3_BASE (U8500_PER3_BASE + 0xe000) |
| 98 | #define U8500_CLKRST3_BASE (U8500_PER7_BASE + 0xf000) | 98 | #define U8500_CLKRST3_BASE (U8500_PER3_BASE + 0xf000) |
| 99 | 99 | ||
| 100 | /* per2 base addressess */ | 100 | /* per2 base addressess */ |
| 101 | #define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) | 101 | #define U8500_I2C3_BASE (U8500_PER2_BASE + 0x0000) |
| @@ -123,7 +123,7 @@ | |||
| 123 | #define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000) | 123 | #define U8500_SPI3_BASE (U8500_PER1_BASE + 0x9000) |
| 124 | #define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xa000) | 124 | #define U8500_SLIM0_BASE (U8500_PER1_BASE + 0xa000) |
| 125 | #define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000) | 125 | #define U8500_GPIO1_BASE (U8500_PER1_BASE + 0xe000) |
| 126 | #define U8500_CLKRST1_BASE (U8500_PER2_BASE + 0xf000) | 126 | #define U8500_CLKRST1_BASE (U8500_PER1_BASE + 0xf000) |
| 127 | 127 | ||
| 128 | /* ST-Ericsson modified pl022 id */ | 128 | /* ST-Ericsson modified pl022 id */ |
| 129 | #define SSP_PER_ID 0x01080022 | 129 | #define SSP_PER_ID 0x01080022 |