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authorAndrew Bresticker <abrestic@chromium.org>2015-02-24 22:56:06 -0500
committerRalf Baechle <ralf@linux-mips.org>2015-03-31 05:59:24 -0400
commit8cb94af684ecfea38e8c9ff8d8519ff751a66968 (patch)
treebb23209db689b754513bb84e20148aae86aaec8c
parent44960ab862a6db088f46fbf582d16a25fb999a83 (diff)
CLK: Pistachio: Register system interface gate clocks
Register the system interface gate clocks provided by the peripheral general control block. These clocks gate register access for various peripherals. Signed-off-by: Damien Horsley <Damien.Horsley@imgtec.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: James Hartley <james.hartley@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Patchwork: https://patchwork.linux-mips.org/patch/9322/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--drivers/clk/pistachio/clk-pistachio.c42
1 files changed, 42 insertions, 0 deletions
diff --git a/drivers/clk/pistachio/clk-pistachio.c b/drivers/clk/pistachio/clk-pistachio.c
index 0eabb542b006..3351808ea42a 100644
--- a/drivers/clk/pistachio/clk-pistachio.c
+++ b/drivers/clk/pistachio/clk-pistachio.c
@@ -264,3 +264,45 @@ static void __init pistachio_clk_periph_init(struct device_node *np)
264} 264}
265CLK_OF_DECLARE(pistachio_clk_periph, "img,pistachio-clk-periph", 265CLK_OF_DECLARE(pistachio_clk_periph, "img,pistachio-clk-periph",
266 pistachio_clk_periph_init); 266 pistachio_clk_periph_init);
267
268static struct pistachio_gate pistachio_sys_gates[] __initdata = {
269 GATE(SYS_CLK_I2C0, "i2c0_sys", "sys", 0x8, 0),
270 GATE(SYS_CLK_I2C1, "i2c1_sys", "sys", 0x8, 1),
271 GATE(SYS_CLK_I2C2, "i2c2_sys", "sys", 0x8, 2),
272 GATE(SYS_CLK_I2C3, "i2c3_sys", "sys", 0x8, 3),
273 GATE(SYS_CLK_I2S_IN, "i2s_in_sys", "sys", 0x8, 4),
274 GATE(SYS_CLK_PAUD_OUT, "paud_out_sys", "sys", 0x8, 5),
275 GATE(SYS_CLK_SPDIF_OUT, "spdif_out_sys", "sys", 0x8, 6),
276 GATE(SYS_CLK_SPI0_MASTER, "spi0_master_sys", "sys", 0x8, 7),
277 GATE(SYS_CLK_SPI0_SLAVE, "spi0_slave_sys", "sys", 0x8, 8),
278 GATE(SYS_CLK_PWM, "pwm_sys", "sys", 0x8, 9),
279 GATE(SYS_CLK_UART0, "uart0_sys", "sys", 0x8, 10),
280 GATE(SYS_CLK_UART1, "uart1_sys", "sys", 0x8, 11),
281 GATE(SYS_CLK_SPI1, "spi1_sys", "sys", 0x8, 12),
282 GATE(SYS_CLK_MDC, "mdc_sys", "sys", 0x8, 13),
283 GATE(SYS_CLK_SD_HOST, "sd_host_sys", "sys", 0x8, 14),
284 GATE(SYS_CLK_ENET, "enet_sys", "sys", 0x8, 15),
285 GATE(SYS_CLK_IR, "ir_sys", "sys", 0x8, 16),
286 GATE(SYS_CLK_WD, "wd_sys", "sys", 0x8, 17),
287 GATE(SYS_CLK_TIMER, "timer_sys", "sys", 0x8, 18),
288 GATE(SYS_CLK_I2S_OUT, "i2s_out_sys", "sys", 0x8, 24),
289 GATE(SYS_CLK_SPDIF_IN, "spdif_in_sys", "sys", 0x8, 25),
290 GATE(SYS_CLK_EVENT_TIMER, "event_timer_sys", "sys", 0x8, 26),
291 GATE(SYS_CLK_HASH, "hash_sys", "sys", 0x8, 27),
292};
293
294static void __init pistachio_cr_periph_init(struct device_node *np)
295{
296 struct pistachio_clk_provider *p;
297
298 p = pistachio_clk_alloc_provider(np, SYS_CLK_NR_CLKS);
299 if (!p)
300 return;
301
302 pistachio_clk_register_gate(p, pistachio_sys_gates,
303 ARRAY_SIZE(pistachio_sys_gates));
304
305 pistachio_clk_register_provider(p);
306}
307CLK_OF_DECLARE(pistachio_cr_periph, "img,pistachio-cr-periph",
308 pistachio_cr_periph_init);