diff options
author | David S. Miller <davem@davemloft.net> | 2013-01-16 14:31:56 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2013-01-16 14:31:56 -0500 |
commit | 8c174e6f77b37fcbd84d7c3b6d65414fbb444219 (patch) | |
tree | 991cbc7151d6c76f6575f176235021ee126483a7 | |
parent | 757b8b1d2bfa1210592bfd2984852b155eb58746 (diff) | |
parent | d60923c465809cec44fb08c53da6cf0c53040dc1 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next
Jeff Kirsher says:
====================
This series contains updates to e1000e only.
v2- updates patch 09/15 "e1000e: resolve checkpatch PREFER_PR_LEVEL warning"
based on feedback from Joe Perches.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/defines.h | 10 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/e1000.h | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/ethtool.c | 1 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/hw.h | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/ich8lan.c | 213 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/mac.c | 125 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/netdev.c | 66 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/nvm.c | 26 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/param.c | 3 |
9 files changed, 339 insertions, 111 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h index 02a12b69555f..7326ea2fef8f 100644 --- a/drivers/net/ethernet/intel/e1000e/defines.h +++ b/drivers/net/ethernet/intel/e1000e/defines.h | |||
@@ -241,9 +241,9 @@ | |||
241 | #define E1000_CTRL_VME 0x40000000 /* IEEE VLAN mode enable */ | 241 | #define E1000_CTRL_VME 0x40000000 /* IEEE VLAN mode enable */ |
242 | #define E1000_CTRL_PHY_RST 0x80000000 /* PHY Reset */ | 242 | #define E1000_CTRL_PHY_RST 0x80000000 /* PHY Reset */ |
243 | 243 | ||
244 | /* Bit definitions for the Management Data IO (MDIO) and Management Data | 244 | #define E1000_PCS_LCTL_FORCE_FCTRL 0x80 |
245 | * Clock (MDC) pins in the Device Control Register. | 245 | |
246 | */ | 246 | #define E1000_PCS_LSTS_AN_COMPLETE 0x10000 |
247 | 247 | ||
248 | /* Device Status */ | 248 | /* Device Status */ |
249 | #define E1000_STATUS_FD 0x00000001 /* Full duplex.0=half,1=full */ | 249 | #define E1000_STATUS_FD 0x00000001 /* Full duplex.0=half,1=full */ |
@@ -639,6 +639,10 @@ | |||
639 | /* NVM Word Offsets */ | 639 | /* NVM Word Offsets */ |
640 | #define NVM_COMPAT 0x0003 | 640 | #define NVM_COMPAT 0x0003 |
641 | #define NVM_ID_LED_SETTINGS 0x0004 | 641 | #define NVM_ID_LED_SETTINGS 0x0004 |
642 | #define NVM_FUTURE_INIT_WORD1 0x0019 | ||
643 | #define NVM_COMPAT_VALID_CSUM 0x0001 | ||
644 | #define NVM_FUTURE_INIT_WORD1_VALID_CSUM 0x0040 | ||
645 | |||
642 | #define NVM_INIT_CONTROL2_REG 0x000F | 646 | #define NVM_INIT_CONTROL2_REG 0x000F |
643 | #define NVM_INIT_CONTROL3_PORT_B 0x0014 | 647 | #define NVM_INIT_CONTROL3_PORT_B 0x0014 |
644 | #define NVM_INIT_3GIO_3 0x001A | 648 | #define NVM_INIT_3GIO_3 0x001A |
diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h index 6782a2eea1bc..3f8bbc31795c 100644 --- a/drivers/net/ethernet/intel/e1000e/e1000.h +++ b/drivers/net/ethernet/intel/e1000e/e1000.h | |||
@@ -447,7 +447,7 @@ struct e1000_info { | |||
447 | #define FLAG_MSI_ENABLED (1 << 27) | 447 | #define FLAG_MSI_ENABLED (1 << 27) |
448 | /* reserved (1 << 28) */ | 448 | /* reserved (1 << 28) */ |
449 | #define FLAG_TSO_FORCE (1 << 29) | 449 | #define FLAG_TSO_FORCE (1 << 29) |
450 | #define FLAG_RX_RESTART_NOW (1 << 30) | 450 | #define FLAG_RESTART_NOW (1 << 30) |
451 | #define FLAG_MSI_TEST_FAILED (1 << 31) | 451 | #define FLAG_MSI_TEST_FAILED (1 << 31) |
452 | 452 | ||
453 | #define FLAG2_CRC_STRIPPING (1 << 0) | 453 | #define FLAG2_CRC_STRIPPING (1 << 0) |
diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c index f95bc6ee1c22..2225603a8a28 100644 --- a/drivers/net/ethernet/intel/e1000e/ethtool.c +++ b/drivers/net/ethernet/intel/e1000e/ethtool.c | |||
@@ -98,7 +98,6 @@ static const struct e1000_stats e1000_gstrings_stats[] = { | |||
98 | E1000_STAT("rx_flow_control_xoff", stats.xoffrxc), | 98 | E1000_STAT("rx_flow_control_xoff", stats.xoffrxc), |
99 | E1000_STAT("tx_flow_control_xon", stats.xontxc), | 99 | E1000_STAT("tx_flow_control_xon", stats.xontxc), |
100 | E1000_STAT("tx_flow_control_xoff", stats.xofftxc), | 100 | E1000_STAT("tx_flow_control_xoff", stats.xofftxc), |
101 | E1000_STAT("rx_long_byte_count", stats.gorc), | ||
102 | E1000_STAT("rx_csum_offload_good", hw_csum_good), | 101 | E1000_STAT("rx_csum_offload_good", hw_csum_good), |
103 | E1000_STAT("rx_csum_offload_errors", hw_csum_err), | 102 | E1000_STAT("rx_csum_offload_errors", hw_csum_err), |
104 | E1000_STAT("rx_header_split", rx_hdr_split), | 103 | E1000_STAT("rx_header_split", rx_hdr_split), |
diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h index cf217777586c..06239fe47db1 100644 --- a/drivers/net/ethernet/intel/e1000e/hw.h +++ b/drivers/net/ethernet/intel/e1000e/hw.h | |||
@@ -191,6 +191,10 @@ enum e1e_registers { | |||
191 | E1000_ICTXQMTC = 0x0411C, /* Irq Cause Tx Queue MinThreshold Count */ | 191 | E1000_ICTXQMTC = 0x0411C, /* Irq Cause Tx Queue MinThreshold Count */ |
192 | E1000_ICRXDMTC = 0x04120, /* Irq Cause Rx Desc MinThreshold Count */ | 192 | E1000_ICRXDMTC = 0x04120, /* Irq Cause Rx Desc MinThreshold Count */ |
193 | E1000_ICRXOC = 0x04124, /* Irq Cause Receiver Overrun Count */ | 193 | E1000_ICRXOC = 0x04124, /* Irq Cause Receiver Overrun Count */ |
194 | E1000_PCS_LCTL = 0x04208, /* PCS Link Control - RW */ | ||
195 | E1000_PCS_LSTAT = 0x0420C, /* PCS Link Status - RO */ | ||
196 | E1000_PCS_ANADV = 0x04218, /* AN advertisement - RW */ | ||
197 | E1000_PCS_LPAB = 0x0421C, /* Link Partner Ability - RW */ | ||
194 | E1000_RXCSUM = 0x05000, /* Rx Checksum Control - RW */ | 198 | E1000_RXCSUM = 0x05000, /* Rx Checksum Control - RW */ |
195 | E1000_RFCTL = 0x05008, /* Receive Filter Control */ | 199 | E1000_RFCTL = 0x05008, /* Receive Filter Control */ |
196 | E1000_MTA = 0x05200, /* Multicast Table Array - RW Array */ | 200 | E1000_MTA = 0x05200, /* Multicast Table Array - RW Array */ |
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index 976336547607..051dfda75fc0 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c | |||
@@ -150,18 +150,25 @@ | |||
150 | 150 | ||
151 | /* PHY Low Power Idle Control */ | 151 | /* PHY Low Power Idle Control */ |
152 | #define I82579_LPI_CTRL PHY_REG(772, 20) | 152 | #define I82579_LPI_CTRL PHY_REG(772, 20) |
153 | #define I82579_LPI_CTRL_100_ENABLE 0x2000 | ||
154 | #define I82579_LPI_CTRL_1000_ENABLE 0x4000 | ||
153 | #define I82579_LPI_CTRL_ENABLE_MASK 0x6000 | 155 | #define I82579_LPI_CTRL_ENABLE_MASK 0x6000 |
154 | #define I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT 0x80 | 156 | #define I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT 0x80 |
155 | 157 | ||
156 | /* EMI Registers */ | 158 | /* Extended Management Interface (EMI) Registers */ |
157 | #define I82579_EMI_ADDR 0x10 | 159 | #define I82579_EMI_ADDR 0x10 |
158 | #define I82579_EMI_DATA 0x11 | 160 | #define I82579_EMI_DATA 0x11 |
159 | #define I82579_LPI_UPDATE_TIMER 0x4805 /* in 40ns units + 40 ns base value */ | 161 | #define I82579_LPI_UPDATE_TIMER 0x4805 /* in 40ns units + 40 ns base value */ |
160 | #define I82579_MSE_THRESHOLD 0x084F /* Mean Square Error Threshold */ | 162 | #define I82579_MSE_THRESHOLD 0x084F /* 82579 Mean Square Error Threshold */ |
163 | #define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */ | ||
161 | #define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */ | 164 | #define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */ |
165 | #define I82579_EEE_PCS_STATUS 0x182D /* IEEE MMD Register 3.1 >> 8 */ | ||
166 | #define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */ | ||
167 | #define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE supported */ | ||
168 | #define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE supported */ | ||
169 | #define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */ | ||
162 | #define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */ | 170 | #define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */ |
163 | #define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */ | 171 | #define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */ |
164 | #define I217_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE supported */ | ||
165 | 172 | ||
166 | /* Intel Rapid Start Technology Support */ | 173 | /* Intel Rapid Start Technology Support */ |
167 | #define I217_PROXY_CTRL BM_PHY_REG(BM_WUC_PAGE, 70) | 174 | #define I217_PROXY_CTRL BM_PHY_REG(BM_WUC_PAGE, 70) |
@@ -789,57 +796,139 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) | |||
789 | } | 796 | } |
790 | 797 | ||
791 | /** | 798 | /** |
799 | * __e1000_access_emi_reg_locked - Read/write EMI register | ||
800 | * @hw: pointer to the HW structure | ||
801 | * @addr: EMI address to program | ||
802 | * @data: pointer to value to read/write from/to the EMI address | ||
803 | * @read: boolean flag to indicate read or write | ||
804 | * | ||
805 | * This helper function assumes the SW/FW/HW Semaphore is already acquired. | ||
806 | **/ | ||
807 | static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address, | ||
808 | u16 *data, bool read) | ||
809 | { | ||
810 | s32 ret_val = 0; | ||
811 | |||
812 | ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, address); | ||
813 | if (ret_val) | ||
814 | return ret_val; | ||
815 | |||
816 | if (read) | ||
817 | ret_val = e1e_rphy_locked(hw, I82579_EMI_DATA, data); | ||
818 | else | ||
819 | ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, *data); | ||
820 | |||
821 | return ret_val; | ||
822 | } | ||
823 | |||
824 | /** | ||
825 | * e1000_read_emi_reg_locked - Read Extended Management Interface register | ||
826 | * @hw: pointer to the HW structure | ||
827 | * @addr: EMI address to program | ||
828 | * @data: value to be read from the EMI address | ||
829 | * | ||
830 | * Assumes the SW/FW/HW Semaphore is already acquired. | ||
831 | **/ | ||
832 | static s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data) | ||
833 | { | ||
834 | return __e1000_access_emi_reg_locked(hw, addr, data, true); | ||
835 | } | ||
836 | |||
837 | /** | ||
838 | * e1000_write_emi_reg_locked - Write Extended Management Interface register | ||
839 | * @hw: pointer to the HW structure | ||
840 | * @addr: EMI address to program | ||
841 | * @data: value to be written to the EMI address | ||
842 | * | ||
843 | * Assumes the SW/FW/HW Semaphore is already acquired. | ||
844 | **/ | ||
845 | static s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data) | ||
846 | { | ||
847 | return __e1000_access_emi_reg_locked(hw, addr, &data, false); | ||
848 | } | ||
849 | |||
850 | /** | ||
792 | * e1000_set_eee_pchlan - Enable/disable EEE support | 851 | * e1000_set_eee_pchlan - Enable/disable EEE support |
793 | * @hw: pointer to the HW structure | 852 | * @hw: pointer to the HW structure |
794 | * | 853 | * |
795 | * Enable/disable EEE based on setting in dev_spec structure. The bits in | 854 | * Enable/disable EEE based on setting in dev_spec structure, the duplex of |
796 | * the LPI Control register will remain set only if/when link is up. | 855 | * the link and the EEE capabilities of the link partner. The LPI Control |
856 | * register bits will remain set only if/when link is up. | ||
797 | **/ | 857 | **/ |
798 | static s32 e1000_set_eee_pchlan(struct e1000_hw *hw) | 858 | static s32 e1000_set_eee_pchlan(struct e1000_hw *hw) |
799 | { | 859 | { |
800 | struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; | 860 | struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; |
801 | s32 ret_val = 0; | 861 | s32 ret_val; |
802 | u16 phy_reg; | 862 | u16 lpi_ctrl; |
803 | 863 | ||
804 | if ((hw->phy.type != e1000_phy_82579) && | 864 | if ((hw->phy.type != e1000_phy_82579) && |
805 | (hw->phy.type != e1000_phy_i217)) | 865 | (hw->phy.type != e1000_phy_i217)) |
806 | return 0; | 866 | return 0; |
807 | 867 | ||
808 | ret_val = e1e_rphy(hw, I82579_LPI_CTRL, &phy_reg); | 868 | ret_val = hw->phy.ops.acquire(hw); |
809 | if (ret_val) | 869 | if (ret_val) |
810 | return ret_val; | 870 | return ret_val; |
811 | 871 | ||
812 | if (dev_spec->eee_disable) | 872 | ret_val = e1e_rphy_locked(hw, I82579_LPI_CTRL, &lpi_ctrl); |
813 | phy_reg &= ~I82579_LPI_CTRL_ENABLE_MASK; | ||
814 | else | ||
815 | phy_reg |= I82579_LPI_CTRL_ENABLE_MASK; | ||
816 | |||
817 | ret_val = e1e_wphy(hw, I82579_LPI_CTRL, phy_reg); | ||
818 | if (ret_val) | 873 | if (ret_val) |
819 | return ret_val; | 874 | goto release; |
875 | |||
876 | /* Clear bits that enable EEE in various speeds */ | ||
877 | lpi_ctrl &= ~I82579_LPI_CTRL_ENABLE_MASK; | ||
878 | |||
879 | /* Enable EEE if not disabled by user */ | ||
880 | if (!dev_spec->eee_disable) { | ||
881 | u16 lpa, pcs_status, data; | ||
820 | 882 | ||
821 | if ((hw->phy.type == e1000_phy_i217) && !dev_spec->eee_disable) { | ||
822 | /* Save off link partner's EEE ability */ | 883 | /* Save off link partner's EEE ability */ |
823 | ret_val = hw->phy.ops.acquire(hw); | 884 | switch (hw->phy.type) { |
824 | if (ret_val) | 885 | case e1000_phy_82579: |
825 | return ret_val; | 886 | lpa = I82579_EEE_LP_ABILITY; |
826 | ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, | 887 | pcs_status = I82579_EEE_PCS_STATUS; |
827 | I217_EEE_LP_ABILITY); | 888 | break; |
889 | case e1000_phy_i217: | ||
890 | lpa = I217_EEE_LP_ABILITY; | ||
891 | pcs_status = I217_EEE_PCS_STATUS; | ||
892 | break; | ||
893 | default: | ||
894 | ret_val = -E1000_ERR_PHY; | ||
895 | goto release; | ||
896 | } | ||
897 | ret_val = e1000_read_emi_reg_locked(hw, lpa, | ||
898 | &dev_spec->eee_lp_ability); | ||
828 | if (ret_val) | 899 | if (ret_val) |
829 | goto release; | 900 | goto release; |
830 | e1e_rphy_locked(hw, I82579_EMI_DATA, &dev_spec->eee_lp_ability); | ||
831 | 901 | ||
832 | /* EEE is not supported in 100Half, so ignore partner's EEE | 902 | /* Enable EEE only for speeds in which the link partner is |
833 | * in 100 ability if full-duplex is not advertised. | 903 | * EEE capable. |
834 | */ | 904 | */ |
835 | e1e_rphy_locked(hw, PHY_LP_ABILITY, &phy_reg); | 905 | if (dev_spec->eee_lp_ability & I82579_EEE_1000_SUPPORTED) |
836 | if (!(phy_reg & NWAY_LPAR_100TX_FD_CAPS)) | 906 | lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE; |
837 | dev_spec->eee_lp_ability &= ~I217_EEE_100_SUPPORTED; | 907 | |
838 | release: | 908 | if (dev_spec->eee_lp_ability & I82579_EEE_100_SUPPORTED) { |
839 | hw->phy.ops.release(hw); | 909 | e1e_rphy_locked(hw, PHY_LP_ABILITY, &data); |
910 | if (data & NWAY_LPAR_100TX_FD_CAPS) | ||
911 | lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE; | ||
912 | else | ||
913 | /* EEE is not supported in 100Half, so ignore | ||
914 | * partner's EEE in 100 ability if full-duplex | ||
915 | * is not advertised. | ||
916 | */ | ||
917 | dev_spec->eee_lp_ability &= | ||
918 | ~I82579_EEE_100_SUPPORTED; | ||
919 | } | ||
920 | |||
921 | /* R/Clr IEEE MMD 3.1 bits 11:10 - Tx/Rx LPI Received */ | ||
922 | ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data); | ||
923 | if (ret_val) | ||
924 | goto release; | ||
840 | } | 925 | } |
841 | 926 | ||
842 | return 0; | 927 | ret_val = e1e_wphy_locked(hw, I82579_LPI_CTRL, lpi_ctrl); |
928 | release: | ||
929 | hw->phy.ops.release(hw); | ||
930 | |||
931 | return ret_val; | ||
843 | } | 932 | } |
844 | 933 | ||
845 | /** | 934 | /** |
@@ -1757,6 +1846,11 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) | |||
1757 | if (ret_val) | 1846 | if (ret_val) |
1758 | goto release; | 1847 | goto release; |
1759 | ret_val = e1e_wphy_locked(hw, BM_PORT_GEN_CFG, phy_data & 0x00FF); | 1848 | ret_val = e1e_wphy_locked(hw, BM_PORT_GEN_CFG, phy_data & 0x00FF); |
1849 | if (ret_val) | ||
1850 | goto release; | ||
1851 | |||
1852 | /* set MSE higher to enable link to stay up when noise is high */ | ||
1853 | ret_val = e1000_write_emi_reg_locked(hw, I82577_MSE_THRESHOLD, 0x0034); | ||
1760 | release: | 1854 | release: |
1761 | hw->phy.ops.release(hw); | 1855 | hw->phy.ops.release(hw); |
1762 | 1856 | ||
@@ -1983,22 +2077,18 @@ static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw) | |||
1983 | 2077 | ||
1984 | /* Set MDIO slow mode before any other MDIO access */ | 2078 | /* Set MDIO slow mode before any other MDIO access */ |
1985 | ret_val = e1000_set_mdio_slow_mode_hv(hw); | 2079 | ret_val = e1000_set_mdio_slow_mode_hv(hw); |
2080 | if (ret_val) | ||
2081 | return ret_val; | ||
1986 | 2082 | ||
1987 | ret_val = hw->phy.ops.acquire(hw); | 2083 | ret_val = hw->phy.ops.acquire(hw); |
1988 | if (ret_val) | 2084 | if (ret_val) |
1989 | return ret_val; | 2085 | return ret_val; |
1990 | ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, I82579_MSE_THRESHOLD); | ||
1991 | if (ret_val) | ||
1992 | goto release; | ||
1993 | /* set MSE higher to enable link to stay up when noise is high */ | 2086 | /* set MSE higher to enable link to stay up when noise is high */ |
1994 | ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x0034); | 2087 | ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_THRESHOLD, 0x0034); |
1995 | if (ret_val) | ||
1996 | goto release; | ||
1997 | ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, I82579_MSE_LINK_DOWN); | ||
1998 | if (ret_val) | 2088 | if (ret_val) |
1999 | goto release; | 2089 | goto release; |
2000 | /* drop link after 5 times MSE threshold was reached */ | 2090 | /* drop link after 5 times MSE threshold was reached */ |
2001 | ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x0005); | 2091 | ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_LINK_DOWN, 0x0005); |
2002 | release: | 2092 | release: |
2003 | hw->phy.ops.release(hw); | 2093 | hw->phy.ops.release(hw); |
2004 | 2094 | ||
@@ -2172,10 +2262,9 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw) | |||
2172 | ret_val = hw->phy.ops.acquire(hw); | 2262 | ret_val = hw->phy.ops.acquire(hw); |
2173 | if (ret_val) | 2263 | if (ret_val) |
2174 | return ret_val; | 2264 | return ret_val; |
2175 | ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, | 2265 | ret_val = e1000_write_emi_reg_locked(hw, |
2176 | I82579_LPI_UPDATE_TIMER); | 2266 | I82579_LPI_UPDATE_TIMER, |
2177 | if (!ret_val) | 2267 | 0x1387); |
2178 | ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x1387); | ||
2179 | hw->phy.ops.release(hw); | 2268 | hw->phy.ops.release(hw); |
2180 | } | 2269 | } |
2181 | 2270 | ||
@@ -2949,19 +3038,32 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
2949 | { | 3038 | { |
2950 | s32 ret_val; | 3039 | s32 ret_val; |
2951 | u16 data; | 3040 | u16 data; |
3041 | u16 word; | ||
3042 | u16 valid_csum_mask; | ||
2952 | 3043 | ||
2953 | /* Read 0x19 and check bit 6. If this bit is 0, the checksum | 3044 | /* Read NVM and check Invalid Image CSUM bit. If this bit is 0, |
2954 | * needs to be fixed. This bit is an indication that the NVM | 3045 | * the checksum needs to be fixed. This bit is an indication that |
2955 | * was prepared by OEM software and did not calculate the | 3046 | * the NVM was prepared by OEM software and did not calculate |
2956 | * checksum...a likely scenario. | 3047 | * the checksum...a likely scenario. |
2957 | */ | 3048 | */ |
2958 | ret_val = e1000_read_nvm(hw, 0x19, 1, &data); | 3049 | switch (hw->mac.type) { |
3050 | case e1000_pch_lpt: | ||
3051 | word = NVM_COMPAT; | ||
3052 | valid_csum_mask = NVM_COMPAT_VALID_CSUM; | ||
3053 | break; | ||
3054 | default: | ||
3055 | word = NVM_FUTURE_INIT_WORD1; | ||
3056 | valid_csum_mask = NVM_FUTURE_INIT_WORD1_VALID_CSUM; | ||
3057 | break; | ||
3058 | } | ||
3059 | |||
3060 | ret_val = e1000_read_nvm(hw, word, 1, &data); | ||
2959 | if (ret_val) | 3061 | if (ret_val) |
2960 | return ret_val; | 3062 | return ret_val; |
2961 | 3063 | ||
2962 | if (!(data & 0x40)) { | 3064 | if (!(data & valid_csum_mask)) { |
2963 | data |= 0x40; | 3065 | data |= valid_csum_mask; |
2964 | ret_val = e1000_write_nvm(hw, 0x19, 1, &data); | 3066 | ret_val = e1000_write_nvm(hw, word, 1, &data); |
2965 | if (ret_val) | 3067 | if (ret_val) |
2966 | return ret_val; | 3068 | return ret_val; |
2967 | ret_val = e1000e_update_nvm_checksum(hw); | 3069 | ret_val = e1000e_update_nvm_checksum(hw); |
@@ -4000,19 +4102,20 @@ void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw) | |||
4000 | if (!dev_spec->eee_disable) { | 4102 | if (!dev_spec->eee_disable) { |
4001 | u16 eee_advert; | 4103 | u16 eee_advert; |
4002 | 4104 | ||
4003 | ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, | 4105 | ret_val = |
4004 | I217_EEE_ADVERTISEMENT); | 4106 | e1000_read_emi_reg_locked(hw, |
4107 | I217_EEE_ADVERTISEMENT, | ||
4108 | &eee_advert); | ||
4005 | if (ret_val) | 4109 | if (ret_val) |
4006 | goto release; | 4110 | goto release; |
4007 | e1e_rphy_locked(hw, I82579_EMI_DATA, &eee_advert); | ||
4008 | 4111 | ||
4009 | /* Disable LPLU if both link partners support 100BaseT | 4112 | /* Disable LPLU if both link partners support 100BaseT |
4010 | * EEE and 100Full is advertised on both ends of the | 4113 | * EEE and 100Full is advertised on both ends of the |
4011 | * link. | 4114 | * link. |
4012 | */ | 4115 | */ |
4013 | if ((eee_advert & I217_EEE_100_SUPPORTED) && | 4116 | if ((eee_advert & I82579_EEE_100_SUPPORTED) && |
4014 | (dev_spec->eee_lp_ability & | 4117 | (dev_spec->eee_lp_ability & |
4015 | I217_EEE_100_SUPPORTED) && | 4118 | I82579_EEE_100_SUPPORTED) && |
4016 | (hw->phy.autoneg_advertised & ADVERTISE_100_FULL)) | 4119 | (hw->phy.autoneg_advertised & ADVERTISE_100_FULL)) |
4017 | phy_ctrl &= ~(E1000_PHY_CTRL_D0A_LPLU | | 4120 | phy_ctrl &= ~(E1000_PHY_CTRL_D0A_LPLU | |
4018 | E1000_PHY_CTRL_NOND0A_LPLU); | 4121 | E1000_PHY_CTRL_NOND0A_LPLU); |
diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c index 54d9dafaf126..0fa4c0656e09 100644 --- a/drivers/net/ethernet/intel/e1000e/mac.c +++ b/drivers/net/ethernet/intel/e1000e/mac.c | |||
@@ -1021,6 +1021,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1021 | { | 1021 | { |
1022 | struct e1000_mac_info *mac = &hw->mac; | 1022 | struct e1000_mac_info *mac = &hw->mac; |
1023 | s32 ret_val = 0; | 1023 | s32 ret_val = 0; |
1024 | u32 pcs_status_reg, pcs_adv_reg, pcs_lp_ability_reg, pcs_ctrl_reg; | ||
1024 | u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg; | 1025 | u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg; |
1025 | u16 speed, duplex; | 1026 | u16 speed, duplex; |
1026 | 1027 | ||
@@ -1185,6 +1186,130 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1185 | } | 1186 | } |
1186 | } | 1187 | } |
1187 | 1188 | ||
1189 | /* Check for the case where we have SerDes media and auto-neg is | ||
1190 | * enabled. In this case, we need to check and see if Auto-Neg | ||
1191 | * has completed, and if so, how the PHY and link partner has | ||
1192 | * flow control configured. | ||
1193 | */ | ||
1194 | if ((hw->phy.media_type == e1000_media_type_internal_serdes) && | ||
1195 | mac->autoneg) { | ||
1196 | /* Read the PCS_LSTS and check to see if AutoNeg | ||
1197 | * has completed. | ||
1198 | */ | ||
1199 | pcs_status_reg = er32(PCS_LSTAT); | ||
1200 | |||
1201 | if (!(pcs_status_reg & E1000_PCS_LSTS_AN_COMPLETE)) { | ||
1202 | e_dbg("PCS Auto Neg has not completed.\n"); | ||
1203 | return ret_val; | ||
1204 | } | ||
1205 | |||
1206 | /* The AutoNeg process has completed, so we now need to | ||
1207 | * read both the Auto Negotiation Advertisement | ||
1208 | * Register (PCS_ANADV) and the Auto_Negotiation Base | ||
1209 | * Page Ability Register (PCS_LPAB) to determine how | ||
1210 | * flow control was negotiated. | ||
1211 | */ | ||
1212 | pcs_adv_reg = er32(PCS_ANADV); | ||
1213 | pcs_lp_ability_reg = er32(PCS_LPAB); | ||
1214 | |||
1215 | /* Two bits in the Auto Negotiation Advertisement Register | ||
1216 | * (PCS_ANADV) and two bits in the Auto Negotiation Base | ||
1217 | * Page Ability Register (PCS_LPAB) determine flow control | ||
1218 | * for both the PHY and the link partner. The following | ||
1219 | * table, taken out of the IEEE 802.3ab/D6.0 dated March 25, | ||
1220 | * 1999, describes these PAUSE resolution bits and how flow | ||
1221 | * control is determined based upon these settings. | ||
1222 | * NOTE: DC = Don't Care | ||
1223 | * | ||
1224 | * LOCAL DEVICE | LINK PARTNER | ||
1225 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution | ||
1226 | *-------|---------|-------|---------|-------------------- | ||
1227 | * 0 | 0 | DC | DC | e1000_fc_none | ||
1228 | * 0 | 1 | 0 | DC | e1000_fc_none | ||
1229 | * 0 | 1 | 1 | 0 | e1000_fc_none | ||
1230 | * 0 | 1 | 1 | 1 | e1000_fc_tx_pause | ||
1231 | * 1 | 0 | 0 | DC | e1000_fc_none | ||
1232 | * 1 | DC | 1 | DC | e1000_fc_full | ||
1233 | * 1 | 1 | 0 | 0 | e1000_fc_none | ||
1234 | * 1 | 1 | 0 | 1 | e1000_fc_rx_pause | ||
1235 | * | ||
1236 | * Are both PAUSE bits set to 1? If so, this implies | ||
1237 | * Symmetric Flow Control is enabled at both ends. The | ||
1238 | * ASM_DIR bits are irrelevant per the spec. | ||
1239 | * | ||
1240 | * For Symmetric Flow Control: | ||
1241 | * | ||
1242 | * LOCAL DEVICE | LINK PARTNER | ||
1243 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result | ||
1244 | *-------|---------|-------|---------|-------------------- | ||
1245 | * 1 | DC | 1 | DC | e1000_fc_full | ||
1246 | * | ||
1247 | */ | ||
1248 | if ((pcs_adv_reg & E1000_TXCW_PAUSE) && | ||
1249 | (pcs_lp_ability_reg & E1000_TXCW_PAUSE)) { | ||
1250 | /* Now we need to check if the user selected Rx ONLY | ||
1251 | * of pause frames. In this case, we had to advertise | ||
1252 | * FULL flow control because we could not advertise Rx | ||
1253 | * ONLY. Hence, we must now check to see if we need to | ||
1254 | * turn OFF the TRANSMISSION of PAUSE frames. | ||
1255 | */ | ||
1256 | if (hw->fc.requested_mode == e1000_fc_full) { | ||
1257 | hw->fc.current_mode = e1000_fc_full; | ||
1258 | e_dbg("Flow Control = FULL.\n"); | ||
1259 | } else { | ||
1260 | hw->fc.current_mode = e1000_fc_rx_pause; | ||
1261 | e_dbg("Flow Control = Rx PAUSE frames only.\n"); | ||
1262 | } | ||
1263 | } | ||
1264 | /* For receiving PAUSE frames ONLY. | ||
1265 | * | ||
1266 | * LOCAL DEVICE | LINK PARTNER | ||
1267 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result | ||
1268 | *-------|---------|-------|---------|-------------------- | ||
1269 | * 0 | 1 | 1 | 1 | e1000_fc_tx_pause | ||
1270 | */ | ||
1271 | else if (!(pcs_adv_reg & E1000_TXCW_PAUSE) && | ||
1272 | (pcs_adv_reg & E1000_TXCW_ASM_DIR) && | ||
1273 | (pcs_lp_ability_reg & E1000_TXCW_PAUSE) && | ||
1274 | (pcs_lp_ability_reg & E1000_TXCW_ASM_DIR)) { | ||
1275 | hw->fc.current_mode = e1000_fc_tx_pause; | ||
1276 | e_dbg("Flow Control = Tx PAUSE frames only.\n"); | ||
1277 | } | ||
1278 | /* For transmitting PAUSE frames ONLY. | ||
1279 | * | ||
1280 | * LOCAL DEVICE | LINK PARTNER | ||
1281 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result | ||
1282 | *-------|---------|-------|---------|-------------------- | ||
1283 | * 1 | 1 | 0 | 1 | e1000_fc_rx_pause | ||
1284 | */ | ||
1285 | else if ((pcs_adv_reg & E1000_TXCW_PAUSE) && | ||
1286 | (pcs_adv_reg & E1000_TXCW_ASM_DIR) && | ||
1287 | !(pcs_lp_ability_reg & E1000_TXCW_PAUSE) && | ||
1288 | (pcs_lp_ability_reg & E1000_TXCW_ASM_DIR)) { | ||
1289 | hw->fc.current_mode = e1000_fc_rx_pause; | ||
1290 | e_dbg("Flow Control = Rx PAUSE frames only.\n"); | ||
1291 | } else { | ||
1292 | /* Per the IEEE spec, at this point flow control | ||
1293 | * should be disabled. | ||
1294 | */ | ||
1295 | hw->fc.current_mode = e1000_fc_none; | ||
1296 | e_dbg("Flow Control = NONE.\n"); | ||
1297 | } | ||
1298 | |||
1299 | /* Now we call a subroutine to actually force the MAC | ||
1300 | * controller to use the correct flow control settings. | ||
1301 | */ | ||
1302 | pcs_ctrl_reg = er32(PCS_LCTL); | ||
1303 | pcs_ctrl_reg |= E1000_PCS_LCTL_FORCE_FCTRL; | ||
1304 | ew32(PCS_LCTL, pcs_ctrl_reg); | ||
1305 | |||
1306 | ret_val = e1000e_force_mac_fc(hw); | ||
1307 | if (ret_val) { | ||
1308 | e_dbg("Error forcing flow control settings\n"); | ||
1309 | return ret_val; | ||
1310 | } | ||
1311 | } | ||
1312 | |||
1188 | return 0; | 1313 | return 0; |
1189 | } | 1314 | } |
1190 | 1315 | ||
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c index 337644dda14d..05538e66c809 100644 --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c | |||
@@ -765,7 +765,7 @@ static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring, | |||
765 | struct e1000_buffer *buffer_info; | 765 | struct e1000_buffer *buffer_info; |
766 | struct sk_buff *skb; | 766 | struct sk_buff *skb; |
767 | unsigned int i; | 767 | unsigned int i; |
768 | unsigned int bufsz = 256 - 16 /* for skb_reserve */; | 768 | unsigned int bufsz = 256 - 16; /* for skb_reserve */ |
769 | 769 | ||
770 | i = rx_ring->next_to_use; | 770 | i = rx_ring->next_to_use; |
771 | buffer_info = &rx_ring->buffer_info[i]; | 771 | buffer_info = &rx_ring->buffer_info[i]; |
@@ -1671,7 +1671,7 @@ static irqreturn_t e1000_intr_msi(int irq, void *data) | |||
1671 | /* disable receives */ | 1671 | /* disable receives */ |
1672 | u32 rctl = er32(RCTL); | 1672 | u32 rctl = er32(RCTL); |
1673 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | 1673 | ew32(RCTL, rctl & ~E1000_RCTL_EN); |
1674 | adapter->flags |= FLAG_RX_RESTART_NOW; | 1674 | adapter->flags |= FLAG_RESTART_NOW; |
1675 | } | 1675 | } |
1676 | /* guard against interrupt when we're going down */ | 1676 | /* guard against interrupt when we're going down */ |
1677 | if (!test_bit(__E1000_DOWN, &adapter->state)) | 1677 | if (!test_bit(__E1000_DOWN, &adapter->state)) |
@@ -1734,7 +1734,7 @@ static irqreturn_t e1000_intr(int irq, void *data) | |||
1734 | /* disable receives */ | 1734 | /* disable receives */ |
1735 | rctl = er32(RCTL); | 1735 | rctl = er32(RCTL); |
1736 | ew32(RCTL, rctl & ~E1000_RCTL_EN); | 1736 | ew32(RCTL, rctl & ~E1000_RCTL_EN); |
1737 | adapter->flags |= FLAG_RX_RESTART_NOW; | 1737 | adapter->flags |= FLAG_RESTART_NOW; |
1738 | } | 1738 | } |
1739 | /* guard against interrupt when we're going down */ | 1739 | /* guard against interrupt when we're going down */ |
1740 | if (!test_bit(__E1000_DOWN, &adapter->state)) | 1740 | if (!test_bit(__E1000_DOWN, &adapter->state)) |
@@ -2405,7 +2405,6 @@ static unsigned int e1000_update_itr(struct e1000_adapter *adapter, | |||
2405 | 2405 | ||
2406 | static void e1000_set_itr(struct e1000_adapter *adapter) | 2406 | static void e1000_set_itr(struct e1000_adapter *adapter) |
2407 | { | 2407 | { |
2408 | struct e1000_hw *hw = &adapter->hw; | ||
2409 | u16 current_itr; | 2408 | u16 current_itr; |
2410 | u32 new_itr = adapter->itr; | 2409 | u32 new_itr = adapter->itr; |
2411 | 2410 | ||
@@ -2468,10 +2467,7 @@ set_itr_now: | |||
2468 | if (adapter->msix_entries) | 2467 | if (adapter->msix_entries) |
2469 | adapter->rx_ring->set_itr = 1; | 2468 | adapter->rx_ring->set_itr = 1; |
2470 | else | 2469 | else |
2471 | if (new_itr) | 2470 | e1000e_write_itr(adapter, new_itr); |
2472 | ew32(ITR, 1000000000 / (new_itr * 256)); | ||
2473 | else | ||
2474 | ew32(ITR, 0); | ||
2475 | } | 2471 | } |
2476 | } | 2472 | } |
2477 | 2473 | ||
@@ -3013,7 +3009,7 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter) | |||
3013 | 3009 | ||
3014 | ew32(RCTL, rctl); | 3010 | ew32(RCTL, rctl); |
3015 | /* just started the receive unit, no need to restart */ | 3011 | /* just started the receive unit, no need to restart */ |
3016 | adapter->flags &= ~FLAG_RX_RESTART_NOW; | 3012 | adapter->flags &= ~FLAG_RESTART_NOW; |
3017 | } | 3013 | } |
3018 | 3014 | ||
3019 | /** | 3015 | /** |
@@ -4300,9 +4296,8 @@ static void e1000_print_link_info(struct e1000_adapter *adapter) | |||
4300 | u32 ctrl = er32(CTRL); | 4296 | u32 ctrl = er32(CTRL); |
4301 | 4297 | ||
4302 | /* Link status message must follow this format for user tools */ | 4298 | /* Link status message must follow this format for user tools */ |
4303 | printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", | 4299 | pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n", |
4304 | adapter->netdev->name, | 4300 | adapter->netdev->name, adapter->link_speed, |
4305 | adapter->link_speed, | ||
4306 | adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", | 4301 | adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half", |
4307 | (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : | 4302 | (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" : |
4308 | (ctrl & E1000_CTRL_RFCE) ? "Rx" : | 4303 | (ctrl & E1000_CTRL_RFCE) ? "Rx" : |
@@ -4355,11 +4350,11 @@ static void e1000e_enable_receives(struct e1000_adapter *adapter) | |||
4355 | { | 4350 | { |
4356 | /* make sure the receive unit is started */ | 4351 | /* make sure the receive unit is started */ |
4357 | if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && | 4352 | if ((adapter->flags & FLAG_RX_NEEDS_RESTART) && |
4358 | (adapter->flags & FLAG_RX_RESTART_NOW)) { | 4353 | (adapter->flags & FLAG_RESTART_NOW)) { |
4359 | struct e1000_hw *hw = &adapter->hw; | 4354 | struct e1000_hw *hw = &adapter->hw; |
4360 | u32 rctl = er32(RCTL); | 4355 | u32 rctl = er32(RCTL); |
4361 | ew32(RCTL, rctl | E1000_RCTL_EN); | 4356 | ew32(RCTL, rctl | E1000_RCTL_EN); |
4362 | adapter->flags &= ~FLAG_RX_RESTART_NOW; | 4357 | adapter->flags &= ~FLAG_RESTART_NOW; |
4363 | } | 4358 | } |
4364 | } | 4359 | } |
4365 | 4360 | ||
@@ -4521,15 +4516,22 @@ static void e1000_watchdog_task(struct work_struct *work) | |||
4521 | adapter->link_speed = 0; | 4516 | adapter->link_speed = 0; |
4522 | adapter->link_duplex = 0; | 4517 | adapter->link_duplex = 0; |
4523 | /* Link status message must follow this format */ | 4518 | /* Link status message must follow this format */ |
4524 | printk(KERN_INFO "e1000e: %s NIC Link is Down\n", | 4519 | pr_info("%s NIC Link is Down\n", adapter->netdev->name); |
4525 | adapter->netdev->name); | ||
4526 | netif_carrier_off(netdev); | 4520 | netif_carrier_off(netdev); |
4527 | if (!test_bit(__E1000_DOWN, &adapter->state)) | 4521 | if (!test_bit(__E1000_DOWN, &adapter->state)) |
4528 | mod_timer(&adapter->phy_info_timer, | 4522 | mod_timer(&adapter->phy_info_timer, |
4529 | round_jiffies(jiffies + 2 * HZ)); | 4523 | round_jiffies(jiffies + 2 * HZ)); |
4530 | 4524 | ||
4531 | if (adapter->flags & FLAG_RX_NEEDS_RESTART) | 4525 | /* The link is lost so the controller stops DMA. |
4532 | schedule_work(&adapter->reset_task); | 4526 | * If there is queued Tx work that cannot be done |
4527 | * or if on an 8000ES2LAN which requires a Rx packet | ||
4528 | * buffer work-around on link down event, reset the | ||
4529 | * controller to flush the Tx/Rx packet buffers. | ||
4530 | * (Do the reset outside of interrupt context). | ||
4531 | */ | ||
4532 | if ((adapter->flags & FLAG_RX_NEEDS_RESTART) || | ||
4533 | (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) | ||
4534 | adapter->flags |= FLAG_RESTART_NOW; | ||
4533 | else | 4535 | else |
4534 | pm_schedule_suspend(netdev->dev.parent, | 4536 | pm_schedule_suspend(netdev->dev.parent, |
4535 | LINK_TIMEOUT); | 4537 | LINK_TIMEOUT); |
@@ -4551,20 +4553,14 @@ link_up: | |||
4551 | adapter->gotc_old = adapter->stats.gotc; | 4553 | adapter->gotc_old = adapter->stats.gotc; |
4552 | spin_unlock(&adapter->stats64_lock); | 4554 | spin_unlock(&adapter->stats64_lock); |
4553 | 4555 | ||
4554 | e1000e_update_adaptive(&adapter->hw); | 4556 | if (adapter->flags & FLAG_RESTART_NOW) { |
4555 | |||
4556 | if (!netif_carrier_ok(netdev) && | ||
4557 | (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) { | ||
4558 | /* We've lost link, so the controller stops DMA, | ||
4559 | * but we've got queued Tx work that's never going | ||
4560 | * to get done, so reset controller to flush Tx. | ||
4561 | * (Do the reset outside of interrupt context). | ||
4562 | */ | ||
4563 | schedule_work(&adapter->reset_task); | 4557 | schedule_work(&adapter->reset_task); |
4564 | /* return immediately since reset is imminent */ | 4558 | /* return immediately since reset is imminent */ |
4565 | return; | 4559 | return; |
4566 | } | 4560 | } |
4567 | 4561 | ||
4562 | e1000e_update_adaptive(&adapter->hw); | ||
4563 | |||
4568 | /* Simple mode for Interrupt Throttle Rate (ITR) */ | 4564 | /* Simple mode for Interrupt Throttle Rate (ITR) */ |
4569 | if (adapter->itr_setting == 4) { | 4565 | if (adapter->itr_setting == 4) { |
4570 | /* Symmetric Tx/Rx gets a reduced ITR=2000; | 4566 | /* Symmetric Tx/Rx gets a reduced ITR=2000; |
@@ -4918,12 +4914,11 @@ static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter, | |||
4918 | struct e1000_hw *hw = &adapter->hw; | 4914 | struct e1000_hw *hw = &adapter->hw; |
4919 | u16 length, offset; | 4915 | u16 length, offset; |
4920 | 4916 | ||
4921 | if (vlan_tx_tag_present(skb)) { | 4917 | if (vlan_tx_tag_present(skb) && |
4922 | if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && | 4918 | !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && |
4923 | (adapter->hw.mng_cookie.status & | 4919 | (adapter->hw.mng_cookie.status & |
4924 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) | 4920 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN))) |
4925 | return 0; | 4921 | return 0; |
4926 | } | ||
4927 | 4922 | ||
4928 | if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) | 4923 | if (skb->len <= MINIMUM_DHCP_PACKET_SIZE) |
4929 | return 0; | 4924 | return 0; |
@@ -5134,10 +5129,9 @@ static void e1000_reset_task(struct work_struct *work) | |||
5134 | if (test_bit(__E1000_DOWN, &adapter->state)) | 5129 | if (test_bit(__E1000_DOWN, &adapter->state)) |
5135 | return; | 5130 | return; |
5136 | 5131 | ||
5137 | if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && | 5132 | if (!(adapter->flags & FLAG_RESTART_NOW)) { |
5138 | (adapter->flags & FLAG_RX_RESTART_NOW))) { | ||
5139 | e1000e_dump(adapter); | 5133 | e1000e_dump(adapter); |
5140 | e_err("Reset adapter\n"); | 5134 | e_err("Reset adapter unexpectedly\n"); |
5141 | } | 5135 | } |
5142 | e1000e_reinit_locked(adapter); | 5136 | e1000e_reinit_locked(adapter); |
5143 | } | 5137 | } |
diff --git a/drivers/net/ethernet/intel/e1000e/nvm.c b/drivers/net/ethernet/intel/e1000e/nvm.c index b6468804cb2e..1e7882c7d6d4 100644 --- a/drivers/net/ethernet/intel/e1000e/nvm.c +++ b/drivers/net/ethernet/intel/e1000e/nvm.c | |||
@@ -359,7 +359,7 @@ s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
359 | s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | 359 | s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) |
360 | { | 360 | { |
361 | struct e1000_nvm_info *nvm = &hw->nvm; | 361 | struct e1000_nvm_info *nvm = &hw->nvm; |
362 | s32 ret_val; | 362 | s32 ret_val = -E1000_ERR_NVM; |
363 | u16 widx = 0; | 363 | u16 widx = 0; |
364 | 364 | ||
365 | /* A check for invalid values: offset too large, too many words, | 365 | /* A check for invalid values: offset too large, too many words, |
@@ -371,16 +371,18 @@ s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
371 | return -E1000_ERR_NVM; | 371 | return -E1000_ERR_NVM; |
372 | } | 372 | } |
373 | 373 | ||
374 | ret_val = nvm->ops.acquire(hw); | ||
375 | if (ret_val) | ||
376 | return ret_val; | ||
377 | |||
378 | while (widx < words) { | 374 | while (widx < words) { |
379 | u8 write_opcode = NVM_WRITE_OPCODE_SPI; | 375 | u8 write_opcode = NVM_WRITE_OPCODE_SPI; |
380 | 376 | ||
381 | ret_val = e1000_ready_nvm_eeprom(hw); | 377 | ret_val = nvm->ops.acquire(hw); |
382 | if (ret_val) | 378 | if (ret_val) |
383 | goto release; | 379 | return ret_val; |
380 | |||
381 | ret_val = e1000_ready_nvm_eeprom(hw); | ||
382 | if (ret_val) { | ||
383 | nvm->ops.release(hw); | ||
384 | return ret_val; | ||
385 | } | ||
384 | 386 | ||
385 | e1000_standby_nvm(hw); | 387 | e1000_standby_nvm(hw); |
386 | 388 | ||
@@ -413,12 +415,10 @@ s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
413 | break; | 415 | break; |
414 | } | 416 | } |
415 | } | 417 | } |
418 | usleep_range(10000, 20000); | ||
419 | nvm->ops.release(hw); | ||
416 | } | 420 | } |
417 | 421 | ||
418 | usleep_range(10000, 20000); | ||
419 | release: | ||
420 | nvm->ops.release(hw); | ||
421 | |||
422 | return ret_val; | 422 | return ret_val; |
423 | } | 423 | } |
424 | 424 | ||
@@ -464,8 +464,8 @@ s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num, | |||
464 | if (nvm_data != NVM_PBA_PTR_GUARD) { | 464 | if (nvm_data != NVM_PBA_PTR_GUARD) { |
465 | e_dbg("NVM PBA number is not stored as string\n"); | 465 | e_dbg("NVM PBA number is not stored as string\n"); |
466 | 466 | ||
467 | /* we will need 11 characters to store the PBA */ | 467 | /* make sure callers buffer is big enough to store the PBA */ |
468 | if (pba_num_size < 11) { | 468 | if (pba_num_size < E1000_PBANUM_LENGTH) { |
469 | e_dbg("PBA string buffer too small\n"); | 469 | e_dbg("PBA string buffer too small\n"); |
470 | return E1000_ERR_NO_SPACE; | 470 | return E1000_ERR_NO_SPACE; |
471 | } | 471 | } |
diff --git a/drivers/net/ethernet/intel/e1000e/param.c b/drivers/net/ethernet/intel/e1000e/param.c index 89d536dd7ff5..b29a8a5116a8 100644 --- a/drivers/net/ethernet/intel/e1000e/param.c +++ b/drivers/net/ethernet/intel/e1000e/param.c | |||
@@ -447,8 +447,7 @@ void e1000e_check_options(struct e1000_adapter *adapter) | |||
447 | if (num_SmartPowerDownEnable > bd) { | 447 | if (num_SmartPowerDownEnable > bd) { |
448 | unsigned int spd = SmartPowerDownEnable[bd]; | 448 | unsigned int spd = SmartPowerDownEnable[bd]; |
449 | e1000_validate_option(&spd, &opt, adapter); | 449 | e1000_validate_option(&spd, &opt, adapter); |
450 | if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) | 450 | if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && spd) |
451 | && spd) | ||
452 | adapter->flags |= FLAG_SMART_POWER_DOWN; | 451 | adapter->flags |= FLAG_SMART_POWER_DOWN; |
453 | } | 452 | } |
454 | } | 453 | } |