powerpc/fsl-booke: Rework TLB CAM code

Re-write the code so its more standalone and fixed some issues:
* Bump'd # of CAM entries to 64 to support e500mc
* Make the code handle MAS7 properly
* Use pr_cont instead of creating a string as we go

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

4 files changed, 74 insertions, 94 deletions

diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index e2e2082acf29..a6c2b63227b3 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -421,9 +421,6 @@ int main(void)
         DEFINE(PGD_T_LOG2, PGD_T_LOG2);
         DEFINE(PTE_T_LOG2, PTE_T_LOG2);
 #endif
-#ifdef CONFIG_FSL_BOOKE
-        DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
-#endif
 
 #ifdef CONFIG_KVM_EXIT_TIMING
         DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 975788ca05d2..7f4bd7f3b6af 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -944,28 +944,6 @@ _GLOBAL(__setup_e500mc_ivors)
         blr
 
 /*
- * extern void loadcam_entry(unsigned int index)
- *
- * Load TLBCAM[index] entry in to the L2 CAM MMU
- */
-_GLOBAL(loadcam_entry)
-        lis     r4,TLBCAM@ha
-        addi    r4,r4,TLBCAM@l
-        mulli   r5,r3,TLBCAM_SIZE
-        add     r3,r5,r4
-        lwz     r4,0(r3)
-        mtspr   SPRN_MAS0,r4
-        lwz     r4,4(r3)
-        mtspr   SPRN_MAS1,r4
-        lwz     r4,8(r3)
-        mtspr   SPRN_MAS2,r4
-        lwz     r4,12(r3)
-        mtspr   SPRN_MAS3,r4
-        tlbwe
-        isync
-        blr
-
-/*
  * extern void giveup_altivec(struct task_struct *prev)
  *
  * The e500 core does not have an AltiVec unit.
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index dc93e95b256e..fcfcb6e976c7 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -54,26 +54,35 @@
 
 #include "mmu_decl.h"
 
-extern void loadcam_entry(unsigned int index);
 unsigned int tlbcam_index;
-static unsigned long cam[CONFIG_LOWMEM_CAM_NUM];
 
-#define NUM_TLBCAMS     (16)
+#define NUM_TLBCAMS     (64)
 
 #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
 #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
 #endif
 
-struct tlbcam TLBCAM[NUM_TLBCAMS];
+struct tlbcam {
+        u32     MAS0;
+        u32     MAS1;
+        unsigned long   MAS2;
+        u32     MAS3;
+        u32     MAS7;
+} TLBCAM[NUM_TLBCAMS];
 
 struct tlbcamrange {
-        unsigned long start;
+        unsigned long start;
         unsigned long limit;
         phys_addr_t phys;
 } tlbcam_addrs[NUM_TLBCAMS];
 
 extern unsigned int tlbcam_index;
 
+unsigned long tlbcam_sz(int idx)
+{
+        return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
+}
+
 /*
  * Return PA for this VA if it is mapped by a CAM, or 0
  */
@@ -94,23 +103,36 @@ unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
         int b;
         for (b = 0; b < tlbcam_index; ++b)
                 if (pa >= tlbcam_addrs[b].phys
-                    && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
+                        && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
                               +tlbcam_addrs[b].phys)
                         return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
         return 0;
 }
 
+void loadcam_entry(int idx)
+{
+        mtspr(SPRN_MAS0, TLBCAM[idx].MAS0);
+        mtspr(SPRN_MAS1, TLBCAM[idx].MAS1);
+        mtspr(SPRN_MAS2, TLBCAM[idx].MAS2);
+        mtspr(SPRN_MAS3, TLBCAM[idx].MAS3);
+
+        if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS)
+                mtspr(SPRN_MAS7, TLBCAM[idx].MAS7);
+
+        asm volatile("isync;tlbwe;isync" : : : "memory");
+}
+
 /*
  * Set up one of the I/D BAT (block address translation) register pairs.
  * The parameters are not checked; in particular size must be a power
  * of 4 between 4k and 256M.
  */
-void settlbcam(int index, unsigned long virt, phys_addr_t phys,
-                unsigned int size, int flags, unsigned int pid)
+static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
+                unsigned long size, unsigned long flags, unsigned int pid)
 {
         unsigned int tsize, lz;
 
-        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
+        asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (size));
         tsize = 21 - lz;
 
 #ifdef CONFIG_SMP
@@ -128,8 +150,10 @@ void settlbcam(int index, unsigned long virt, phys_addr_t phys,
         TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
         TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
 
-        TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR;
+        TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
         TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
+        if (cur_cpu_spec->cpu_features & MMU_FTR_BIG_PHYS)
+                TLBCAM[index].MAS7 = (u64)phys >> 32;
 
 #ifndef CONFIG_KGDB /* want user access for breakpoints */
         if (flags & _PAGE_USER) {
@@ -148,27 +172,44 @@ void settlbcam(int index, unsigned long virt, phys_addr_t phys,
         loadcam_entry(index);
 }
 
-void invalidate_tlbcam_entry(int index)
-{
-        TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index);
-        TLBCAM[index].MAS1 = ~MAS1_VALID;
-
-        loadcam_entry(index);
-}
-
-unsigned long __init mmu_mapin_ram(void)
+unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
 {
+        int i;
         unsigned long virt = PAGE_OFFSET;
         phys_addr_t phys = memstart_addr;
+        unsigned long amount_mapped = 0;
+        unsigned long max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
+