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authorAbylay Ospan <aospan@netup.ru>2011-01-02 07:14:00 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2011-03-22 03:54:11 -0400
commit8af81ddb12cf34e2f6eab7e130f1e55e1911ab8f (patch)
treeb23fa04b362eae3e9e922897d8d2ce30af03d11a
parent78db66e5b2b4ef48eeede17a7159cb0622c7f03d (diff)
[media] Fix CI code for NetUP Dual DVB-T/C CI RF card
CI reset takes several seconds on some CAM, so there is no need to lock mutex all that time. Also we need not to preserve CI's reset bits in CIBUSCTRL register, they are handled automatically by FPGA. Set it to 0 explicitly in order to not reset wrong CAM. Signed-off-by: Abylay Ospan <aospan@netup.ru> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r--drivers/media/video/cx23885/altera-ci.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/media/video/cx23885/altera-ci.c b/drivers/media/video/cx23885/altera-ci.c
index 4269e053830c..678539b2acfa 100644
--- a/drivers/media/video/cx23885/altera-ci.c
+++ b/drivers/media/video/cx23885/altera-ci.c
@@ -283,7 +283,7 @@ int altera_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
283 netup_fpga_op_rw(inter, NETUP_CI_ADDR1, ((addr >> 7) & 0x7f), 0); 283 netup_fpga_op_rw(inter, NETUP_CI_ADDR1, ((addr >> 7) & 0x7f), 0);
284 store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD); 284 store = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
285 285
286 store &= 0x3f; 286 store &= 0x0f;
287 store |= ((state->nr << 7) | (flag << 6)); 287 store |= ((state->nr << 7) | (flag << 6));
288 288
289 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, store, 0); 289 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, store, 0);
@@ -340,19 +340,25 @@ int altera_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
340 340
341 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD); 341 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
342 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 342 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
343 ret | (1 << (5 - state->nr)), 0); 343 (ret & 0xcf) | (1 << (5 - state->nr)), 0);
344
345 mutex_unlock(&inter->fpga_mutex);
344 346
345 for (;;) { 347 for (;;) {
346 mdelay(50); 348 mdelay(50);
349
350 mutex_lock(&inter->fpga_mutex);
351
347 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 352 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
348 0, NETUP_CI_FLG_RD); 353 0, NETUP_CI_FLG_RD);
354 mutex_unlock(&inter->fpga_mutex);
355
349 if ((ret & (1 << (5 - state->nr))) == 0) 356 if ((ret & (1 << (5 - state->nr))) == 0)
350 break; 357 break;
351 if (time_after(jiffies, t_out)) 358 if (time_after(jiffies, t_out))
352 break; 359 break;
353 } 360 }
354 361
355 mutex_unlock(&inter->fpga_mutex);
356 362
357 ci_dbg_print("%s: %d msecs\n", __func__, 363 ci_dbg_print("%s: %d msecs\n", __func__,
358 jiffies_to_msecs(jiffies + msecs_to_jiffies(9999) - t_out)); 364 jiffies_to_msecs(jiffies + msecs_to_jiffies(9999) - t_out));
@@ -381,7 +387,7 @@ int altera_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
381 387
382 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD); 388 ret = netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 0, NETUP_CI_FLG_RD);
383 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL, 389 netup_fpga_op_rw(inter, NETUP_CI_BUSCTRL,
384 ret | (1 << (3 - state->nr)), 0); 390 (ret & 0x0f) | (1 << (3 - state->nr)), 0);
385 391
386 mutex_unlock(&inter->fpga_mutex); 392 mutex_unlock(&inter->fpga_mutex);
387 393