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authorDave Airlie <airlied@redhat.com>2014-03-18 05:06:53 -0400
committerDave Airlie <airlied@redhat.com>2014-03-18 05:06:53 -0400
commit8ad2bc9796994ecba9f4ba2fc9abca27ee9d193d (patch)
treeb36c83fa93da7f18c1331252fb82a87431697443
parente40d641099213145a034981e646dc2180a488152 (diff)
parente19b9137142988bec5a76c5f8bdf12a77ea802b0 (diff)
Merge branch 'drm-intel-next' of git://git.freedesktop.org/git/drm-intel into drm-next
- fine-grained display power domains for byt (Imre) - runtime pm prep patches for !hsw from Paulo - WiZ hashing flag updates from Ville - ppgtt setup cleanup and enabling of full 4G range on bdw (Ben) - fixes from Jesse for the inherited intial config code - gpu reset code improvements from Mika - per-pipe num_planes refactoring from Damien - stability fixes around bdw forcewake handling and other bdw w/a from Mika Ken - and as usual a pile of smaller fixes all over * 'drm-intel-next' of git://git.freedesktop.org/git/drm-intel: (107 commits) drm/i915: Go OCD on the Makefile drm/i915: Implement command buffer parsing logic drm/i915: Refactor shmem pread setup drm/i915: Avoid div by zero when pixel clock is large drm/i915: power domains: add vlv power wells drm/i915: factor out intel_set_cpu_fifo_underrun_reporting_nolock drm/i915: vlv: factor out valleyview_display_irq_install drm/i915: sanity check power well sw state against hw state drm/i915: factor out reset_vblank_counter drm/i915: sanitize PUNIT register macro definitions drm/i915: vlv: keep first level vblank IRQs masked drm/i915: check pipe power domain when reading its hw state drm/i915: check port power domain when reading the encoder hw state drm/i915: get port power domain in connector detect handlers drm/i915: add port power domains drm/i915: add noop power well handlers instead of NULL checking them drm/i915: split power well 'set' handler to separate enable/disable/sync_hw drm/i915: add init power domain to always-on power wells drm/i915: move power domain macros to intel_pm.c drm/i915: Disable full ppgtt by default ...
-rw-r--r--drivers/gpu/drm/i915/Makefile81
-rw-r--r--drivers/gpu/drm/i915/i915_cmd_parser.c485
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c79
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c24
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c19
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h282
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c92
-rw-r--r--drivers/gpu/drm/i915/i915_gem_context.c52
-rw-r--r--drivers/gpu/drm/i915/i915_gem_execbuffer.c18
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c621
-rw-r--r--drivers/gpu/drm/i915/i915_gpu_error.c272
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c208
-rw-r--r--drivers/gpu/drm/i915/i915_params.c5
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h69
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c4
-rw-r--r--drivers/gpu/drm/i915/intel_bios.h174
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c57
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c5
-rw-r--r--drivers/gpu/drm/i915/intel_display.c363
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c43
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h21
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.c18
-rw-r--r--drivers/gpu/drm/i915/intel_fbdev.c49
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c34
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c2
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c575
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c4
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h32
-rw-r--r--drivers/gpu/drm/i915/intel_uncore.c227
29 files changed, 2896 insertions, 1019 deletions
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f33902ff2c22..b1445b73465b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -3,58 +3,69 @@
3# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. 3# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
4 4
5ccflags-y := -Iinclude/drm 5ccflags-y := -Iinclude/drm
6i915-y := i915_drv.o i915_dma.o i915_irq.o \ 6
7 i915_gpu_error.o \ 7# Please keep these build lists sorted!
8
9# core driver code
10i915-y := i915_drv.o \
11 i915_params.o \
8 i915_suspend.o \ 12 i915_suspend.o \
9 i915_gem.o \ 13 i915_sysfs.o \
14 intel_pm.o
15i915-$(CONFIG_COMPAT) += i915_ioc32.o
16i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o
17
18# GEM code
19i915-y += i915_cmd_parser.o \
10 i915_gem_context.o \ 20 i915_gem_context.o \
11 i915_gem_debug.o \ 21 i915_gem_debug.o \
22 i915_gem_dmabuf.o \
12 i915_gem_evict.o \ 23 i915_gem_evict.o \
13 i915_gem_execbuffer.o \ 24 i915_gem_execbuffer.o \
14 i915_gem_gtt.o \ 25 i915_gem_gtt.o \
26 i915_gem.o \
15 i915_gem_stolen.o \ 27 i915_gem_stolen.o \
16 i915_gem_tiling.o \ 28 i915_gem_tiling.o \
17 i915_params.o \ 29 i915_gpu_error.o \
18 i915_sysfs.o \ 30 i915_irq.o \
19 i915_trace_points.o \ 31 i915_trace_points.o \
20 i915_ums.o \ 32 intel_ringbuffer.o \
33 intel_uncore.o
34
35# modesetting core code
36i915-y += intel_bios.o \
21 intel_display.o \ 37 intel_display.o \
22 intel_crt.o \
23 intel_lvds.o \
24 intel_dsi.o \
25 intel_dsi_cmd.o \
26 intel_dsi_pll.o \
27 intel_bios.o \
28 intel_ddi.o \
29 intel_dp.o \
30 intel_hdmi.o \
31 intel_sdvo.o \
32 intel_modes.o \ 38 intel_modes.o \
33 intel_panel.o \
34 intel_pm.o \
35 intel_i2c.o \
36 intel_tv.o \
37 intel_dvo.o \
38 intel_ringbuffer.o \
39 intel_overlay.o \ 39 intel_overlay.o \
40 intel_sprite.o \
41 intel_sideband.o \ 40 intel_sideband.o \
42 intel_uncore.o \ 41 intel_sprite.o
42i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o
43i915-$(CONFIG_DRM_I915_FBDEV) += intel_fbdev.o
44
45# modesetting output/encoder code
46i915-y += dvo_ch7017.o \
43 dvo_ch7xxx.o \ 47 dvo_ch7xxx.o \
44 dvo_ch7017.o \
45 dvo_ivch.o \ 48 dvo_ivch.o \
46 dvo_tfp410.o \
47 dvo_sil164.o \
48 dvo_ns2501.o \ 49 dvo_ns2501.o \
49 i915_gem_dmabuf.o 50 dvo_sil164.o \
50 51 dvo_tfp410.o \
51i915-$(CONFIG_COMPAT) += i915_ioc32.o 52 intel_crt.o \
52 53 intel_ddi.o \
53i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o 54 intel_dp.o \
54 55 intel_dsi_cmd.o \
55i915-$(CONFIG_DRM_I915_FBDEV) += intel_fbdev.o 56 intel_dsi.o \
57 intel_dsi_pll.o \
58 intel_dvo.o \
59 intel_hdmi.o \
60 intel_i2c.o \
61 intel_lvds.o \
62 intel_panel.o \
63 intel_sdvo.o \
64 intel_tv.o
56 65
57i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o 66# legacy horrors
67i915-y += i915_dma.o \
68 i915_ums.o
58 69
59obj-$(CONFIG_DRM_I915) += i915.o 70obj-$(CONFIG_DRM_I915) += i915.o
60 71
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
new file mode 100644
index 000000000000..7a5756e9bb86
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -0,0 +1,485 @@
1/*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Brad Volkin <bradley.d.volkin@intel.com>
25 *
26 */
27
28#include "i915_drv.h"
29