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authorArnd Bergmann <arnd@arndb.de>2011-12-27 18:56:51 -0500
committerArnd Bergmann <arnd@arndb.de>2011-12-27 18:56:51 -0500
commit8a44930a11de8d66f92145fd2d2464ab4fba696b (patch)
treed21f312d04fc14fae2f9aa3473f1424ad10d2647
parentcecd902ab4d1c489a121ad4b36f8982842802af5 (diff)
parent7d38af51d587ad953eef786a6922bcd1482cae5c (diff)
Merge branch 'next-samsung-cleanup-spi4' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into samsung/cleanup
Diffstat
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig8
-rw-r--r--arch/arm/mach-s3c64xx/Makefile2
-rw-r--r--arch/arm/mach-s3c64xx/dev-spi.c173
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h2
-rw-r--r--arch/arm/mach-s3c64xx/setup-spi.c45
-rw-r--r--arch/arm/mach-s5p64x0/Kconfig7
-rw-r--r--arch/arm/mach-s5p64x0/Makefile2
-rw-r--r--arch/arm/mach-s5p64x0/dev-spi.c218
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/map.h2
-rw-r--r--arch/arm/mach-s5p64x0/setup-spi.c55
-rw-r--r--arch/arm/mach-s5pc100/Kconfig5
-rw-r--r--arch/arm/mach-s5pc100/Makefile2
-rw-r--r--arch/arm/mach-s5pc100/dev-spi.c220
-rw-r--r--arch/arm/mach-s5pc100/include/mach/map.h3
-rw-r--r--arch/arm/mach-s5pc100/setup-spi.c65
-rw-r--r--arch/arm/mach-s5pv210/Kconfig5
-rw-r--r--arch/arm/mach-s5pv210/Makefile2
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c169
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h2
-rw-r--r--arch/arm/mach-s5pv210/setup-spi.c51
-rw-r--r--arch/arm/plat-samsung/Kconfig16
-rw-r--r--arch/arm/plat-samsung/devs.c127
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h8
-rw-r--r--arch/arm/plat-samsung/include/plat/s3c64xx-spi.h22
24 files changed, 409 insertions, 802 deletions
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 5552e048c2be..90b34ab75b53 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -77,6 +77,11 @@ config S3C64XX_SETUP_SDHCI_GPIO
77 help 77 help
78 Common setup code for S3C64XX SDHCI GPIO configurations 78 Common setup code for S3C64XX SDHCI GPIO configurations
79 79
80config S3C64XX_SETUP_SPI
81 bool
82 help
83 Common setup code for SPI GPIO configurations
84
80# S36400 Macchine support 85# S36400 Macchine support
81 86
82config MACH_SMDK6400 87config MACH_SMDK6400
@@ -276,6 +281,7 @@ config MACH_WLF_CRAGG_6410
276 select S3C64XX_SETUP_IDE 281 select S3C64XX_SETUP_IDE
277 select S3C64XX_SETUP_FB_24BPP 282 select S3C64XX_SETUP_FB_24BPP
278 select S3C64XX_SETUP_KEYPAD 283 select S3C64XX_SETUP_KEYPAD
284 select S3C64XX_SETUP_SPI
279 select SAMSUNG_DEV_ADC 285 select SAMSUNG_DEV_ADC
280 select SAMSUNG_DEV_KEYPAD 286 select SAMSUNG_DEV_KEYPAD
281 select S3C_DEV_USB_HOST 287 select S3C_DEV_USB_HOST
@@ -286,7 +292,7 @@ config MACH_WLF_CRAGG_6410
286 select S3C_DEV_I2C1 292 select S3C_DEV_I2C1
287 select S3C_DEV_WDT 293 select S3C_DEV_WDT
288 select S3C_DEV_RTC 294 select S3C_DEV_RTC
289 select S3C64XX_DEV_SPI 295 select S3C64XX_DEV_SPI0
290 select S3C24XX_GPIO_EXTRA128 296 select S3C24XX_GPIO_EXTRA128
291 select I2C 297 select I2C
292 help 298 help
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index e32093c58b2f..d7d9bb5dfb72 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o
34obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o 34obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o
35obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o 35obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
36obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 36obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
37obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi.o
37 38
38# PM 39# PM
39 40
@@ -59,4 +60,3 @@ obj-$(CONFIG_MACH_WLF_CRAGG_6410) += mach-crag6410.o mach-crag6410-module.o
59 60
60obj-y += dev-uart.o 61obj-y += dev-uart.o
61obj-y += dev-audio.o 62obj-y += dev-audio.o
62obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
deleted file mode 100644
index 3f437e7a6ba5..000000000000
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ /dev/null
@@ -1,173 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/dev-spi.c
2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/export.h>
14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17
18#include <mach/dma.h>
19#include <mach/map.h>
20#include <mach/spi-clocks.h>
21#include <mach/irqs.h>
22
23#include <plat/s3c64xx-spi.h>
24#include <plat/gpio-cfg.h>
25#include <plat/devs.h>
26
27/* SPI Controller platform_devices */
28
29/* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
30 * The emulated CS is toggled by board specific mechanism, as it can
31 * be either some immediate GPIO or some signal out of some other
32 * chip in between ... or some yet another way.
33 * We simply do not assume anything about CS.
34 */
35static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
36{
37 unsigned int base;
38
39 switch (pdev->id) {
40 case 0:
41 base = S3C64XX_GPC(0);
42 break;
43
44 case 1:
45 base = S3C64XX_GPC(4);
46 break;
47
48 default:
49 dev_err(&pdev->dev, "Invalid SPI Controller number!");
50 return -EINVAL;
51 }
52
53 s3c_gpio_cfgall_range(base, 3,
54 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
55
56 return 0;
57}
58
59static struct resource s3c64xx_spi0_resource[] = {
60 [0] = {
61 .start = S3C64XX_PA_SPI0,
62 .end = S3C64XX_PA_SPI0 + 0x100 - 1,
63 .flags = IORESOURCE_MEM,
64 },
65 [1] = {
66 .start = DMACH_SPI0_TX,
67 .end = DMACH_SPI0_TX,
68 .flags = IORESOURCE_DMA,
69 },
70 [2] = {
71 .start = DMACH_SPI0_RX,
72 .end = DMACH_SPI0_RX,
73 .flags = IORESOURCE_DMA,
74 },
75 [3] = {
76 .start = IRQ_SPI0,
77 .end = IRQ_SPI0,
78 .flags = IORESOURCE_IRQ,
79 },
80};
81
82static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
83 .cfg_gpio = s3c64xx_spi_cfg_gpio,
84 .fifo_lvl_mask = 0x7f,
85 .rx_lvl_offset = 13,
86 .tx_st_done = 21,
87};
88
89static u64 spi_dmamask = DMA_BIT_MASK(32);
90
91struct platform_device s3c64xx_device_spi0 = {
92 .name = "s3c64xx-spi",
93 .id = 0,
94 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
95 .resource = s3c64xx_spi0_resource,
96 .dev = {
97 .dma_mask = &spi_dmamask,
98 .coherent_dma_mask = DMA_BIT_MASK(32),
99 .platform_data = &s3c64xx_spi0_pdata,
100 },
101};
102EXPORT_SYMBOL(s3c64xx_device_spi0);
103
104static struct resource s3c64xx_spi1_resource[] = {
105 [0] = {
106 .start = S3C64XX_PA_SPI1,
107 .end = S3C64XX_PA_SPI1 + 0x100 - 1,
108 .flags = IORESOURCE_MEM,
109 },
110 [1] = {
111 .start = DMACH_SPI1_TX,
112 .end = DMACH_SPI1_TX,
113 .flags = IORESOURCE_DMA,
114 },
115 [2] = {
116 .start = DMACH_SPI1_RX,
117 .end = DMACH_SPI1_RX,
118 .flags = IORESOURCE_DMA,
119 },
120 [3] = {
121 .start = IRQ_SPI1,
122 .end = IRQ_SPI1,
123 .flags = IORESOURCE_IRQ,
124 },
125};
126
127static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
128 .cfg_gpio = s3c64xx_spi_cfg_gpio,
129 .fifo_lvl_mask = 0x7f,
130 .rx_lvl_offset = 13,
131 .tx_st_done = 21,
132};
133
134struct platform_device s3c64xx_device_spi1 = {
135 .name = "s3c64xx-spi",
136 .id = 1,
137 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
138 .resource = s3c64xx_spi1_resource,
139 .dev = {
140 .dma_mask = &spi_dmamask,
141 .coherent_dma_mask = DMA_BIT_MASK(32),
142 .platform_data = &s3c64xx_spi1_pdata,
143 },
144};
145EXPORT_SYMBOL(s3c64xx_device_spi1);
146
147void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
148{
149 struct s3c64xx_spi_info *pd;
150
151 /* Reject invalid configuration */
152 if (!num_cs || src_clk_nr < 0
153 || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) {
154 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
155 return;
156 }
157
158 switch (cntrlr) {
159 case 0:
160 pd = &s3c64xx_spi0_pdata;
161 break;
162 case 1:
163 pd = &s3c64xx_spi1_pdata;
164 break;
165 default:
166 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
167 __func__, cntrlr);
168 return;
169 }
170
171 pd->num_cs = num_cs;
172 pd->src_clk_nr = src_clk_nr;
173}
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 23a1d71e4d53..8e2097bb208a 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -115,6 +115,8 @@
115#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG 115#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
116#define S3C_PA_RTC S3C64XX_PA_RTC 116#define S3C_PA_RTC S3C64XX_PA_RTC
117#define S3C_PA_WDT S3C64XX_PA_WATCHDOG 117#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
118#define S3C_PA_SPI0 S3C64XX_PA_SPI0
119#define S3C_PA_SPI1 S3C64XX_PA_SPI1
118 120
119#define SAMSUNG_PA_ADC S3C64XX_PA_ADC 121#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
120#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON 122#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON
diff --git a/arch/arm/mach-s3c64xx/setup-spi.c b/arch/arm/mach-s3c64xx/setup-spi.c
new file mode 100644
index 000000000000..d9592ad7a825
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-spi.c
@@ -0,0 +1,45 @@
1/* linux/arch/arm/mach-s3c64xx/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
19 .fifo_lvl_mask = 0x7f,
20 .rx_lvl_offset = 13,
21 .tx_st_done = 21,
22};
23
24int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
25{
26 s3c_gpio_cfgall_range(S3C64XX_GPC(0), 3,
27 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
28 return 0;
29}
30#endif
31
32#ifdef CONFIG_S3C64XX_DEV_SPI1
33struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
34 .fifo_lvl_mask = 0x7f,
35 .rx_lvl_offset = 13,
36 .tx_st_done = 21,
37};
38
39int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
40{
41 s3c_gpio_cfgall_range(S3C64XX_GPC(4), 3,
42 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
43 return 0;
44}
45#endif
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 18690c5f99e6..dd8c85ef6dab 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -36,6 +36,11 @@ config S5P64X0_SETUP_I2C1
36 help 36 help
37 Common setup code for i2c bus 1. 37 Common setup code for i2c bus 1.
38 38
39config S5P64X0_SETUP_SPI
40 bool
41 help
42 Common setup code for SPI GPIO configurations
43
39# machine support 44# machine support
40 45
41config MACH_SMDK6440 46config MACH_SMDK6440
@@ -45,7 +50,6 @@ config MACH_SMDK6440
45 select S3C_DEV_I2C1 50 select S3C_DEV_I2C1
46 select S3C_DEV_RTC 51 select S3C_DEV_RTC
47 select S3C_DEV_WDT 52 select S3C_DEV_WDT
48 select S3C64XX_DEV_SPI
49 select SAMSUNG_DEV_ADC 53 select SAMSUNG_DEV_ADC
50 select SAMSUNG_DEV_BACKLIGHT 54 select SAMSUNG_DEV_BACKLIGHT
51 select SAMSUNG_DEV_PWM 55 select SAMSUNG_DEV_PWM
@@ -62,7 +66,6 @@ config MACH_SMDK6450
62 select S3C_DEV_I2C1 66 select S3C_DEV_I2C1
63 select S3C_DEV_RTC 67 select S3C_DEV_RTC
64 select S3C_DEV_WDT 68 select S3C_DEV_WDT
65 select S3C64XX_DEV_SPI
66 select SAMSUNG_DEV_ADC 69 select SAMSUNG_DEV_ADC
67 select SAMSUNG_DEV_BACKLIGHT 70 select SAMSUNG_DEV_BACKLIGHT
68 select SAMSUNG_DEV_PWM 71 select SAMSUNG_DEV_PWM
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index a1324d8dc4e0..a7d7a499d99e 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -26,7 +26,7 @@ obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
26# device support 26# device support
27 27
28obj-y += dev-audio.o 28obj-y += dev-audio.o
29obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
30 29
31obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o 30obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
32obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o 31obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o
32obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
deleted file mode 100644
index 5b5d3c083644..000000000000
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ /dev/null
@@ -1,218 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/dev-spi.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17
18#include <mach/dma.h>
19#include <mach/map.h>
20#include <mach/irqs.h>
21#include <mach/regs-clock.h>
22#include <mach/spi-clocks.h>
23
24#include <plat/cpu.h>
25#include <plat/s3c64xx-spi.h>
26#include <plat/gpio-cfg.h>
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
37{
38 unsigned int base;
39
40 switch (pdev->id) {
41 case 0:
42 base = S5P6440_GPC(0);
43 break;
44
45 case 1:
46 base = S5P6440_GPC(4);
47 break;
48
49 default:
50 dev_err(&pdev->dev, "Invalid SPI Controller number!");
51 return -EINVAL;
52 }
53
54 s3c_gpio_cfgall_range(base, 3,
55 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
56
57 return 0;
58}
59
60static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
61{
62 unsigned int base;
63
64 switch (pdev->id) {
65 case 0:
66 base = S5P6450_GPC(0);
67 break;
68
69 case 1:
70 base = S5P6450_GPC(4);
71 break;
72
73 default:
74 dev_err(&pdev->dev, "Invalid SPI Controller number!");
75 return -EINVAL;
76 }
77
78 s3c_gpio_cfgall_range(base, 3,
79 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
80
81 return 0;
82}
83
84static struct resource s5p64x0_spi0_resource[] = {
85 [0] = {
86 .start = S5P64X0_PA_SPI0,
87 .end = S5P64X0_PA_SPI0 + 0x100 - 1,
88 .flags = IORESOURCE_MEM,
89 },
90 [1] = {
91 .start = DMACH_SPI0_TX,
92 .end = DMACH_SPI0_TX,
93 .flags = IORESOURCE_DMA,
94 },
95 [2] = {
96 .start = DMACH_SPI0_RX,
97 .end = DMACH_SPI0_RX,
98 .flags = IORESOURCE_DMA,
99 },
100 [3] = {
101 .start = IRQ_SPI0,
102 .end = IRQ_SPI0,
103 .flags = IORESOURCE_IRQ,
104 },
105};
106
107static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
108 .cfg_gpio = s5p6440_spi_cfg_gpio,
109 .fifo_lvl_mask = 0x1ff,
110 .rx_lvl_offset = 15,
111 .tx_st_done = 25,
112};
113
114static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
115 .cfg_gpio = s5p6450_spi_cfg_gpio,
116 .fifo_lvl_mask = 0x1ff,
117 .rx_lvl_offset = 15,
118 .tx_st_done = 25,
119};
120
121static u64 spi_dmamask = DMA_BIT_MASK(32);
122
123struct platform_device s5p64x0_device_spi0 = {
124 .name = "s3c64xx-spi",
125 .id = 0,
126 .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
127 .resource = s5p64x0_spi0_resource,
128 .dev = {
129 .dma_mask = &spi_dmamask,
130 .coherent_dma_mask = DMA_BIT_MASK(32),
131 },
132};
133
134static struct resource s5p64x0_spi1_resource[] = {
135 [0] = {
136 .start = S5P64X0_PA_SPI1,
137 .end = S5P64X0_PA_SPI1 + 0x100 - 1,
138 .flags = IORESOURCE_MEM,
139 },
140 [1] = {
141 .start = DMACH_SPI1_TX,
142 .end = DMACH_SPI1_TX,
143 .flags = IORESOURCE_DMA,
144 },
145 [2] = {
146 .start = DMACH_SPI1_RX,
147 .end = DMACH_SPI1_RX,
148 .flags = IORESOURCE_DMA,
149 },
150 [3] = {
151 .start = IRQ_SPI1,
152 .end = IRQ_SPI1,
153 .flags = IORESOURCE_IRQ,
154 },
155};
156
157static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
158 .cfg_gpio = s5p6440_spi_cfg_gpio,
159 .fifo_lvl_mask = 0x7f,
160 .rx_lvl_offset = 15,
161 .tx_st_done = 25,
162};
163
164static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
165 .cfg_gpio = s5p6450_spi_cfg_gpio,
166 .fifo_lvl_mask = 0x7f,
167 .rx_lvl_offset = 15,
168 .tx_st_done = 25,
169};
170
171struct platform_device s5p64x0_device_spi1 = {
172 .name = "s3c64xx-spi",
173 .id = 1,
174 .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
175 .resource = s5p64x0_spi1_resource,
176 .dev = {
177 .dma_mask = &spi_dmamask,
178 .coherent_dma_mask = DMA_BIT_MASK(32),
179 },
180};
181
182void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
183{
184 struct s3c64xx_spi_info *pd;
185
186 /* Reject invalid configuration */
187 if (!num_cs || src_clk_nr < 0
188 || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
189 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
190 return;
191 }
192
193 switch (cntrlr) {
194 case 0:
195 if (soc_is_s5p6450())
196 pd = &s5p6450_spi0_pdata;
197 else
198 pd = &s5p6440_spi0_pdata;
199
200 s5p64x0_device_spi0.dev.platform_data = pd;
201 break;
202 case 1:
203 if (soc_is_s5p6450())
204 pd = &s5p6450_spi1_pdata;
205 else
206 pd = &s5p6440_spi1_pdata;
207
208 s5p64x0_device_spi1.dev.platform_data = pd;
209 break;
210 default:
211 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
212 __func__, cntrlr);
213 return;
214 }
215
216 pd->num_cs = num_cs;
217 pd->src_clk_nr = src_clk_nr;
218}
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
index 4d3ac8a3709d..0c0175dbfa34 100644
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -67,6 +67,8 @@
67#define S3C_PA_RTC S5P64X0_PA_RTC 67#define S3C_PA_RTC S5P64X0_PA_RTC
68#define S3C_PA_WDT S5P64X0_PA_WDT 68#define S3C_PA_WDT S5P64X0_PA_WDT
69#define S3C_PA_FB S5P64X0_PA_FB 69#define S3C_PA_FB S5P64X0_PA_FB
70#define S3C_PA_SPI0 S5P64X0_PA_SPI0
71#define S3C_PA_SPI1 S5P64X0_PA_SPI1
70 72
71#define S5P_PA_CHIPID S5P64X0_PA_CHIPID 73#define S5P_PA_CHIPID S5P64X0_PA_CHIPID
72#define S5P_PA_SROMC S5P64X0_PA_SROMC 74#define S5P_PA_SROMC S5P64X0_PA_SROMC
diff --git a/arch/arm/mach-s5p64x0/setup-spi.c b/arch/arm/mach-s5p64x0/setup-spi.c
new file mode 100644
index 000000000000..e9b841240352
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-spi.c
@@ -0,0 +1,55 @@
1/* linux/arch/arm/mach-s5p64x0/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14
15#include <plat/gpio-cfg.h>
16#include <plat/cpu.h>
17#include <plat/s3c64xx-spi.h>
18
19#ifdef CONFIG_S3C64XX_DEV_SPI0
20struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
21 .fifo_lvl_mask = 0x1ff,
22 .rx_lvl_offset = 15,
23 .tx_st_done = 25,
24};
25
26int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
27{
28 if (soc_is_s5p6450())
29 s3c_gpio_cfgall_range(S5P6450_GPC(0), 3,
30 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
31 else
32 s3c_gpio_cfgall_range(S5P6440_GPC(0), 3,
33 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
34 return 0;
35}
36#endif
37
38#ifdef CONFIG_S3C64XX_DEV_SPI1
39struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
40 .fifo_lvl_mask = 0x7f,
41 .rx_lvl_offset = 15,
42 .tx_st_done = 25,
43};
44
45int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
46{
47 if (soc_is_s5p6450())
48 s3c_gpio_cfgall_range(S5P6450_GPC(4), 3,
49 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
50 else
51 s3c_gpio_cfgall_range(S5P6440_GPC(4), 3,
52 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
53 return 0;
54}
55#endif
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index e538a4c67e9c..75a26eaf2633 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -45,6 +45,11 @@ config S5PC100_SETUP_SDHCI_GPIO
45 help 45 help
46 Common setup code for SDHCI gpio. 46 Common setup code for SDHCI gpio.
47 47
48config S5PC100_SETUP_SPI
49 bool
50 help
51 Common setup code for SPI GPIO configurations.
52
48config MACH_SMDKC100 53config MACH_SMDKC100
49 bool "SMDKC100" 54 bool "SMDKC100"
50 select CPU_S5PC100 55 select CPU_S5PC100
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 2320e5495a55..291e246c0ec0 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -22,10 +22,10 @@ obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o
22obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o 22obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o
23obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o 23obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o
24obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 24obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
25obj-$(CONFIG_S5PC100_SETUP_SPI) += setup-spi.o
25 26
26# device support 27# device support
27obj-y += dev-audio.o 28obj-y += dev-audio.o
28obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
29 29
30# machine support 30# machine support
31 31
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
deleted file mode 100644
index 155f50da2d78..000000000000
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ /dev/null
@@ -1,220 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
14
15#include <mach/dma.h>
16#include <mach/map.h>
17#include <mach/spi-clocks.h>
18#include <mach/irqs.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22#include <plat/irqs.h>
23
24/* SPI Controller platform_devices */
25
26/* Since we emulate multi-cs capability, we do not touch the CS.
27 * The emulated CS is toggled by board specific mechanism, as it can
28 * be either some immediate GPIO or some signal out of some other
29 * chip in between ... or some yet another way.
30 * We simply do not assume anything about CS.
31 */
32static int s5pc100_spi_cfg_gpio(struct platform_device *pdev)
33{
34 switch (pdev->id) {
35 case 0:
36 s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
37 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
38 break;
39
40 case 1:
41 s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
42 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
43 break;
44
45 case 2:
46 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
47 s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
48 s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
49 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
50 break;
51
52 default:
53 dev_err(&pdev->dev, "Invalid SPI Controller number!");
54 return -EINVAL;
55 }
56
57 return 0;
58}
59
60static struct resource s5pc100_spi0_resource[] = {
61 [0] = {
62 .start = S5PC100_PA_SPI0,
63 .end = S5PC100_PA_SPI0 + 0x100 - 1,
64 .flags = IORESOURCE_MEM,
65 },
66 [1] = {
67 .start = DMACH_SPI0_TX,
68 .end = DMACH_SPI0_TX,
69 .flags = IORESOURCE_DMA,
70 },
71 [2] = {
72 .start = DMACH_SPI0_RX,
73 .end = DMACH_SPI0_RX,
74 .flags = IORESOURCE_DMA,
75 },
76 [3] = {
77 .start = IRQ_SPI0,
78 .end = IRQ_SPI0,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83static struct s3c64xx_spi_info s5pc100_spi0_pdata = {
84 .cfg_gpio = s5pc100_spi_cfg_gpio,
85 .fifo_lvl_mask = 0x7f,
86 .rx_lvl_offset = 13,
87 .high_speed = 1,
88 .tx_st_done = 21,
89};
90
91static u64 spi_dmamask = DMA_BIT_MASK(32);
92
93struct platform_device s5pc100_device_spi0 = {
94 .name = "s3c64xx-spi",
95 .id = 0,
96 .num_resources = ARRAY_SIZE(s5pc100_spi0_resource),
97 .resource = s5pc100_spi0_resource,
98 .dev = {
99 .dma_mask = &spi_dmamask,
100 .coherent_dma_mask = DMA_BIT_MASK(32),
101 .platform_data = &s5pc100_spi0_pdata,
102 },
103};
104
105static struct resource s5pc100_spi1_resource[] = {
106 [0] = {
107 .start = S5PC100_PA_SPI1,
108 .end = S5PC100_PA_SPI1 + 0x100 - 1,
109 .flags = IORESOURCE_MEM,
110 },
111 [1] = {
112 .start = DMACH_SPI1_TX,
113 .end = DMACH_SPI1_TX,
114 .flags = IORESOURCE_DMA,
115 },
116 [2] = {
117 .start = DMACH_SPI1_RX,
118 .end = DMACH_SPI1_RX,
119 .flags = IORESOURCE_DMA,
120 },
121 [3] = {
122 .start = IRQ_SPI1,
123 .end = IRQ_SPI1,
124 .flags = IORESOURCE_IRQ,
125 },
126};
127
128static struct s3c64xx_spi_info s5pc100_spi1_pdata = {
129 .cfg_gpio = s5pc100_spi_cfg_gpio,
130 .fifo_lvl_mask = 0x7f,
131 .rx_lvl_offset = 13,
132 .high_speed = 1,
133 .tx_st_done = 21,
134};
135
136struct platform_device s5pc100_device_spi1 = {
137 .name = "s3c64xx-spi",
138 .id = 1,
139 .num_resources = ARRAY_SIZE(s5pc100_spi1_resource),
140 .resource = s5pc100_spi1_resource,
141 .dev = {
142 .dma_mask = &spi_dmamask,
143 .coherent_dma_mask = DMA_BIT_MASK(32),
144 .platform_data = &s5pc100_spi1_pdata,
145 },
146};
147
148static struct resource s5pc100_spi2_resource[] = {
149 [0] = {
150 .start = S5PC100_PA_SPI2,
151 .end = S5PC100_PA_SPI2 + 0x100 - 1,
152 .flags = IORESOURCE_MEM,
153 },
154 [1] = {
155 .start = DMACH_SPI2_TX,
156 .end = DMACH_SPI2_TX,
157 .flags = IORESOURCE_DMA,
158 },
159 [2] = {
160 .start = DMACH_SPI2_RX,
161 .end = DMACH_SPI2_RX,
162 .flags = IORESOURCE_DMA,
163 },
164 [3] = {
165 .start = IRQ_SPI2,
166 .end = IRQ_SPI2,
167 .flags = IORESOURCE_IRQ,
168 },
169};
170
171static struct s3c64xx_spi_info s5pc100_spi2_pdata = {
172 .cfg_gpio = s5pc100_spi_cfg_gpio,
173 .fifo_lvl_mask = 0x7f,
174 .rx_lvl_offset = 13,
175 .high_speed = 1,
176 .tx_st_done = 21,
177};
178
179struct platform_device s5pc100_device_spi2 = {
180 .name = "s3c64xx-spi",
181 .id = 2,
182 .num_resources = ARRAY_SIZE(s5pc100_spi2_resource),
183 .resource = s5pc100_spi2_resource,
184 .dev = {
185 .dma_mask = &spi_dmamask,
186 .coherent_dma_mask = DMA_BIT_MASK(32),
187 .platform_data = &s5pc100_spi2_pdata,
188 },
189};
190
191void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
192{
193 struct s3c64xx_spi_info *pd;
194
195 /* Reject invalid configuration */
196 if (!num_cs || src_clk_nr < 0
197 || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) {
198 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
199 return;
200 }
201
202 switch (cntrlr) {
203 case 0:
204 pd = &s5pc100_spi0_pdata;
205 break;
206 case 1:
207 pd = &s5pc100_spi1_pdata;
208 break;
209 case 2:
210 pd = &s5pc100_spi2_pdata;
211 break;
212 default:
213 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
214 __func__, cntrlr);
215 return;
216 }
217
218 pd->num_cs = num_cs;
219 pd->src_clk_nr = src_clk_nr;
220}
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index ccbe6b767f7d..54bc4f82e17a 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -100,6 +100,9 @@
100#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG 100#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
101#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY 101#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
102#define S3C_PA_WDT S5PC100_PA_WATCHDOG 102#define S3C_PA_WDT S5PC100_PA_WATCHDOG
103#define S3C_PA_SPI0 S5PC100_PA_SPI0
104#define S3C_PA_SPI1 S5PC100_PA_SPI1
105#define S3C_PA_SPI2 S5PC100_PA_SPI2
103 106
104#define S5P_PA_CHIPID S5PC100_PA_CHIPID 107#define S5P_PA_CHIPID S5PC100_PA_CHIPID
105#define S5P_PA_FIMC0 S5PC100_PA_FIMC0 108#define S5P_PA_FIMC0 S5PC100_PA_FIMC0
diff --git a/arch/arm/mach-s5pc100/setup-spi.c b/arch/arm/mach-s5pc100/setup-spi.c
new file mode 100644
index 000000000000..431a6f747caa
--- /dev/null
+++ b/arch/arm/mach-s5pc100/setup-spi.c
@@ -0,0 +1,65 @@
1/* linux/arch/arm/mach-s5pc100/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
19 .fifo_lvl_mask = 0x7f,
20 .rx_lvl_offset = 13,
21 .high_speed = 1,
22 .tx_st_done = 21,
23};
24
25int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
26{
27 s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
28 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
29 return 0;
30}
31#endif
32
33#ifdef CONFIG_S3C64XX_DEV_SPI1
34struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
35 .fifo_lvl_mask = 0x7f,
36 .rx_lvl_offset = 13,
37 .high_speed = 1,
38 .tx_st_done = 21,
39};
40
41int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
42{
43 s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
44 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
45 return 0;
46}
47#endif
48
49#ifdef CONFIG_S3C64XX_DEV_SPI2
50struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
51 .fifo_lvl_mask = 0x7f,
52 .rx_lvl_offset = 13,
53 .high_speed = 1,
54 .tx_st_done = 21,
55};
56
57int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
58{
59 s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
60 s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
61 s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
62 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
63 return 0;
64}
65#endif
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 646057ab2e4c..2cdc42e838b8 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -60,6 +60,11 @@ config S5PV210_SETUP_FIMC
60 help 60 help
61 Common setup code for the camera interfaces. 61 Common setup code for the camera interfaces.
62 62
63config S5PV210_SETUP_SPI
64 bool
65 help
66 Common setup code for SPI GPIO configurations.
67
63menu "S5PC110 Machines" 68menu "S5PC110 Machines"
64 69
65config MACH_AQUILA 70config MACH_AQUILA
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 53c346a4cbb1..471df5d2d25c 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o
27# device support 27# device support
28 28
29obj-y += dev-audio.o 29obj-y += dev-audio.o
30obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
31 30
32obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 31obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
33obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o 32obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o
@@ -36,3 +35,4 @@ obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
36obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o 35obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
37obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o 36obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
38obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 37obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
38obj-$(CONFIG_S5PV210_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
deleted file mode 100644
index 39bef19dbd68..000000000000
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ /dev/null
@@ -1,169 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
14
15#include <mach/dma.h>
16#include <mach/map.h>
17#include <mach/irqs.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23/* SPI Controller platform_devices */
24
25/* Since we emulate multi-cs capability, we do not touch the CS.
26 * The emulated CS is toggled by board specific mechanism, as it can
27 * be either some immediate GPIO or some signal out of some other
28 * chip in between ... or some yet another way.
29 * We simply do not assume anything about CS.
30 */
31static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
32{
33 unsigned int base;
34
35 switch (pdev->id) {
36 case 0:
37 base = S5PV210_GPB(0);
38 break;
39
40 case 1:
41 base = S5PV210_GPB(4);
42 break;
43
44 default:
45 dev_err(&pdev->dev, "Invalid SPI Controller number!");
46 return -EINVAL;
47 }
48
49 s3c_gpio_cfgall_range(base, 3,
50 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
51
52 return 0;
53}
54
55static struct resource s5pv210_spi0_resource[] = {
56 [0] = {
57 .start = S5PV210_PA_SPI0,
58 .end = S5PV210_PA_SPI0 + 0x100 - 1,
59 .flags = IORESOURCE_MEM,
60 },
61 [1] = {
62 .start = DMACH_SPI0_TX,
63 .end = DMACH_SPI0_TX,
64 .flags = IORESOURCE_DMA,
65 },
66 [2] = {
67 .start = DMACH_SPI0_RX,
68 .end = DMACH_SPI0_RX,
69 .flags = IORESOURCE_DMA,
70 },
71 [3] = {
72 .start = IRQ_SPI0,
73 .end = IRQ_SPI0,
74 .flags = IORESOURCE_IRQ,
75 },
76};
77
78static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
79 .cfg_gpio = s5pv210_spi_cfg_gpio,
80 .fifo_lvl_mask = 0x1ff,
81 .rx_lvl_offset = 15,
82 .high_speed = 1,
83 .tx_st_done = 25,
84};
85
86static u64 spi_dmamask = DMA_BIT_MASK(32);
87
88struct platform_device s5pv210_device_spi0 = {
89 .name = "s3c64xx-spi",
90 .id = 0,
91 .num_resources = ARRAY_SIZE(s5pv210_spi0_resource),
92 .resource = s5pv210_spi0_resource,
93 .dev = {
94 .dma_mask = &spi_dmamask,
95 .coherent_dma_mask = DMA_BIT_MASK(32),
96 .platform_data = &s5pv210_spi0_pdata,
97 },
98};
99
100static struct resource s5pv210_spi1_resource[] = {
101 [0] = {
102 .start = S5PV210_PA_SPI1,
103 .end = S5PV210_PA_SPI1 + 0x100 - 1,
104 .flags = IORESOURCE_MEM,
105 },
106 [1] = {
107 .start = DMACH_SPI1_TX,
108 .end = DMACH_SPI1_TX,
109 .flags = IORESOURCE_DMA,
110 },
111 [2] = {
112 .start = DMACH_SPI1_RX,
113 .end = DMACH_SPI1_RX,
114 .flags = IORESOURCE_DMA,
115 },
116 [3] = {
117 .start = IRQ_SPI1,
118 .end = IRQ_SPI1,
119 .flags = IORESOURCE_IRQ,
120 },
121};
122
123static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
124 .cfg_gpio = s5pv210_spi_cfg_gpio,
125 .fifo_lvl_mask = 0x7f,
126 .rx_lvl_offset = 15,
127 .high_speed = 1,
128 .tx_st_done = 25,
129};
130
131struct platform_device s5pv210_device_spi1 = {
132 .name = "s3c64xx-spi",
133 .id = 1,
134 .num_resources = ARRAY_SIZE(s5pv210_spi1_resource),
135 .resource = s5pv210_spi1_resource,
136 .dev = {
137 .dma_mask = &spi_dmamask,
138 .coherent_dma_mask = DMA_BIT_MASK(32),
139 .platform_data = &s5pv210_spi1_pdata,
140 },
141};
142
143void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
144{
145 struct s3c64xx_spi_info *pd;
146
147 /* Reject invalid configuration */
148 if (!num_cs || src_clk_nr < 0
149 || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) {
150 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
151 return;
152 }
153
154 switch (cntrlr) {
155 case 0:
156 pd = &s5pv210_spi0_pdata;
157 break;
158 case 1:
159 pd = &s5pv210_spi1_pdata;
160 break;
161 default:
162 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
163 __func__, cntrlr);
164 return;
165 }
166
167 pd->num_cs = num_cs;
168 pd->src_clk_nr = src_clk_nr;
169}
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 7ff609f1568b..89c34b8f73bf 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -109,6 +109,8 @@
109#define S3C_PA_RTC S5PV210_PA_RTC 109#define S3C_PA_RTC S5PV210_PA_RTC
110#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG 110#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG
111#define S3C_PA_WDT S5PV210_PA_WATCHDOG 111#define S3C_PA_WDT S5PV210_PA_WATCHDOG
112#define S3C_PA_SPI0 S5PV210_PA_SPI0
113#define S3C_PA_SPI1 S5PV210_PA_SPI1
112 114
113#define S5P_PA_CHIPID S5PV210_PA_CHIPID 115#define S5P_PA_CHIPID S5PV210_PA_CHIPID
114#define S5P_PA_FIMC0 S5PV210_PA_FIMC0 116#define S5P_PA_FIMC0 S5PV210_PA_FIMC0
diff --git a/arch/arm/mach-s5pv210/setup-spi.c b/arch/arm/mach-s5pv210/setup-spi.c
new file mode 100644
index 000000000000..f43c5048a37d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-spi.c
@@ -0,0 +1,51 @@
1/* linux/arch/arm/mach-s5pv210/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
19 .fifo_lvl_mask = 0x1ff,
20 .rx_lvl_offset = 15,
21 .high_speed = 1,
22 .tx_st_done = 25,
23};
24
25int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
26{
27 s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
28 s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
29 s3c_gpio_cfgall_range(S5PV210_GPB(2), 2,
30 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
31 return 0;
32}
33#endif
34
35#ifdef CONFIG_S3C64XX_DEV_SPI1
36struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
37 .fifo_lvl_mask = 0x7f,
38 .rx_lvl_offset = 15,
39 .high_speed = 1,
40 .tx_st_done = 25,
41};
42
43int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
44{
45 s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));
46 s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
47 s3c_gpio_cfgall_range(S5PV210_GPB(6), 2,
48 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
49 return 0;
50}
51#endif
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 313eb26cfa62..160eea15a6ef 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -226,11 +226,23 @@ config SAMSUNG_DEV_IDE
226 help 226 help
227 Compile in platform device definitions for IDE 227 Compile in platform device definitions for IDE
228 228
229config S3C64XX_DEV_SPI 229config S3C64XX_DEV_SPI0
230 bool 230 bool
231 help 231 help
232 Compile in platform device definitions for S3C64XX's type 232 Compile in platform device definitions for S3C64XX's type
233 SPI controllers. 233 SPI controller 0
234
235config S3C64XX_DEV_SPI1
236 bool
237 help
238 Compile in platform device definitions for S3C64XX's type
239 SPI controller 1
240
241config S3C64XX_DEV_SPI2
242 bool
243 help
244 Compile in platform device definitions for S3C64XX's type
245 SPI controller 2
234 246
235config SAMSUNG_DEV_TS 247config SAMSUNG_DEV_TS
236 bool 248 bool
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 4ca8b571f971..de0d88d6a0f1 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -61,6 +61,7 @@
61#include <plat/regs-iic.h> 61#include <plat/regs-iic.h>
62#include <plat/regs-serial.h> 62#include <plat/regs-serial.h>
63#include <plat/regs-spi.h> 63#include <plat/regs-spi.h>
64#include <plat/s3c64xx-spi.h>
64 65
65static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); 66static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
66 67
@@ -1461,3 +1462,129 @@ struct platform_device s3c_device_wdt = {
1461 .resource = s3c_wdt_resource, 1462 .resource = s3c_wdt_resource,
1462}; 1463};
1463#endif /* CONFIG_S3C_DEV_WDT */ 1464#endif /* CONFIG_S3C_DEV_WDT */
1465
1466#ifdef CONFIG_S3C64XX_DEV_SPI0
1467static struct resource s3c64xx_spi0_resource[] = {
1468 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1469 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1470 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1471 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1472};
1473
1474struct platform_device s3c64xx_device_spi0 = {
1475 .name = "s3c64xx-spi",
1476 .id = 0,
1477 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1478 .resource = s3c64xx_spi0_resource,
1479 .dev = {
1480 .dma_mask = &samsung_device_dma_mask,
1481 .coherent_dma_mask = DMA_BIT_MASK(32),
1482 },
1483};
1484
1485void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1486 int src_clk_nr, int num_cs)
1487{
1488 if (!pd) {
1489 pr_err("%s:Need to pass platform data\n", __func__);
1490 return;
1491 }
1492
1493 /* Reject invalid configuration */
1494 if (!num_cs || src_clk_nr < 0) {
1495 pr_err("%s: Invalid SPI configuration\n", __func__);
1496 return;
1497 }
1498
1499 pd->num_cs = num_cs;
1500 pd->src_clk_nr = src_clk_nr;
1501 if (!pd->cfg_gpio)
1502 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1503
1504 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1505}
1506#endif /* CONFIG_S3C64XX_DEV_SPI0 */
1507
1508#ifdef CONFIG_S3C64XX_DEV_SPI1
1509static struct resource s3c64xx_spi1_resource[] = {
1510 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1511 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1512 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1513 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1514};
1515
1516struct platform_device s3c64xx_device_spi1 = {
1517 .name = "s3c64xx-spi",
1518 .id = 1,
1519 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1520 .resource = s3c64xx_spi1_resource,
1521 .dev = {
1522 .dma_mask = &samsung_device_dma_mask,
1523 .coherent_dma_mask = DMA_BIT_MASK(32),
1524 },
1525};
1526
1527void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1528 int src_clk_nr, int num_cs)
1529{
1530 if (!pd) {
1531 pr_err("%s:Need to pass platform data\n", __func__);
1532 return;
1533 }
1534
1535 /* Reject invalid configuration */
1536 if (!num_cs || src_clk_nr < 0) {
1537 pr_err("%s: Invalid SPI configuration\n", __func__);
1538 return;
1539 }
1540
1541 pd->num_cs = num_cs;
1542 pd->src_clk_nr = src_clk_nr;
1543 if (!pd->cfg_gpio)
1544 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1545
1546 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1547}
1548#endif /* CONFIG_S3C64XX_DEV_SPI1 */
1549
1550#ifdef CONFIG_S3C64XX_DEV_SPI2
1551static struct resource s3c64xx_spi2_resource[] = {
1552 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1553 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1554 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1555 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1556};
1557
1558struct platform_device s3c64xx_device_spi2 = {
1559 .name = "s3c64xx-spi",
1560 .id = 2,
1561 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1562 .resource = s3c64xx_spi2_resource,
1563 .dev = {
1564 .dma_mask = &samsung_device_dma_mask,
1565 .coherent_dma_mask = DMA_BIT_MASK(32),
1566 },
1567};
1568
1569void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1570 int src_clk_nr, int num_cs)
1571{
1572 if (!pd) {
1573 pr_err("%s:Need to pass platform data\n", __func__);
1574 return;
1575 }
1576
1577 /* Reject invalid configuration */
1578 if (!num_cs || src_clk_nr < 0) {
1579 pr_err("%s: Invalid SPI configuration\n", __func__);
1580 return;
1581 }
1582
1583 pd->num_cs = num_cs;
1584 pd->src_clk_nr = src_clk_nr;
1585 if (!pd->cfg_gpio)
1586 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1587
1588 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1589}
1590#endif /* CONFIG_S3C64XX_DEV_SPI2 */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index ab633c9c2aec..83b1e31696d9 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -39,6 +39,7 @@ extern struct platform_device s3c64xx_device_pcm0;
39extern struct platform_device s3c64xx_device_pcm1; 39extern struct platform_device s3c64xx_device_pcm1;
40extern struct platform_device s3c64xx_device_spi0; 40extern struct platform_device s3c64xx_device_spi0;
41extern struct platform_device s3c64xx_device_spi1; 41extern struct platform_device s3c64xx_device_spi1;
42extern struct platform_device s3c64xx_device_spi2;
42 43
43extern struct platform_device s3c_device_adc; 44extern struct platform_device s3c_device_adc;
44extern struct platform_device s3c_device_cfcon; 45extern struct platform_device s3c_device_cfcon;
@@ -98,8 +99,6 @@ extern struct platform_device s5p6450_device_iis1;
98extern struct platform_device s5p6450_device_iis2; 99extern struct platform_device s5p6450_device_iis2;
99extern struct platform_device s5p6450_device_pcm0; 100extern struct platform_device s5p6450_device_pcm0;
100 101
101extern struct platform_device s5p64x0_device_spi0;
102extern struct platform_device s5p64x0_device_spi1;
103 102
104extern struct platform_device s5pc100_device_ac97; 103extern struct platform_device s5pc100_device_ac97;
105extern struct platform_device s5pc100_device_iis0; 104extern struct platform_device s5pc100_device_iis0;
@@ -108,9 +107,6 @@ extern struct platform_device s5pc100_device_iis2;
108extern struct platform_device s5pc100_device_pcm0; 107extern struct platform_device s5pc100_device_pcm0;
109extern struct platform_device s5pc100_device_pcm1; 108extern struct platform_device s5pc100_device_pcm1;
110extern struct platform_device s5pc100_device_spdif; 109extern struct platform_device s5pc100_device_spdif;
111extern struct platform_device s5pc100_device_spi0;
112extern struct platform_device s5pc100_device_spi1;
113extern struct platform_device s5pc100_device_spi2;
114 110
115extern struct platform_device s5pv210_device_ac97; 111extern struct platform_device s5pv210_device_ac97;
116extern struct platform_device s5pv210_device_iis0; 112extern struct platform_device s5pv210_device_iis0;
@@ -120,8 +116,6 @@ extern struct platform_device s5pv210_device_pcm0;
120extern struct platform_device s5pv210_device_pcm1; 116extern struct platform_device s5pv210_device_pcm1;
121extern struct platform_device s5pv210_device_pcm2; 117extern struct platform_device s5pv210_device_pcm2;
122extern struct platform_device s5pv210_device_spdif; 118extern struct platform_device s5pv210_device_spdif;
123extern struct platform_device s5pv210_device_spi0;
124extern struct platform_device s5pv210_device_spi1;
125 119
126extern struct platform_device exynos4_device_ac97; 120extern struct platform_device exynos4_device_ac97;
127extern struct platform_device exynos4_device_ahci; 121extern struct platform_device exynos4_device_ahci;
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index c3d82a5f5630..aea68b60ef98 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -56,18 +56,28 @@ struct s3c64xx_spi_info {
56}; 56};
57 57
58/** 58/**
59 * s3c64xx_spi_set_info - SPI Controller configure callback by the board 59 * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board
60 * initialization code. 60 * initialization code.
61 * @cntrlr: SPI controller number the configuration is for. 61 * @pd: SPI platform data to set.
62 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks. 62 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
63 * @num_cs: Number of elements in the 'cs' array. 63 * @num_cs: Number of elements in the 'cs' array.
64 * 64 *
65 * Call this from machine init code for each SPI Controller that 65 * Call this from machine init code for each SPI Controller that
66 * has some chips attached to it. 66 * has some chips attached to it.
67 */ 67 */
68extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 68extern void s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
69extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 69 int src_clk_nr, int num_cs);
70extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 70extern void s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
71extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); 71 int src_clk_nr, int num_cs);
72extern void s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
73 int src_clk_nr, int num_cs);
72 74
75/* defined by architecture to configure gpio */
76extern int s3c64xx_spi0_cfg_gpio(struct platform_device *dev);
77extern int s3c64xx_spi1_cfg_gpio(struct platform_device *dev);
78extern int s3c64xx_spi2_cfg_gpio(struct platform_device *dev);
79
80extern struct s3c64xx_spi_info s3c64xx_spi0_pdata;
81extern struct s3c64xx_spi_info s3c64xx_spi1_pdata;
82extern struct s3c64xx_spi_info s3c64xx_spi2_pdata;
73#endif /* __S3C64XX_PLAT_SPI_H */ 83#endif /* __S3C64XX_PLAT_SPI_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-14 15:59:03 -0400