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authorFelix Fietkau <nbd@openwrt.org>2012-07-15 13:53:37 -0400
committerJohn W. Linville <linville@tuxdriver.com>2012-07-17 15:11:35 -0400
commit89be49e1cd91aba694065cd2ab1463338830c3a4 (patch)
tree271e0808de0414400d5106d57b20fd1a763a19f1
parentaa5955c36fc3dfa6d18b47fc206987c561d903d8 (diff)
ath9k_hw: apply XPA timing control values from EEPROM
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 3cddd78e88ac..86e4be4928b7 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3962,9 +3962,32 @@ static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
3962 AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value); 3962 AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
3963} 3963}
3964 3964
3965static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz)
3966{
3967 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
3968 u8 xpa_ctl;
3969
3970 if (!(eep->baseEepHeader.featureEnable & 0x80))
3971 return;
3972
3973 if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
3974 return;
3975
3976 if (is_2ghz) {
3977 xpa_ctl = eep->modalHeader2G.txFrameToXpaOn;
3978 REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
3979 AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
3980 } else {
3981 xpa_ctl = eep->modalHeader5G.txFrameToXpaOn;
3982 REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
3983 AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
3984 }
3985}
3986
3965static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah, 3987static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
3966 struct ath9k_channel *chan) 3988 struct ath9k_channel *chan)
3967{ 3989{
3990 ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan));
3968 ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan)); 3991 ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
3969 ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan)); 3992 ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
3970 ar9003_hw_drive_strength_apply(ah); 3993 ar9003_hw_drive_strength_apply(ah);