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authorStephen Boyd <sboyd@codeaurora.org>2014-02-26 14:12:23 -0500
committerLinus Walleij <linus.walleij@linaro.org>2014-03-06 20:28:52 -0500
commit893a7d11a185c5d4d1cf47d94880a973ef55e2a0 (patch)
treebf70d2c88966db65b2aeeda19791eaf01f216140
parente6fae2d03dc4f9172db88ad18a577c2a45b9e8ac (diff)
devicetree: bindings: Make msm8974-pinctrl documentation match code
The compatible string doesn't have an x in it. Fix it. Also remove the "qcom" prefix from pins and functions as this binding uses the generic pinctrl bindings for the pins and functions. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt14
1 files changed, 7 insertions, 7 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt
index 4c352be5dd61..9fb89e3f61ea 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt
@@ -1,7 +1,7 @@
1Qualcomm MSM8974 TLMM block 1Qualcomm MSM8974 TLMM block
2 2
3Required properties: 3Required properties:
4- compatible: "qcom,msm8x74-pinctrl" 4- compatible: "qcom,msm8974-pinctrl"
5- reg: Should be the base address and length of the TLMM block. 5- reg: Should be the base address and length of the TLMM block.
6- interrupts: Should be the parent IRQ of the TLMM block. 6- interrupts: Should be the parent IRQ of the TLMM block.
7- interrupt-controller: Marks the device node as an interrupt controller. 7- interrupt-controller: Marks the device node as an interrupt controller.
@@ -42,14 +42,14 @@ Non-empty subnodes must specify the 'pins' property.
42Note that not all properties are valid for all pins. 42Note that not all properties are valid for all pins.
43 43
44 44
45Valid values for qcom,pins are: 45Valid values for pins are:
46 gpio0-gpio145 46 gpio0-gpio145
47 Supports mux, bias and drive-strength 47 Supports mux, bias and drive-strength
48 48
49 sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data 49 sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data
50 Supports bias and drive-strength 50 Supports bias and drive-strength
51 51
52Valid values for qcom,function are: 52Valid values for function are:
53 blsp_i2c2, blsp_i2c6, blsp_i2c11, blsp_spi1, blsp_uart2, blsp_uart8, slimbus 53 blsp_i2c2, blsp_i2c6, blsp_i2c11, blsp_spi1, blsp_uart2, blsp_uart8, slimbus
54 54
55 (Note that this is not yet the complete list of functions) 55 (Note that this is not yet the complete list of functions)
@@ -73,18 +73,18 @@ Example:
73 73
74 uart2_default: uart2_default { 74 uart2_default: uart2_default {
75 mux { 75 mux {
76 qcom,pins = "gpio4", "gpio5"; 76 pins = "gpio4", "gpio5";
77 qcom,function = "blsp_uart2"; 77 function = "blsp_uart2";
78 }; 78 };
79 79
80 tx { 80 tx {
81 qcom,pins = "gpio4"; 81 pins = "gpio4";
82 drive-strength = <4>; 82 drive-strength = <4>;
83 bias-disable; 83 bias-disable;
84 }; 84 };
85 85
86 rx { 86 rx {
87 qcom,pins = "gpio5"; 87 pins = "gpio5";
88 drive-strength = <2>; 88 drive-strength = <2>;
89 bias-pull-up; 89 bias-pull-up;
90 }; 90 };