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authorMaciej W. Rozycki <macro@linux-mips.org>2014-07-05 10:14:46 -0400
committerDavid S. Miller <davem@davemloft.net>2014-07-08 18:30:27 -0400
commit8848761f9432160ad63e28b16f5c4516683ef905 (patch)
tree019e1877e71f0bbacf6ef3aa9f5009c96172875d
parentb37cccf031bdcaba2f461cdb5a2b93ebbd0af03c (diff)
defxx: Add missing DMA synchronisation calls
This adds DMA synchronisation calls needed in the receive path: 1. To retrieve the Receive Status word that is prepended by the PDQ DMA engine in the receive buffer, and provides information about the frame received, including its size and any errors. 2. To make data received available for copying in the small-frame case (size <= SKBUFF_RX_COPYBREAK) where the original DMA buffer will be returned to the receive descriptor ring and therefore its mapping retained. With DMA mapping error handling in place, added by the other patch, this may now also trigger where an attempt to map a newly allocated buffer for DMA has failed. In that case data from the original buffer will be copied out and the buffer returned to the DMA descriptor ring. These calls may do nothing when data is in the host DMA addressing range of the FDDI interface, such as always on 32-bit systems, however their absence makes frame reception stop functioning reliably on systems that have memory beyond the low 4GB of the address space. Reported-by: Robert Coerver <Robert.Coerver@ll.mit.edu> Tested-by: Robert Coerver <Robert.Coerver@ll.mit.edu> Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/fddi/defxx.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/net/fddi/defxx.c b/drivers/net/fddi/defxx.c
index ed23288d1c55..3d1a878a4ab0 100644
--- a/drivers/net/fddi/defxx.c
+++ b/drivers/net/fddi/defxx.c
@@ -196,6 +196,7 @@
196 * 14 Jun 2005 macro Use irqreturn_t. 196 * 14 Jun 2005 macro Use irqreturn_t.
197 * 23 Oct 2006 macro Big-endian host support. 197 * 23 Oct 2006 macro Big-endian host support.
198 * 14 Dec 2006 macro TURBOchannel support. 198 * 14 Dec 2006 macro TURBOchannel support.
199 * 01 Jul 2014 macro Fixes for DMA on 64-bit hosts.
199 */ 200 */
200 201
201/* Include files */ 202/* Include files */
@@ -224,8 +225,8 @@
224 225
225/* Version information string should be updated prior to each new release! */ 226/* Version information string should be updated prior to each new release! */
226#define DRV_NAME "defxx" 227#define DRV_NAME "defxx"
227#define DRV_VERSION "v1.10" 228#define DRV_VERSION "v1.11"
228#define DRV_RELDATE "2006/12/14" 229#define DRV_RELDATE "2014/07/01"
229 230
230static char version[] = 231static char version[] =
231 DRV_NAME ": " DRV_VERSION " " DRV_RELDATE 232 DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
@@ -3026,7 +3027,7 @@ static void dfx_rcv_queue_process(
3026 while (bp->rcv_xmt_reg.index.rcv_comp != p_type_2_cons->index.rcv_cons) 3027 while (bp->rcv_xmt_reg.index.rcv_comp != p_type_2_cons->index.rcv_cons)
3027 { 3028 {
3028 /* Process any errors */ 3029 /* Process any errors */
3029 3030 dma_addr_t dma_addr;
3030 int entry; 3031 int entry;
3031 3032
3032 entry = bp->rcv_xmt_reg.index.rcv_comp; 3033 entry = bp->rcv_xmt_reg.index.rcv_comp;
@@ -3035,6 +3036,11 @@ static void dfx_rcv_queue_process(
3035#else 3036#else
3036 p_buff = bp->p_rcv_buff_va[entry]; 3037 p_buff = bp->p_rcv_buff_va[entry];
3037#endif 3038#endif
3039 dma_addr = bp->descr_block_virt->rcv_data[entry].long_1;
3040 dma_sync_single_for_cpu(bp->bus_dev,
3041 dma_addr + RCV_BUFF_K_DESCR,
3042 sizeof(u32),
3043 DMA_FROM_DEVICE);
3038 memcpy(&descr, p_buff + RCV_BUFF_K_DESCR, sizeof(u32)); 3044 memcpy(&descr, p_buff + RCV_BUFF_K_DESCR, sizeof(u32));
3039 3045
3040 if (descr & PI_FMC_DESCR_M_RCC_FLUSH) 3046 if (descr & PI_FMC_DESCR_M_RCC_FLUSH)
@@ -3082,7 +3088,7 @@ static void dfx_rcv_queue_process(
3082 3088
3083 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry]; 3089 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
3084 dma_unmap_single(bp->bus_dev, 3090 dma_unmap_single(bp->bus_dev,
3085 bp->descr_block_virt->rcv_data[entry].long_1, 3091 dma_addr,
3086 PI_RCV_DATA_K_SIZE_MAX, 3092 PI_RCV_DATA_K_SIZE_MAX,
3087 DMA_FROM_DEVICE); 3093 DMA_FROM_DEVICE);
3088 skb_reserve(skb, RCV_BUFF_K_PADDING); 3094 skb_reserve(skb, RCV_BUFF_K_PADDING);
@@ -3108,6 +3114,12 @@ static void dfx_rcv_queue_process(
3108#endif 3114#endif
3109 { 3115 {
3110 /* Receive buffer allocated, pass receive packet up */ 3116 /* Receive buffer allocated, pass receive packet up */
3117 dma_sync_single_for_cpu(
3118 bp->bus_dev,
3119 dma_addr +
3120 RCV_BUFF_K_PADDING,
3121 pkt_len + 3,
3122 DMA_FROM_DEVICE);
3111 3123
3112 skb_copy_to_linear_data(skb, 3124 skb_copy_to_linear_data(skb,
3113 p_buff + RCV_BUFF_K_PADDING, 3125 p_buff + RCV_BUFF_K_PADDING,