diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2009-04-05 17:03:09 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-04-22 16:54:41 -0400 |
commit | 87cbfd06889256cac945b37c7f62f4ce7f44b34a (patch) | |
tree | 28d07f98916908d2c436dc144b31d2fe267c72cb | |
parent | 6a362bb1c9f900f7e6daeee52ff2d538badae49b (diff) |
p54spi: get rid of busy-wait loops
p54spi_wakeup and p54spi_tx_frame used busy-waiting loop
to poll for 'ready' bits in SPI_ADRS_HOST_INTERRUPTS register.
With this change in place 'WR_READY timeout' messages do not
show anymore.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Christian Lamparter <chunkeey@web.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/p54/p54spi.c | 41 |
1 files changed, 14 insertions, 27 deletions
diff --git a/drivers/net/wireless/p54/p54spi.c b/drivers/net/wireless/p54/p54spi.c index 52023127cf37..59a5e778bb08 100644 --- a/drivers/net/wireless/p54/p54spi.c +++ b/drivers/net/wireless/p54/p54spi.c | |||
@@ -167,14 +167,13 @@ static const struct p54spi_spi_reg p54spi_registers_array[] = | |||
167 | static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits) | 167 | static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits) |
168 | { | 168 | { |
169 | int i; | 169 | int i; |
170 | __le32 buffer; | ||
171 | 170 | ||
172 | for (i = 0; i < 2000; i++) { | 171 | for (i = 0; i < 2000; i++) { |
173 | p54spi_spi_read(priv, reg, &buffer, sizeof(buffer)); | 172 | __le32 buffer = p54spi_read32(priv, reg); |
174 | if ((buffer & bits) == bits) | 173 | if ((buffer & bits) == bits) |
175 | return 1; | 174 | return 1; |
176 | 175 | ||
177 | msleep(1); | 176 | msleep(0); |
178 | } | 177 | } |
179 | return 0; | 178 | return 0; |
180 | } | 179 | } |
@@ -185,10 +184,10 @@ static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base, | |||
185 | p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL, | 184 | p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL, |
186 | cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE)); | 185 | cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE)); |
187 | 186 | ||
188 | if (p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, | 187 | if (!p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL, |
189 | cpu_to_le32(HOST_ALLOWED)) == 0) { | 188 | cpu_to_le32(HOST_ALLOWED))) { |
190 | dev_err(&priv->spi->dev, "spi_write_dma not allowed " | 189 | dev_err(&priv->spi->dev, "spi_write_dma not allowed " |
191 | "to DMA write."); | 190 | "to DMA write.\n"); |
192 | return -EAGAIN; | 191 | return -EAGAIN; |
193 | } | 192 | } |
194 | 193 | ||
@@ -330,21 +329,15 @@ static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val) | |||
330 | 329 | ||
331 | static void p54spi_wakeup(struct p54s_priv *priv) | 330 | static void p54spi_wakeup(struct p54s_priv *priv) |
332 | { | 331 | { |
333 | unsigned long timeout; | ||
334 | u32 ints; | ||
335 | |||
336 | /* wake the chip */ | 332 | /* wake the chip */ |
337 | p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS, | 333 | p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS, |
338 | cpu_to_le32(SPI_TARGET_INT_WAKEUP)); | 334 | cpu_to_le32(SPI_TARGET_INT_WAKEUP)); |
339 | 335 | ||
340 | /* And wait for the READY interrupt */ | 336 | /* And wait for the READY interrupt */ |
341 | timeout = jiffies + HZ; | 337 | if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS, |
342 | 338 | cpu_to_le32(SPI_HOST_INT_READY))) { | |
343 | ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS); | 339 | dev_err(&priv->spi->dev, "INT_READY timeout\n"); |
344 | while (!(ints & SPI_HOST_INT_READY)) { | 340 | goto out; |
345 | if (time_after(jiffies, timeout)) | ||
346 | goto out; | ||
347 | ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS); | ||
348 | } | 341 | } |
349 | 342 | ||
350 | p54spi_int_ack(priv, SPI_HOST_INT_READY); | 343 | p54spi_int_ack(priv, SPI_HOST_INT_READY); |
@@ -432,9 +425,7 @@ static irqreturn_t p54spi_interrupt(int irq, void *config) | |||
432 | static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb) | 425 | static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb) |
433 | { | 426 | { |
434 | struct p54_hdr *hdr = (struct p54_hdr *) skb->data; | 427 | struct p54_hdr *hdr = (struct p54_hdr *) skb->data; |
435 | unsigned long timeout; | ||
436 | int ret = 0; | 428 | int ret = 0; |
437 | u32 ints; | ||
438 | 429 | ||
439 | p54spi_wakeup(priv); | 430 | p54spi_wakeup(priv); |
440 | 431 | ||
@@ -442,15 +433,11 @@ static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb) | |||
442 | if (ret < 0) | 433 | if (ret < 0) |
443 | goto out; | 434 | goto out; |
444 | 435 | ||
445 | timeout = jiffies + 2 * HZ; | 436 | if (!p54spi_wait_bit(priv, SPI_ADRS_HOST_INTERRUPTS, |
446 | ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS); | 437 | cpu_to_le32(SPI_HOST_INT_WR_READY))) { |
447 | while (!(ints & SPI_HOST_INT_WR_READY)) { | 438 | dev_err(&priv->spi->dev, "WR_READY timeout\n"); |
448 | if (time_after(jiffies, timeout)) { | 439 | ret = -1; |
449 | dev_err(&priv->spi->dev, "WR_READY timeout\n"); | 440 | goto out; |
450 | ret = -1; | ||
451 | goto out; | ||
452 | } | ||
453 | ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS); | ||
454 | } | 441 | } |
455 | 442 | ||
456 | p54spi_int_ack(priv, SPI_HOST_INT_WR_READY); | 443 | p54spi_int_ack(priv, SPI_HOST_INT_WR_READY); |