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authorXiubo Li <Li.Xiubo@freescale.com>2014-02-11 02:42:48 -0500
committerMark Brown <broonie@linaro.org>2014-02-12 10:31:45 -0500
commit86f28d76435b619bd0bc5f6fde2803a5bc27ca24 (patch)
treeaf128fa11e486bc5c4124435ae9735745851e2b7
parent38dbfb59d1175ef458d006556061adeaa8751b72 (diff)
ASoC: fsl-spdif: big-endian support
For most platforms, the CPU and SPDIF device is in the same endianess mode. While for the LS1 platform, the CPU is in LE mode and the SPDIF is in BE mode. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/sound/fsl,spdif.txt5
-rw-r--r--sound/soc/fsl/fsl_spdif.c5
2 files changed, 9 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/sound/fsl,spdif.txt b/Documentation/devicetree/bindings/sound/fsl,spdif.txt
index f2ae335670f5..3e9e82c8eab3 100644
--- a/Documentation/devicetree/bindings/sound/fsl,spdif.txt
+++ b/Documentation/devicetree/bindings/sound/fsl,spdif.txt
@@ -29,6 +29,10 @@ Required properties:
29 can also be referred to TxClk_Source 29 can also be referred to TxClk_Source
30 bit of register SPDIF_STC. 30 bit of register SPDIF_STC.
31 31
32 - big-endian : If this property is absent, the native endian mode will
33 be in use as default, or the big endian mode will be in use for all the
34 device registers.
35
32Example: 36Example:
33 37
34spdif: spdif@02004000 { 38spdif: spdif@02004000 {
@@ -50,5 +54,6 @@ spdif: spdif@02004000 {
50 "rxtx5", "rxtx6", 54 "rxtx5", "rxtx6",
51 "rxtx7"; 55 "rxtx7";
52 56
57 big-endian;
53 status = "okay"; 58 status = "okay";
54}; 59};
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 4d075f1abe78..73ceb2f9b90d 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -985,7 +985,7 @@ static bool fsl_spdif_writeable_reg(struct device *dev, unsigned int reg)
985 } 985 }
986} 986}
987 987
988static const struct regmap_config fsl_spdif_regmap_config = { 988static struct regmap_config fsl_spdif_regmap_config = {
989 .reg_bits = 32, 989 .reg_bits = 32,
990 .reg_stride = 4, 990 .reg_stride = 4,
991 .val_bits = 32, 991 .val_bits = 32,
@@ -1105,6 +1105,9 @@ static int fsl_spdif_probe(struct platform_device *pdev)
1105 memcpy(&spdif_priv->cpu_dai_drv, &fsl_spdif_dai, sizeof(fsl_spdif_dai)); 1105 memcpy(&spdif_priv->cpu_dai_drv, &fsl_spdif_dai, sizeof(fsl_spdif_dai));
1106 spdif_priv->cpu_dai_drv.name = spdif_priv->name; 1106 spdif_priv->cpu_dai_drv.name = spdif_priv->name;
1107 1107
1108 if (of_property_read_bool(np, "big-endian"))
1109 fsl_spdif_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG;
1110
1108 /* Get the addresses and IRQ */ 1111 /* Get the addresses and IRQ */
1109 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1112 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1110 regs = devm_ioremap_resource(&pdev->dev, res); 1113 regs = devm_ioremap_resource(&pdev->dev, res);