diff options
author | Sripathy, Vishwanath <vishwanath.bs@ti.com> | 2009-11-16 06:11:40 -0500 |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-01-20 21:16:04 -0500 |
commit | 8640425b265752a1b7bae041815872cda5b72a2f (patch) | |
tree | aa6af91b64e06ec460857267a4ae77da1f7c2d4e | |
parent | a087cad92c0d83f096024d6ec8c8a8f6b6286811 (diff) |
OMAP3: PM: Removing redundant and potentially dangerous PRCM configration
As part of Core domain context restoration while coming out of off mode
there are some registers being restored which are not required to be restored.
ROM code will have restored them already. Overwriting some of them can have
potential side effect. Eg: CM_CLKEN_PLL register should not be written while dpll is locked.
Tested on OMAP 3430 SDP for suspend/resume and off mode with sleep_while_idle enabled.
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r-- | arch/arm/mach-omap2/prcm.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 3ea8177ffb25..cf466ea1dffc 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c | |||
@@ -44,7 +44,6 @@ struct omap3_prcm_regs { | |||
44 | u32 iva2_cm_clksel2; | 44 | u32 iva2_cm_clksel2; |
45 | u32 cm_sysconfig; | 45 | u32 cm_sysconfig; |
46 | u32 sgx_cm_clksel; | 46 | u32 sgx_cm_clksel; |
47 | u32 wkup_cm_clksel; | ||
48 | u32 dss_cm_clksel; | 47 | u32 dss_cm_clksel; |
49 | u32 cam_cm_clksel; | 48 | u32 cam_cm_clksel; |
50 | u32 per_cm_clksel; | 49 | u32 per_cm_clksel; |
@@ -53,7 +52,6 @@ struct omap3_prcm_regs { | |||
53 | u32 pll_cm_autoidle2; | 52 | u32 pll_cm_autoidle2; |
54 | u32 pll_cm_clksel4; | 53 | u32 pll_cm_clksel4; |
55 | u32 pll_cm_clksel5; | 54 | u32 pll_cm_clksel5; |
56 | u32 pll_cm_clken; | ||
57 | u32 pll_cm_clken2; | 55 | u32 pll_cm_clken2; |
58 | u32 cm_polctrl; | 56 | u32 cm_polctrl; |
59 | u32 iva2_cm_fclken; | 57 | u32 iva2_cm_fclken; |
@@ -77,7 +75,6 @@ struct omap3_prcm_regs { | |||
77 | u32 usbhost_cm_iclken; | 75 | u32 usbhost_cm_iclken; |
78 | u32 iva2_cm_autiidle2; | 76 | u32 iva2_cm_autiidle2; |
79 | u32 mpu_cm_autoidle2; | 77 | u32 mpu_cm_autoidle2; |
80 | u32 pll_cm_autoidle; | ||
81 | u32 iva2_cm_clkstctrl; | 78 | u32 iva2_cm_clkstctrl; |
82 | u32 mpu_cm_clkstctrl; | 79 | u32 mpu_cm_clkstctrl; |
83 | u32 core_cm_clkstctrl; | 80 | u32 core_cm_clkstctrl; |
@@ -274,7 +271,6 @@ void omap3_prcm_save_context(void) | |||
274 | prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG); | 271 | prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG); |
275 | prcm_context.sgx_cm_clksel = | 272 | prcm_context.sgx_cm_clksel = |
276 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); | 273 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); |
277 | prcm_context.wkup_cm_clksel = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); | ||
278 | prcm_context.dss_cm_clksel = | 274 | prcm_context.dss_cm_clksel = |
279 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL); | 275 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL); |
280 | prcm_context.cam_cm_clksel = | 276 | prcm_context.cam_cm_clksel = |
@@ -291,8 +287,6 @@ void omap3_prcm_save_context(void) | |||
291 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4); | 287 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4); |
292 | prcm_context.pll_cm_clksel5 = | 288 | prcm_context.pll_cm_clksel5 = |
293 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5); | 289 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5); |
294 | prcm_context.pll_cm_clken = | ||
295 | cm_read_mod_reg(PLL_MOD, CM_CLKEN); | ||
296 | prcm_context.pll_cm_clken2 = | 290 | prcm_context.pll_cm_clken2 = |
297 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2); | 291 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2); |
298 | prcm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL); | 292 | prcm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL); |
@@ -338,8 +332,6 @@ void omap3_prcm_save_context(void) | |||
338 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2); | 332 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2); |
339 | prcm_context.mpu_cm_autoidle2 = | 333 | prcm_context.mpu_cm_autoidle2 = |
340 | cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); | 334 | cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); |
341 | prcm_context.pll_cm_autoidle = | ||
342 | cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); | ||
343 | prcm_context.iva2_cm_clkstctrl = | 335 | prcm_context.iva2_cm_clkstctrl = |
344 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL); | 336 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL); |
345 | prcm_context.mpu_cm_clkstctrl = | 337 | prcm_context.mpu_cm_clkstctrl = |
@@ -431,7 +423,6 @@ void omap3_prcm_restore_context(void) | |||
431 | __raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG); | 423 | __raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG); |
432 | cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, | 424 | cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, |
433 | CM_CLKSEL); | 425 | CM_CLKSEL); |
434 | cm_write_mod_reg(prcm_context.wkup_cm_clksel, WKUP_MOD, CM_CLKSEL); | ||
435 | cm_write_mod_reg(prcm_context.dss_cm_clksel, OMAP3430_DSS_MOD, | 426 | cm_write_mod_reg(prcm_context.dss_cm_clksel, OMAP3430_DSS_MOD, |
436 | CM_CLKSEL); | 427 | CM_CLKSEL); |
437 | cm_write_mod_reg(prcm_context.cam_cm_clksel, OMAP3430_CAM_MOD, | 428 | cm_write_mod_reg(prcm_context.cam_cm_clksel, OMAP3430_CAM_MOD, |
@@ -448,7 +439,6 @@ void omap3_prcm_restore_context(void) | |||
448 | OMAP3430ES2_CM_CLKSEL4); | 439 | OMAP3430ES2_CM_CLKSEL4); |
449 | cm_write_mod_reg(prcm_context.pll_cm_clksel5, PLL_MOD, | 440 | cm_write_mod_reg(prcm_context.pll_cm_clksel5, PLL_MOD, |
450 | OMAP3430ES2_CM_CLKSEL5); | 441 | OMAP3430ES2_CM_CLKSEL5); |
451 | cm_write_mod_reg(prcm_context.pll_cm_clken, PLL_MOD, CM_CLKEN); | ||
452 | cm_write_mod_reg(prcm_context.pll_cm_clken2, PLL_MOD, | 442 | cm_write_mod_reg(prcm_context.pll_cm_clken2, PLL_MOD, |
453 | OMAP3430ES2_CM_CLKEN2); | 443 | OMAP3430ES2_CM_CLKEN2); |
454 | __raw_writel(prcm_context.cm_polctrl, OMAP3430_CM_POLCTRL); | 444 | __raw_writel(prcm_context.cm_polctrl, OMAP3430_CM_POLCTRL); |
@@ -487,7 +477,6 @@ void omap3_prcm_restore_context(void) | |||
487 | cm_write_mod_reg(prcm_context.iva2_cm_autiidle2, OMAP3430_IVA2_MOD, | 477 | cm_write_mod_reg(prcm_context.iva2_cm_autiidle2, OMAP3430_IVA2_MOD, |
488 | CM_AUTOIDLE2); | 478 | CM_AUTOIDLE2); |
489 | cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2); | 479 | cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2); |
490 | cm_write_mod_reg(prcm_context.pll_cm_autoidle, PLL_MOD, CM_AUTOIDLE); | ||
491 | cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, | 480 | cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, |
492 | CM_CLKSTCTRL); | 481 | CM_CLKSTCTRL); |
493 | cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL); | 482 | cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL); |