supports eg20t ptp clock

Supports EG20T ptp clock in the driver

Changes e-mail address.

Adds number.

Signed-off-by: Takahiro Shimizu <tshimizu818@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

3 files changed, 744 insertions, 0 deletions

diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig
index 68d720102296..cd9bc3b129bc 100644
--- a/drivers/ptp/Kconfig
+++ b/drivers/ptp/Kconfig
@@ -72,4 +72,17 @@ config DP83640_PHY
           In order for this to work, your MAC driver must also
           implement the skb_tx_timetamp() function.
 
+config PTP_1588_CLOCK_PCH
+        tristate "Intel PCH EG20T as PTP clock"
+        depends on PTP_1588_CLOCK
+        depends on PCH_GBE
+        help
+          This driver adds support for using the PCH EG20T as a PTP
+          clock. This clock is only useful if your PTP programs are
+          getting hardware time stamps on the PTP Ethernet packets
+          using the SO_TIMESTAMPING API.
+
+          To compile this driver as a module, choose M here: the module
+          will be called ptp_pch.
+
 endmenu
diff --git a/drivers/ptp/Makefile b/drivers/ptp/Makefile
index f6933e83de72..8b58597298de 100644
--- a/drivers/ptp/Makefile
+++ b/drivers/ptp/Makefile
@@ -5,3 +5,4 @@
 ptp-y                                   := ptp_clock.o ptp_chardev.o ptp_sysfs.o
 obj-$(CONFIG_PTP_1588_CLOCK)            += ptp.o
 obj-$(CONFIG_PTP_1588_CLOCK_IXP46X)     += ptp_ixp46x.o
+obj-$(CONFIG_PTP_1588_CLOCK_PCH)        += ptp_pch.o
diff --git a/drivers/ptp/ptp_pch.c b/drivers/ptp/ptp_pch.c
new file mode 100644
index 000000000000..0b38ee1b0f85
--- /dev/null
+++ b/drivers/ptp/ptp_pch.c
@@ -0,0 +1,730 @@
+/*
+ * PTP 1588 clock using the EG20T PCH
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ * Copyright (C) 2011-2012 LAPIS SEMICONDUCTOR Co., LTD.
+ *
+ * This code was derived from the IXP46X driver.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307, USA.
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/ptp_clock_kernel.h>
+
+#define STATION_ADDR_LEN        20
+#define PCI_DEVICE_ID_PCH_1588  0x8819
+#define IO_MEM_BAR 1
+
+#define DEFAULT_ADDEND 0xA0000000
+#define TICKS_NS_SHIFT  5
+#define N_EXT_TS        2
+
+enum pch_status {
+        PCH_SUCCESS,
+        PCH_INVALIDPARAM,
+        PCH_NOTIMESTAMP,
+        PCH_INTERRUPTMODEINUSE,
+        PCH_FAILED,
+        PCH_UNSUPPORTED,
+};
+/**
+ * struct pch_ts_regs - IEEE 1588 registers
+ */
+struct pch_ts_regs {
+        u32 control;
+        u32 event;
+        u32 addend;
+        u32 accum;
+        u32 test;
+        u32 ts_compare;
+        u32 rsystime_lo;
+        u32 rsystime_hi;
+        u32 systime_lo;
+        u32 systime_hi;
+        u32 trgt_lo;
+        u32 trgt_hi;
+        u32 asms_lo;
+        u32 asms_hi;
+        u32 amms_lo;
+        u32 amms_hi;
+        u32 ch_control;
+        u32 ch_event;
+        u32 tx_snap_lo;
+        u32 tx_snap_hi;
+        u32 rx_snap_lo;
+        u32 rx_snap_hi;
+        u32 src_uuid_lo;
+        u32 src_uuid_hi;
+        u32 can_status;
+        u32 can_snap_lo;
+        u32 can_snap_hi;
+        u32 ts_sel;
+        u32 ts_st[6];
+        u32 reserve1[14];
+        u32 stl_max_set_en;
+        u32 stl_max_set;
+        u32 reserve2[13];
+        u32 srst;
+};
+
+#define PCH_TSC_RESET           (1 << 0)
+#define PCH_TSC_TTM_MASK        (1 << 1)
+#define PCH_TSC_ASMS_MASK       (1 << 2)
+#define PCH_TSC_AMMS_MASK       (1 << 3)
+#define PCH_TSC_PPSM_MASK       (1 << 4)
+#define PCH_TSE_TTIPEND         (1 << 1)
+#define PCH_TSE_SNS             (1 << 2)
+#define PCH_TSE_SNM             (1 << 3)
+#define PCH_TSE_PPS             (1 << 4)
+#define PCH_CC_MM               (1 << 0)
+#define PCH_CC_TA               (1 << 1)
+
+#define PCH_CC_MODE_SHIFT       16
+#define PCH_CC_MODE_MASK        0x001F0000
+#define PCH_CC_VERSION          (1 << 31)
+#define PCH_CE_TXS              (1 << 0)
+#define PCH_CE_RXS              (1 << 1)
+#define PCH_CE_OVR              (1 << 0)
+#define PCH_CE_VAL              (1 << 1)
+#define PCH_ECS_ETH             (1 << 0)
+
+#define PCH_ECS_CAN             (1 << 1)
+#define PCH_STATION_BYTES       6
+
+#define PCH_IEEE1588_ETH        (1 << 0)
+#define PCH_IEEE1588_CAN        (1 << 1)
+/**
+ * struct pch_dev - Driver private data
+ */
+struct pch_dev {
+        struct pch_ts_regs *regs;
+        struct ptp_clock *ptp_clock;
+        struct ptp_clock_info caps;
+        int exts0_enabled;
+        int exts1_enabled;
+
+        u32 mem_base;
+        u32 mem_size;
+        u32 irq;
+        struct pci_dev *pdev;
+        spinlock_t register_lock;
+};
+
+/**
+ * struct pch_params - 1588 module parameter
+ */
+struct pch_params {
+        u8 station[STATION_ADDR_LEN];
+};
+
+/* structure to hold the module parameters */
+static struct pch_params pch_param = {
+        "00:00:00:00:00:00"
+};
+
+/*
+ * Register access functions
+ */
+static inline void pch_eth_enable_set(struct pch_dev *chip)
+{
+        u32 val;
+        /* SET the eth_enable bit */
+        val = ioread32(&chip->regs->ts_sel) | (PCH_ECS_ETH);
+        iowrite32(val, (&chip->regs->ts_sel));
+}
+
+static u64 pch_systime_read(struct pch_ts_regs *regs)
+{
+        u64 ns;
+        u32 lo, hi;
+
+        lo = ioread32(&regs->systime_lo);
+        hi = ioread32(&regs->systime_hi);
+
+        ns = ((u64) hi) << 32;
+        ns |= lo;
+        ns <<= TICKS_NS_SHIFT;
+
+        return ns;
+}
+
+static void pch_systime_write(struct pch_ts_regs *regs, u64 ns)
+{
+        u32 hi, lo;
+