diff options
author | Jie Yang <yang.jie@intel.com> | 2014-07-14 05:11:12 -0400 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-07-14 14:12:09 -0400 |
commit | 85e63007bbef7abc7145c807ed59d01738e09d39 (patch) | |
tree | d2ce8df4604a5b0e61f9a9bb35894ebc6401be0e | |
parent | 548793232fd29cfa1553bb45247aa5963632405c (diff) |
ASoC: Intel: Start with all memory banks disabled
All required banks are enabled during boot procedure.
Signed-off-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | sound/soc/intel/sst-haswell-dsp.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/sound/soc/intel/sst-haswell-dsp.c b/sound/soc/intel/sst-haswell-dsp.c index 40bb0205d5c0..977e29779d11 100644 --- a/sound/soc/intel/sst-haswell-dsp.c +++ b/sound/soc/intel/sst-haswell-dsp.c | |||
@@ -505,8 +505,9 @@ static int hsw_init(struct sst_dsp *sst, struct sst_pdata *pdata) | |||
505 | } | 505 | } |
506 | } | 506 | } |
507 | 507 | ||
508 | /* set default power gating mask */ | 508 | /* set default power gating control, enable power gating control for all blocks. that is, |
509 | writel(0x0, sst->addr.pci_cfg + SST_VDRTCTL0); | 509 | can't be accessed, please enable each block before accessing. */ |
510 | writel(0xffffffff, sst->addr.pci_cfg + SST_VDRTCTL0); | ||
510 | 511 | ||
511 | return 0; | 512 | return 0; |
512 | } | 513 | } |