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authorRobin Gong <b38343@freescale.com>2015-02-14 21:00:35 -0500
committerVinod Koul <vinod.koul@intel.com>2015-03-16 06:25:22 -0400
commit855832e47c1e51db701786ed76f8a9fec323aad6 (patch)
treeb76442f46ff0273290a19e9f095a5eee7bb861ba
parentbdf6c79278b3fb6caf1811ae877078c5f424bcb1 (diff)
dmaengine: imx-sdma: switch to dynamic context mode after script loaded
Below comments got from Page4724 of Reference Manual of i.mx6q: http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf --"Static context mode should be used for the first channel called after reset to ensure that the all context RAM for that channel is initialized during the context SAVE phase when the channel is done or yields. Subsequent calls to the same channel or different channels may use any of the dynamic context modes. This will ensure that all context locations for the bootload channel are initialized, and prevent undefined values in context RAM from being loaded during the context restore if the channel is re-started later" Unfortunately, the rule was broken by commit(5b28aa319bba96987316425a1131813d87cbab35) .This patch just take them back. Signed-off-by: Robin Gong <b38343@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r--drivers/dma/imx-sdma.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 18c0a131e4e4..66a0efb9651d 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -531,6 +531,10 @@ static int sdma_run_channel0(struct sdma_engine *sdma)
531 dev_err(sdma->dev, "Timeout waiting for CH0 ready\n"); 531 dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
532 } 532 }
533 533
534 /* Set bits of CONFIG register with dynamic context switching */
535 if (readl(sdma->regs + SDMA_H_CONFIG) == 0)
536 writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
537
534 return ret ? 0 : -ETIMEDOUT; 538 return ret ? 0 : -ETIMEDOUT;
535} 539}
536 540
@@ -1394,9 +1398,6 @@ static int sdma_init(struct sdma_engine *sdma)
1394 1398
1395 writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); 1399 writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
1396 1400
1397 /* Set bits of CONFIG register with given context switching mode */
1398 writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
1399
1400 /* Initializes channel's priorities */ 1401 /* Initializes channel's priorities */
1401 sdma_set_channel_priority(&sdma->channel[0], 7); 1402 sdma_set_channel_priority(&sdma->channel[0], 7);
1402 1403