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authorKevin Hilman <khilman@linaro.org>2013-12-20 10:25:39 -0500
committerKevin Hilman <khilman@linaro.org>2013-12-20 10:25:46 -0500
commit84dac16a3b7428e21583d631f82270abb274ffcc (patch)
treee0dcacde9faae8bada13dc5a91a3ce4605b7bc60
parent939ac3cd0635d426845d51a4262fd054a3fa4907 (diff)
parent732079567da4942b7b4929deff8f236926d0b3eb (diff)
Merge tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
Keystone DTS updates for 3.14 - ddr3 pll clock node typo fixup. - EVM specific clock setting with board k2hk-evm.dts. - GIC node updates for missing virtualisation info. - Adding USB dwc3 and phy nodes. * tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone: Add usb devicetree bindings ARM: dts: keystone: Add usb phy devicetree bindings ARM: dts: keystone: Add guestos maintenance interrupt ARM: dts: keystone: Add the GICV and GICH address space ARM: keystone: dts: add paclk divider clock node ARM: keystone: dts: fix typo in the ddr3 pllclk node name ARM: keystone: dts: add a k2hk-evm specific dts file Signed-off-by: Kevin Hilman <khilman@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/usb/keystone-phy.txt20
-rw-r--r--Documentation/devicetree/bindings/usb/keystone-usb.txt42
-rw-r--r--arch/arm/boot/dts/k2hk-evm.dts63
-rw-r--r--arch/arm/boot/dts/keystone-clocks.dtsi36
-rw-r--r--arch/arm/boot/dts/keystone.dtsi (renamed from arch/arm/boot/dts/keystone.dts)35
5 files changed, 174 insertions, 22 deletions
diff --git a/Documentation/devicetree/bindings/usb/keystone-phy.txt b/Documentation/devicetree/bindings/usb/keystone-phy.txt
new file mode 100644
index 000000000000..f37b3a86341d
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-phy.txt
@@ -0,0 +1,20 @@
1TI Keystone USB PHY
2
3Required properties:
4 - compatible: should be "ti,keystone-usbphy".
5 - #address-cells, #size-cells : should be '1' if the device has sub-nodes
6 with 'reg' property.
7 - reg : Address and length of the usb phy control register set.
8
9The main purpose of this PHY driver is to enable the USB PHY reference clock
10gate on the Keystone SOC for both the USB2 and USB3 PHY. Otherwise it is just
11an NOP PHY driver. Hence this node is referenced as both the usb2 and usb3
12phy node in the USB Glue layer driver node.
13
14usb_phy: usb_phy@2620738 {
15 compatible = "ti,keystone-usbphy";
16 #address-cells = <1>;
17 #size-cells = <1>;
18 reg = <0x2620738 32>;
19 status = "disabled";
20};
diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt b/Documentation/devicetree/bindings/usb/keystone-usb.txt
new file mode 100644
index 000000000000..60527d335b58
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
@@ -0,0 +1,42 @@
1TI Keystone Soc USB Controller
2
3DWC3 GLUE
4
5Required properties:
6 - compatible: should be "ti,keystone-dwc3".
7 - #address-cells, #size-cells : should be '1' if the device has sub-nodes
8 with 'reg' property.
9 - reg : Address and length of the register set for the USB subsystem on
10 the SOC.
11 - interrupts : The irq number of this device that is used to interrupt the
12 MPU.
13 - ranges: allows valid 1:1 translation between child's address space and
14 parent's address space.
15 - clocks: Clock IDs array as required by the controller.
16 - clock-names: names of clocks correseponding to IDs in the clock property.
17
18Sub-nodes:
19The dwc3 core should be added as subnode to Keystone DWC3 glue.
20- dwc3 :
21 The binding details of dwc3 can be found in:
22 Documentation/devicetree/bindings/usb/dwc3.txt
23
24Example:
25 usb: usb@2680000 {
26 compatible = "ti,keystone-dwc3";
27 #address-cells = <1>;
28 #size-cells = <1>;
29 reg = <0x2680000 0x10000>;
30 clocks = <&clkusb>;
31 clock-names = "usb";
32 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
33 ranges;
34 status = "disabled";
35
36 dwc3@2690000 {
37 compatible = "synopsys,dwc3";
38 reg = <0x2690000 0x70000>;
39 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
40 usb-phy = <&usb_phy>, <&usb_phy>;
41 };
42 };
diff --git a/arch/arm/boot/dts/k2hk-evm.dts b/arch/arm/boot/dts/k2hk-evm.dts
new file mode 100644
index 000000000000..eaefdfef65c3
--- /dev/null
+++ b/arch/arm/boot/dts/k2hk-evm.dts
@@ -0,0 +1,63 @@
1/*
2 * Copyright 2013 Texas Instruments, Inc.
3 *
4 * Keystone 2 Kepler/Hawking EVM device tree
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10/dts-v1/;
11
12#include "keystone.dtsi"
13
14/ {
15 compatible = "ti,keystone-evm";
16
17 soc {
18 clock {
19 refclksys: refclksys {
20 #clock-cells = <0>;
21 compatible = "fixed-clock";
22 clock-frequency = <122880000>;
23 clock-output-names = "refclk-sys";
24 };
25
26 refclkpass: refclkpass {
27 #clock-cells = <0>;
28 compatible = "fixed-clock";
29 clock-frequency = <122880000>;
30 clock-output-names = "refclk-pass";
31 };
32
33 refclkarm: refclkarm {
34 #clock-cells = <0>;
35 compatible = "fixed-clock";
36 clock-frequency = <125000000>;
37 clock-output-names = "refclk-arm";
38 };
39
40 refclkddr3a: refclkddr3a {
41 #clock-cells = <0>;
42 compatible = "fixed-clock";
43 clock-frequency = <100000000>;
44 clock-output-names = "refclk-ddr3a";
45 };
46
47 refclkddr3b: refclkddr3b {
48 #clock-cells = <0>;
49 compatible = "fixed-clock";
50 clock-frequency = <100000000>;
51 clock-output-names = "refclk-ddr3b";
52 };
53 };
54 };
55};
56
57&usb_phy {
58 status = "okay";
59};
60
61&usb {
62 status = "okay";
63};
diff --git a/arch/arm/boot/dts/keystone-clocks.dtsi b/arch/arm/boot/dts/keystone-clocks.dtsi
index d6713b113258..2363593e1050 100644
--- a/arch/arm/boot/dts/keystone-clocks.dtsi
+++ b/arch/arm/boot/dts/keystone-clocks.dtsi
@@ -13,17 +13,10 @@ clocks {
13 #size-cells = <1>; 13 #size-cells = <1>;
14 ranges; 14 ranges;
15 15
16 refclkmain: refclkmain {
17 #clock-cells = <0>;
18 compatible = "fixed-clock";
19 clock-frequency = <122880000>;
20 clock-output-names = "refclk-main";
21 };
22
23 mainpllclk: mainpllclk@2310110 { 16 mainpllclk: mainpllclk@2310110 {
24 #clock-cells = <0>; 17 #clock-cells = <0>;
25 compatible = "ti,keystone,main-pll-clock"; 18 compatible = "ti,keystone,main-pll-clock";
26 clocks = <&refclkmain>; 19 clocks = <&refclksys>;
27 reg = <0x02620350 4>, <0x02310110 4>; 20 reg = <0x02620350 4>, <0x02310110 4>;
28 reg-names = "control", "multiplier"; 21 reg-names = "control", "multiplier";
29 fixed-postdiv = <2>; 22 fixed-postdiv = <2>;
@@ -32,47 +25,43 @@ clocks {
32 papllclk: papllclk@2620358 { 25 papllclk: papllclk@2620358 {
33 #clock-cells = <0>; 26 #clock-cells = <0>;
34 compatible = "ti,keystone,pll-clock"; 27 compatible = "ti,keystone,pll-clock";
35 clocks = <&refclkmain>; 28 clocks = <&refclkpass>;
36 clock-output-names = "pa-pll-clk"; 29 clock-output-names = "pa-pll-clk";
37 reg = <0x02620358 4>; 30 reg = <0x02620358 4>;
38 reg-names = "control"; 31 reg-names = "control";
39 fixed-postdiv = <6>;
40 }; 32 };
41 33
42 ddr3allclk: ddr3apllclk@2620360 { 34 ddr3apllclk: ddr3apllclk@2620360 {
43 #clock-cells = <0>; 35 #clock-cells = <0>;
44 compatible = "ti,keystone,pll-clock"; 36 compatible = "ti,keystone,pll-clock";
45 clocks = <&refclkmain>; 37 clocks = <&refclkddr3a>;
46 clock-output-names = "ddr-3a-pll-clk"; 38 clock-output-names = "ddr-3a-pll-clk";
47 reg = <0x02620360 4>; 39 reg = <0x02620360 4>;
48 reg-names = "control"; 40 reg-names = "control";
49 fixed-postdiv = <6>;
50 }; 41 };
51 42
52 ddr3bllclk: ddr3bpllclk@2620368 { 43 ddr3bpllclk: ddr3bpllclk@2620368 {
53 #clock-cells = <0>; 44 #clock-cells = <0>;
54 compatible = "ti,keystone,pll-clock"; 45 compatible = "ti,keystone,pll-clock";
55 clocks = <&refclkmain>; 46 clocks = <&refclkddr3b>;
56 clock-output-names = "ddr-3b-pll-clk"; 47 clock-output-names = "ddr-3b-pll-clk";
57 reg = <0x02620368 4>; 48 reg = <0x02620368 4>;
58 reg-names = "control"; 49 reg-names = "control";
59 fixed-postdiv = <6>;
60 }; 50 };
61 51
62 armpllclk: armpllclk@2620370 { 52 armpllclk: armpllclk@2620370 {
63 #clock-cells = <0>; 53 #clock-cells = <0>;
64 compatible = "ti,keystone,pll-clock"; 54 compatible = "ti,keystone,pll-clock";
65 clocks = <&refclkmain>; 55 clocks = <&refclkarm>;
66 clock-output-names = "arm-pll-clk"; 56 clock-output-names = "arm-pll-clk";
67 reg = <0x02620370 4>; 57 reg = <0x02620370 4>;
68 reg-names = "control"; 58 reg-names = "control";
69 fixed-postdiv = <6>;
70 }; 59 };
71 60
72 mainmuxclk: mainmuxclk@2310108 { 61 mainmuxclk: mainmuxclk@2310108 {
73 #clock-cells = <0>; 62 #clock-cells = <0>;
74 compatible = "ti,keystone,pll-mux-clock"; 63 compatible = "ti,keystone,pll-mux-clock";
75 clocks = <&mainpllclk>, <&refclkmain>; 64 clocks = <&mainpllclk>, <&refclksys>;
76 reg = <0x02310108 4>; 65 reg = <0x02310108 4>;
77 bit-shift = <23>; 66 bit-shift = <23>;
78 bit-mask = <1>; 67 bit-mask = <1>;
@@ -135,6 +124,15 @@ clocks {
135 clock-output-names = "chipclk13"; 124 clock-output-names = "chipclk13";
136 }; 125 };
137 126
127 paclk13: paclk13 {
128 #clock-cells = <0>;
129 compatible = "fixed-factor-clock";
130 clocks = <&papllclk>;
131 clock-div = <3>;
132 clock-mult = <1>;
133 clock-output-names = "paclk13";
134 };
135
138 chipclk14: chipclk14 { 136 chipclk14: chipclk14 {
139 #clock-cells = <0>; 137 #clock-cells = <0>;
140 compatible = "fixed-factor-clock"; 138 compatible = "fixed-factor-clock";
diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dtsi
index 100bdf52b847..b4202907a27b 100644
--- a/arch/arm/boot/dts/keystone.dts
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -6,14 +6,12 @@
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 */ 7 */
8 8
9/dts-v1/;
10#include <dt-bindings/interrupt-controller/arm-gic.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h>
11 10
12#include "skeleton.dtsi" 11#include "skeleton.dtsi"
13 12
14/ { 13/ {
15 model = "Texas Instruments Keystone 2 SoC"; 14 model = "Texas Instruments Keystone 2 SoC";
16 compatible = "ti,keystone-evm";
17 #address-cells = <2>; 15 #address-cells = <2>;
18 #size-cells = <2>; 16 #size-cells = <2>;
19 interrupt-parent = <&gic>; 17 interrupt-parent = <&gic>;
@@ -64,7 +62,11 @@
64 #address-cells = <1>; 62 #address-cells = <1>;
65 interrupt-controller; 63 interrupt-controller;
66 reg = <0x0 0x02561000 0x0 0x1000>, 64 reg = <0x0 0x02561000 0x0 0x1000>,
67 <0x0 0x02562000 0x0 0x2000>; 65 <0x0 0x02562000 0x0 0x2000>,
66 <0x0 0x02564000 0x0 0x1000>,
67 <0x0 0x02566000 0x0 0x2000>;
68 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
69 IRQ_TYPE_LEVEL_HIGH)>;
68 }; 70 };
69 71
70 timer { 72 timer {
@@ -179,5 +181,32 @@
179 interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; 181 interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
180 clocks = <&clkspi>; 182 clocks = <&clkspi>;
181 }; 183 };
184
185 usb_phy: usb_phy@2620738 {
186 compatible = "ti,keystone-usbphy";
187 #address-cells = <1>;
188 #size-cells = <1>;
189 reg = <0x2620738 32>;
190 status = "disabled";
191 };
192
193 usb: usb@2680000 {
194 compatible = "ti,keystone-dwc3";
195 #address-cells = <1>;
196 #size-cells = <1>;
197 reg = <0x2680000 0x10000>;
198 clocks = <&clkusb>;
199 clock-names = "usb";
200 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
201 ranges;
202 status = "disabled";
203
204 dwc3@2690000 {
205 compatible = "synopsys,dwc3";
206 reg = <0x2690000 0x70000>;
207 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
208 usb-phy = <&usb_phy>, <&usb_phy>;
209 };
210 };
182 }; 211 };
183}; 212};