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authorHauke Mehrtens <hauke@hauke-m.de>2010-02-20 13:51:20 -0500
committerRalf Baechle <ralf@linux-mips.org>2010-02-22 15:42:12 -0500
commit84a6fcb368a080620d12fc4d79e07902dbee7335 (patch)
treefc842c252eed342e5457b407dc78627ffaa7eb71
parent52ab320ac560af3333191a473e56615fb48fff95 (diff)
MIPS: BCM47xx: Fix 128MB RAM support
Ignoring the last page when ddr size is 128M. Cached accesses to last page is causing the processor to prefetch using address above 128M stepping out of the DDR address space. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/981/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/bcm47xx/prom.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
index c51405e57921..29d3cbf9555f 100644
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -141,6 +141,14 @@ static __init void prom_init_mem(void)
141 break; 141 break;
142 } 142 }
143 143
144 /* Ignoring the last page when ddr size is 128M. Cached
145 * accesses to last page is causing the processor to prefetch
146 * using address above 128M stepping out of the ddr address
147 * space.
148 */
149 if (mem == 0x8000000)
150 mem -= 0x1000;
151
144 add_memory_region(0, mem, BOOT_MEM_RAM); 152 add_memory_region(0, mem, BOOT_MEM_RAM);
145} 153}
146 154