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authorTero Kristo <t-kristo@ti.com>2014-10-27 11:39:25 -0400
committerTony Lindgren <tony@atomide.com>2014-10-27 11:39:25 -0400
commit840b7eb8342a64ad6fc6a2140262c3fed3676bd4 (patch)
tree9444929b8739b9ad6f5f7f05ea1591f67243a94f
parent88f9474f18b4f235b7e9a91d76810fd616fe611a (diff)
ARM: AM33xx: PRM: move global warm reset implementation to driver
Moved the implementation from am33xx-restart.c to the prm33xx.c file to isolate the PRM register accesses to be private for PRM driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/mach-omap2/am33xx-restart.c9
-rw-r--r--arch/arm/mach-omap2/prm33xx.c21
2 files changed, 22 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c
index c88d8df753c2..728638913cd1 100644
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -24,12 +24,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
24{ 24{
25 /* TODO: Handle mode and cmd if necessary */ 25 /* TODO: Handle mode and cmd if necessary */
26 26
27 am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK, 27 am33xx_prm_global_warm_sw_reset();
28 AM33XX_RST_GLOBAL_WARM_SW_MASK,
29 AM33XX_PRM_DEVICE_MOD,
30 AM33XX_PRM_RSTCTRL_OFFSET);
31
32 /* OCP barrier */
33 (void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
34 AM33XX_PRM_RSTCTRL_OFFSET);
35} 28}
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 3cbfb78ed5e9..03960bc9b419 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -23,6 +23,10 @@
23#include "prm33xx.h" 23#include "prm33xx.h"
24#include "prm-regbits-33xx.h" 24#include "prm-regbits-33xx.h"
25 25
26#define AM33XX_PRM_RSTCTRL_OFFSET 0x0000
27
28#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0)
29
26/* Read a register in a PRM instance */ 30/* Read a register in a PRM instance */
27u32 am33xx_prm_read_reg(s16 inst, u16 idx) 31u32 am33xx_prm_read_reg(s16 inst, u16 idx)
28{ 32{
@@ -332,6 +336,23 @@ static int am33xx_check_vcvp(void)
332 return 0; 336 return 0;
333} 337}
334 338
339/**
340 * am33xx_prm_global_warm_sw_reset - reboot the device via warm reset
341 *
342 * Immediately reboots the device through warm reset.
343 */
344void am33xx_prm_global_warm_sw_reset(void)
345{
346 am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
347 AM33XX_RST_GLOBAL_WARM_SW_MASK,
348 AM33XX_PRM_DEVICE_MOD,
349 AM33XX_PRM_RSTCTRL_OFFSET);
350
351 /* OCP barrier */
352 (void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
353 AM33XX_PRM_RSTCTRL_OFFSET);
354}
355
335struct pwrdm_ops am33xx_pwrdm_operations = { 356struct pwrdm_ops am33xx_pwrdm_operations = {
336 .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst, 357 .pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst,
337 .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst, 358 .pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst,