diff options
| author | Xenia Ragiadakou <burzalodowa@gmail.com> | 2013-06-18 21:58:06 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-06-19 12:41:40 -0400 |
| commit | 83e6d9e262aa02488b68a8fdc2f05264e28354f3 (patch) | |
| tree | 526640e691a2a378ce198634615549d503cc6709 | |
| parent | c4b5eb8c012499a13e9ec9dcb7331e7040e8d472 (diff) | |
staging: rtl8192u: fix spaces around ',' in r819xU_phy.c
This patch fixes the whitespace around ',' to meet the
linux kernel coding style.
Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/staging/rtl8192u/r819xU_phy.c | 62 |
1 files changed, 31 insertions, 31 deletions
diff --git a/drivers/staging/rtl8192u/r819xU_phy.c b/drivers/staging/rtl8192u/r819xU_phy.c index 07a178d50f02..9bfcd2f451f7 100644 --- a/drivers/staging/rtl8192u/r819xU_phy.c +++ b/drivers/staging/rtl8192u/r819xU_phy.c | |||
| @@ -510,12 +510,12 @@ void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType) | |||
| 510 | if (ConfigType == BaseBand_Config_PHY_REG) { | 510 | if (ConfigType == BaseBand_Config_PHY_REG) { |
| 511 | for (i = 0; i < PHY_REG_1T2RArrayLength; i += 2) { | 511 | for (i = 0; i < PHY_REG_1T2RArrayLength; i += 2) { |
| 512 | rtl8192_setBBreg(dev, rtl819XPHY_REG_1T2RArray[i], bMaskDWord, rtl819XPHY_REG_1T2RArray[i+1]); | 512 | rtl8192_setBBreg(dev, rtl819XPHY_REG_1T2RArray[i], bMaskDWord, rtl819XPHY_REG_1T2RArray[i+1]); |
| 513 | RT_TRACE(COMP_DBG, "i: %x, The Rtl819xUsbPHY_REGArray[0] is %x Rtl819xUsbPHY_REGArray[1] is %x \n",i, rtl819XPHY_REG_1T2RArray[i], rtl819XPHY_REG_1T2RArray[i+1]); | 513 | RT_TRACE(COMP_DBG, "i: %x, The Rtl819xUsbPHY_REGArray[0] is %x Rtl819xUsbPHY_REGArray[1] is %x \n", i, rtl819XPHY_REG_1T2RArray[i], rtl819XPHY_REG_1T2RArray[i+1]); |
| 514 | } | 514 | } |
| 515 | } else if (ConfigType == BaseBand_Config_AGC_TAB) { | 515 | } else if (ConfigType == BaseBand_Config_AGC_TAB) { |
| 516 | for (i = 0; i < AGCTAB_ArrayLength; i += 2) { | 516 | for (i = 0; i < AGCTAB_ArrayLength; i += 2) { |
| 517 | rtl8192_setBBreg(dev, rtl819XAGCTAB_Array[i], bMaskDWord, rtl819XAGCTAB_Array[i+1]); | 517 | rtl8192_setBBreg(dev, rtl819XAGCTAB_Array[i], bMaskDWord, rtl819XAGCTAB_Array[i+1]); |
| 518 | RT_TRACE(COMP_DBG, "i:%x, The rtl819XAGCTAB_Array[0] is %x rtl819XAGCTAB_Array[1] is %x \n",i, rtl819XAGCTAB_Array[i], rtl819XAGCTAB_Array[i+1]); | 518 | RT_TRACE(COMP_DBG, "i:%x, The rtl819XAGCTAB_Array[0] is %x rtl819XAGCTAB_Array[1] is %x \n", i, rtl819XAGCTAB_Array[i], rtl819XAGCTAB_Array[i+1]); |
| 519 | } | 519 | } |
| 520 | } | 520 | } |
| 521 | return; | 521 | return; |
| @@ -722,7 +722,7 @@ void rtl8192_BB_Config_ParaFile(struct net_device *dev) | |||
| 722 | 722 | ||
| 723 | /*--set BB Global Reset--*/ | 723 | /*--set BB Global Reset--*/ |
| 724 | read_nic_byte(dev, BB_GLOBAL_RESET, ®_u8); | 724 | read_nic_byte(dev, BB_GLOBAL_RESET, ®_u8); |
| 725 | write_nic_byte(dev, BB_GLOBAL_RESET,(reg_u8|BB_GLOBAL_RESET_BIT)); | 725 | write_nic_byte(dev, BB_GLOBAL_RESET, (reg_u8|BB_GLOBAL_RESET_BIT)); |
| 726 | mdelay(50); | 726 | mdelay(50); |
| 727 | /*---set BB reset Active---*/ | 727 | /*---set BB reset Active---*/ |
| 728 | read_nic_dword(dev, CPU_GEN, ®_u32); | 728 | read_nic_dword(dev, CPU_GEN, ®_u32); |
| @@ -1071,7 +1071,7 @@ bool rtl8192_SetRFPowerState(struct net_device *dev, | |||
| 1071 | //If Rf off reason is from IPS, Led should blink with no link, by Maddest 071015 | 1071 | //If Rf off reason is from IPS, Led should blink with no link, by Maddest 071015 |
| 1072 | // | 1072 | // |
| 1073 | if (pMgntInfo->RfOffReason == RF_CHANGE_BY_IPS) | 1073 | if (pMgntInfo->RfOffReason == RF_CHANGE_BY_IPS) |
| 1074 | Adapter->HalFunc.LedControlHandler(Adapter,LED_CTL_NO_LINK); | 1074 | Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_NO_LINK); |
| 1075 | else | 1075 | else |
| 1076 | // Turn off LED if RF is not ON. | 1076 | // Turn off LED if RF is not ON. |
| 1077 | Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_OFF); | 1077 | Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_OFF); |
| @@ -1250,7 +1250,7 @@ u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8 *stage, | |||
| 1250 | switch (CurrentCmd->CmdID) { | 1250 | switch (CurrentCmd->CmdID) { |
| 1251 | case CmdID_SetTxPowerLevel: | 1251 | case CmdID_SetTxPowerLevel: |
| 1252 | if (priv->card_8192_version == (u8)VERSION_819xU_A) //xiong: consider it later! | 1252 | if (priv->card_8192_version == (u8)VERSION_819xU_A) //xiong: consider it later! |
| 1253 | rtl8192_SetTxPowerLevel(dev,channel); | 1253 | rtl8192_SetTxPowerLevel(dev, channel); |
| 1254 | break; | 1254 | break; |
| 1255 | case CmdID_WritePortUlong: | 1255 | case CmdID_WritePortUlong: |
| 1256 | write_nic_dword(dev, CurrentCmd->Para1, CurrentCmd->Para2); | 1256 | write_nic_dword(dev, CurrentCmd->Para1, CurrentCmd->Para2); |
| @@ -1291,7 +1291,7 @@ void rtl8192_phy_FinishSwChnlNow(struct net_device *dev, u8 channel) | |||
| 1291 | struct r8192_priv *priv = ieee80211_priv(dev); | 1291 | struct r8192_priv *priv = ieee80211_priv(dev); |
| 1292 | u32 delay = 0; | 1292 | u32 delay = 0; |
| 1293 | 1293 | ||
| 1294 | while (!rtl8192_phy_SwChnlStepByStep(dev,channel,&priv->SwChnlStage,&priv->SwChnlStep,&delay)) { | 1294 | while (!rtl8192_phy_SwChnlStepByStep(dev, channel, &priv->SwChnlStage, &priv->SwChnlStep, &delay)) { |
| 1295 | if (!priv->up) | 1295 | if (!priv->up) |
| 1296 | break; | 1296 | break; |
| 1297 | } | 1297 | } |
| @@ -1311,7 +1311,7 @@ void rtl8192_SwChnl_WorkItem(struct net_device *dev) | |||
| 1311 | RT_TRACE(COMP_CH, "==> SwChnlCallback819xUsbWorkItem(), chan:%d\n", priv->chan); | 1311 | RT_TRACE(COMP_CH, "==> SwChnlCallback819xUsbWorkItem(), chan:%d\n", priv->chan); |
| 1312 | 1312 | ||
| 1313 | 1313 | ||
| 1314 | rtl8192_phy_FinishSwChnlNow(dev , priv->chan); | 1314 | rtl8192_phy_FinishSwChnlNow(dev, priv->chan); |
| 1315 | 1315 | ||
| 1316 | RT_TRACE(COMP_CH, "<== SwChnlCallback819xUsbWorkItem()\n"); | 1316 | RT_TRACE(COMP_CH, "<== SwChnlCallback819xUsbWorkItem()\n"); |
| 1317 | } | 1317 | } |
| @@ -1417,7 +1417,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) | |||
| 1417 | break; | 1417 | break; |
| 1418 | 1418 | ||
| 1419 | default: | 1419 | default: |
| 1420 | RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n",priv->CurrentChannelBW); | 1420 | RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n", priv->CurrentChannelBW); |
| 1421 | break; | 1421 | break; |
| 1422 | } | 1422 | } |
| 1423 | 1423 | ||
| @@ -1441,12 +1441,12 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) | |||
| 1441 | 1441 | ||
| 1442 | if (priv->chan == 14 && !priv->bcck_in_ch14) { | 1442 | if (priv->chan == 14 && !priv->bcck_in_ch14) { |
| 1443 | priv->bcck_in_ch14 = TRUE; | 1443 | priv->bcck_in_ch14 = TRUE; |
| 1444 | dm_cck_txpower_adjust(dev,priv->bcck_in_ch14); | 1444 | dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); |
| 1445 | } else if (priv->chan != 14 && priv->bcck_in_ch14) { | 1445 | } else if (priv->chan != 14 && priv->bcck_in_ch14) { |
| 1446 | priv->bcck_in_ch14 = FALSE; | 1446 | priv->bcck_in_ch14 = FALSE; |
| 1447 | dm_cck_txpower_adjust(dev,priv->bcck_in_ch14); | 1447 | dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); |
| 1448 | } else { | 1448 | } else { |
| 1449 | dm_cck_txpower_adjust(dev,priv->bcck_in_ch14); | 1449 | dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); |
| 1450 | } | 1450 | } |
| 1451 | 1451 | ||
| 1452 | break; | 1452 | break; |
| @@ -1468,17 +1468,17 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) | |||
| 1468 | RT_TRACE(COMP_INIT, "40M, pHalData->CCKPresentAttentuation = %d\n", priv->cck_present_attentuation); | 1468 | RT_TRACE(COMP_INIT, "40M, pHalData->CCKPresentAttentuation = %d\n", priv->cck_present_attentuation); |
| 1469 | if (priv->chan == 14 && !priv->bcck_in_ch14) { | 1469 | if (priv->chan == 14 && !priv->bcck_in_ch14) { |
| 1470 | priv->bcck_in_ch14 = true; | 1470 | priv->bcck_in_ch14 = true; |
| 1471 | dm_cck_txpower_adjust(dev,priv->bcck_in_ch14); | 1471 | dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); |
| 1472 | } else if (priv->chan != 14 && priv->bcck_in_ch14) { | 1472 | } else if (priv->chan != 14 && priv->bcck_in_ch14) { |
| 1473 | priv->bcck_in_ch14 = false; | 1473 | priv->bcck_in_ch14 = false; |
| 1474 | dm_cck_txpower_adjust(dev,priv->bcck_in_ch14); | 1474 | dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); |
| 1475 | } else { | 1475 | } else { |
| 1476 | dm_cck_txpower_adjust(dev,priv->bcck_in_ch14); | 1476 | dm_cck_txpower_adjust(dev, priv->bcck_in_ch14); |
| 1477 | } | 1477 | } |
| 1478 | 1478 | ||
| 1479 | break; | 1479 | break; |
| 1480 | default: | 1480 | default: |
| 1481 | RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n" ,priv->CurrentChannelBW); | 1481 | RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n", priv->CurrentChannelBW); |
| 1482 | break; | 1482 | break; |
| 1483 | 1483 | ||
| 1484 | } | 1484 | } |
| @@ -1552,13 +1552,13 @@ void InitialGain819xUsb(struct net_device *dev, u8 Operation) | |||
| 1552 | priv->InitialGainOperateType = Operation; | 1552 | priv->InitialGainOperateType = Operation; |
| 1553 | 1553 | ||
| 1554 | if (priv->up) | 1554 | if (priv->up) |
| 1555 | queue_delayed_work(priv->priv_wq,&priv->initialgain_operate_wq,0); | 1555 | queue_delayed_work(priv->priv_wq, &priv->initialgain_operate_wq, 0); |
| 1556 | } | 1556 | } |
| 1557 | 1557 | ||
| 1558 | extern void InitialGainOperateWorkItemCallBack(struct work_struct *work) | 1558 | extern void InitialGainOperateWorkItemCallBack(struct work_struct *work) |
| 1559 | { | 1559 | { |
| 1560 | struct delayed_work *dwork = container_of(work,struct delayed_work,work); | 1560 | struct delayed_work *dwork = container_of(work, struct delayed_work, work); |
| 1561 | struct r8192_priv *priv = container_of(dwork,struct r8192_priv,initialgain_operate_wq); | 1561 | struct r8192_priv *priv = container_of(dwork, struct r8192_priv, initialgain_operate_wq); |
| 1562 | struct net_device *dev = priv->ieee80211->dev; | 1562 | struct net_device *dev = priv->ieee80211->dev; |
| 1563 | #define SCAN_RX_INITIAL_GAIN 0x17 | 1563 | #define SCAN_RX_INITIAL_GAIN 0x17 |
| 1564 | #define POWER_DETECTION_TH 0x08 | 1564 | #define POWER_DETECTION_TH 0x08 |
| @@ -1582,11 +1582,11 @@ extern void InitialGainOperateWorkItemCallBack(struct work_struct *work) | |||
| 1582 | bitmask = bMaskByte2; | 1582 | bitmask = bMaskByte2; |
| 1583 | priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bitmask); | 1583 | priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bitmask); |
| 1584 | 1584 | ||
| 1585 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc50 is %x\n",priv->initgain_backup.xaagccore1); | 1585 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc50 is %x\n", priv->initgain_backup.xaagccore1); |
| 1586 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc58 is %x\n",priv->initgain_backup.xbagccore1); | 1586 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc58 is %x\n", priv->initgain_backup.xbagccore1); |
| 1587 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc60 is %x\n",priv->initgain_backup.xcagccore1); | 1587 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc60 is %x\n", priv->initgain_backup.xcagccore1); |
| 1588 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc68 is %x\n",priv->initgain_backup.xdagccore1); | 1588 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc68 is %x\n", priv->initgain_backup.xdagccore1); |
| 1589 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xa0a is %x\n",priv->initgain_backup.cca); | 1589 | RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xa0a is %x\n", priv->initgain_backup.cca); |
| 1590 | 1590 | ||
| 1591 | RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x \n", initial_gain); | 1591 | RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x \n", initial_gain); |
| 1592 | write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain); | 1592 | write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain); |
| @@ -1609,19 +1609,19 @@ extern void InitialGainOperateWorkItemCallBack(struct work_struct *work) | |||
| 1609 | bitmask = bMaskByte2; | 1609 | bitmask = bMaskByte2; |
| 1610 | rtl8192_setBBreg(dev, rCCK0_CCA, bitmask, (u32)priv->initgain_backup.cca); | 1610 | rtl8192_setBBreg(dev, rCCK0_CCA, bitmask, (u32)priv->initgain_backup.cca); |
| 1611 | 1611 | ||
| 1612 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc50 is %x\n",priv->initgain_backup.xaagccore1); | 1612 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc50 is %x\n", priv->initgain_backup.xaagccore1); |
| 1613 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc58 is %x\n",priv->initgain_backup.xbagccore1); | 1613 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc58 is %x\n", priv->initgain_backup.xbagccore1); |
| 1614 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc60 is %x\n",priv->initgain_backup.xcagccore1); | 1614 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc60 is %x\n", priv->initgain_backup.xcagccore1); |
| 1615 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc68 is %x\n",priv->initgain_backup.xdagccore1); | 1615 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc68 is %x\n", priv->initgain_backup.xdagccore1); |
| 1616 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xa0a is %x\n",priv->initgain_backup.cca); | 1616 | RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xa0a is %x\n", priv->initgain_backup.cca); |
| 1617 | 1617 | ||
| 1618 | #ifdef RTL8190P | 1618 | #ifdef RTL8190P |
| 1619 | SetTxPowerLevel8190(Adapter,priv->CurrentChannel); | 1619 | SetTxPowerLevel8190(Adapter, priv->CurrentChannel); |
| 1620 | #endif | 1620 | #endif |
| 1621 | #ifdef RTL8192E | 1621 | #ifdef RTL8192E |
| 1622 | SetTxPowerLevel8190(Adapter,priv->CurrentChannel); | 1622 | SetTxPowerLevel8190(Adapter, priv->CurrentChannel); |
| 1623 | #endif | 1623 | #endif |
| 1624 | rtl8192_phy_setTxPower(dev,priv->ieee80211->current_network.channel); | 1624 | rtl8192_phy_setTxPower(dev, priv->ieee80211->current_network.channel); |
| 1625 | 1625 | ||
| 1626 | if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM) | 1626 | if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM) |
| 1627 | rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // FW DIG ON | 1627 | rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // FW DIG ON |
