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authorMike Isely <isely@pobox.com>2008-05-26 04:51:57 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-07-20 06:06:57 -0400
commit83ce57aa45a59e25146a32ee9f68edb7eecacd2b (patch)
treefc44da305e6ece3b518a2271645de9f498b3504b
parent64723b301846636accbfb1539ebda0835f683a72 (diff)
V4L/DVB (7937): pvrusb2: Change several embedded timer constants to defined values
This is primarily a cosmetic change to make it easier to change some of the time constants used in the driver. Signed-off-by: Mike Isely <isely@pobox.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
-rw-r--r--drivers/media/video/pvrusb2/pvrusb2-hdw.c25
1 files changed, 22 insertions, 3 deletions
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw.c b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
index 0808d589f413..d4d57951cca2 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw.c
@@ -39,6 +39,21 @@
39#define TV_MIN_FREQ 55250000L 39#define TV_MIN_FREQ 55250000L
40#define TV_MAX_FREQ 850000000L 40#define TV_MAX_FREQ 850000000L
41 41
42/* This defines a minimum interval that the decoder must remain quiet
43 before we are allowed to start it running. */
44#define TIME_MSEC_DECODER_WAIT 50
45
46/* This defines a minimum interval that the encoder must remain quiet
47 before we are allowed to configure it. */
48#define TIME_MSEC_ENCODER_WAIT 50
49
50/* This defines the minimum interval that the encoder must successfully run
51 before we consider that the encoder has run at least once since its
52 firmware has been loaded. This measurement is in important for cases
53 where we can't do something until we know that the encoder has been run
54 at least once. */
55#define TIME_MSEC_ENCODER_OK 250
56
42static struct pvr2_hdw *unit_pointers[PVR_NUM] = {[ 0 ... PVR_NUM-1 ] = NULL}; 57static struct pvr2_hdw *unit_pointers[PVR_NUM] = {[ 0 ... PVR_NUM-1 ] = NULL};
43static DEFINE_MUTEX(pvr2_unit_mtx); 58static DEFINE_MUTEX(pvr2_unit_mtx);
44 59
@@ -3608,7 +3623,9 @@ static int state_eval_encoder_config(struct pvr2_hdw *hdw)
3608 the encoder. */ 3623 the encoder. */
3609 if (!hdw->state_encoder_waitok) { 3624 if (!hdw->state_encoder_waitok) {
3610 hdw->encoder_wait_timer.expires = 3625 hdw->encoder_wait_timer.expires =
3611 jiffies + (HZ*50/1000); 3626 jiffies +
3627 (HZ * TIME_MSEC_ENCODER_WAIT
3628 / 1000);
3612 add_timer(&hdw->encoder_wait_timer); 3629 add_timer(&hdw->encoder_wait_timer);
3613 } 3630 }
3614 } 3631 }
@@ -3732,7 +3749,7 @@ static int state_eval_encoder_run(struct pvr2_hdw *hdw)
3732 hdw->state_encoder_run = !0; 3749 hdw->state_encoder_run = !0;
3733 if (!hdw->state_encoder_runok) { 3750 if (!hdw->state_encoder_runok) {
3734 hdw->encoder_run_timer.expires = 3751 hdw->encoder_run_timer.expires =
3735 jiffies + (HZ*250/1000); 3752 jiffies + (HZ * TIME_MSEC_ENCODER_OK / 1000);
3736 add_timer(&hdw->encoder_run_timer); 3753 add_timer(&hdw->encoder_run_timer);
3737 } 3754 }
3738 } 3755 }
@@ -3807,7 +3824,9 @@ static int state_eval_decoder_run(struct pvr2_hdw *hdw)
3807 but before we did the pending check. */ 3824 but before we did the pending check. */
3808 if (!hdw->state_decoder_quiescent) { 3825 if (!hdw->state_decoder_quiescent) {
3809 hdw->quiescent_timer.expires = 3826 hdw->quiescent_timer.expires =
3810 jiffies + (HZ*50/1000); 3827 jiffies +
3828 (HZ * TIME_MSEC_DECODER_WAIT
3829 / 1000);
3811 add_timer(&hdw->quiescent_timer); 3830 add_timer(&hdw->quiescent_timer);
3812 } 3831 }
3813 } 3832 }