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authorSuman Anna <s-anna@ti.com>2013-04-17 19:23:15 -0400
committerBenoit Cousson <benoit.cousson@linaro.org>2013-06-03 08:55:30 -0400
commit8341613afbc8d65bca8c81158edfb49f36b7ad92 (patch)
tree0e47c3f537973ec9240270e2b8641f827878aae6
parent1e68f43b7dcf0e5eee10baeb3cbe4e1ca59db9fd (diff)
ARM: dts: OMAP5: Fix missing PWM capability to timer nodes
OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM. The PWM capability property is missing from the node definitions of couple of timers. Add ti,timer-pwm attribute for timer 5, 6, 8 and 11. Signed-off-by: Suman Anna <s-anna@ti.com> [benoit.cousson@linaro.org: Update changelog and subject to highlight the fix] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
-rw-r--r--arch/arm/boot/dts/omap5.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3dd7ff825828..635cae283011 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -538,6 +538,7 @@
538 interrupts = <0 41 0x4>; 538 interrupts = <0 41 0x4>;
539 ti,hwmods = "timer5"; 539 ti,hwmods = "timer5";
540 ti,timer-dsp; 540 ti,timer-dsp;
541 ti,timer-pwm;
541 }; 542 };
542 543
543 timer6: timer@4013a000 { 544 timer6: timer@4013a000 {
@@ -574,6 +575,7 @@
574 reg = <0x4803e000 0x80>; 575 reg = <0x4803e000 0x80>;
575 interrupts = <0 45 0x4>; 576 interrupts = <0 45 0x4>;
576 ti,hwmods = "timer9"; 577 ti,hwmods = "timer9";
578 ti,timer-pwm;
577 }; 579 };
578 580
579 timer10: timer@48086000 { 581 timer10: timer@48086000 {
@@ -581,6 +583,7 @@
581 reg = <0x48086000 0x80>; 583 reg = <0x48086000 0x80>;
582 interrupts = <0 46 0x4>; 584 interrupts = <0 46 0x4>;
583 ti,hwmods = "timer10"; 585 ti,hwmods = "timer10";
586 ti,timer-pwm;
584 }; 587 };
585 588
586 timer11: timer@48088000 { 589 timer11: timer@48088000 {