diff options
author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2014-05-16 08:17:11 -0400 |
---|---|---|
committer | Sekhar Nori <nsekhar@ti.com> | 2014-05-22 01:17:46 -0400 |
commit | 82ba61228467db9e8fe7d253cba0a5974e562974 (patch) | |
tree | 37888195550f1380fb4fca953b763b6406194af9 | |
parent | c3dd3389dbed93d5675205cc25ff7be67a738573 (diff) |
ARM: davinci: Remove eDMA3 queue_tc_mapping data from edma_soc_info
It is ignored by the edma driver since we are just setting back the default
mapping of TC -> Queue.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-rw-r--r-- | arch/arm/mach-davinci/devices-da8xx.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm355.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm365.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm644x.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 11 |
5 files changed, 0 insertions, 56 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 56ea41d5f849..7f376e54b266 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -134,13 +134,6 @@ struct platform_device da8xx_serial_device[] = { | |||
134 | } | 134 | } |
135 | }; | 135 | }; |
136 | 136 | ||
137 | static s8 da8xx_queue_tc_mapping[][2] = { | ||
138 | /* {event queue no, TC no} */ | ||
139 | {0, 0}, | ||
140 | {1, 1}, | ||
141 | {-1, -1} | ||
142 | }; | ||
143 | |||
144 | static s8 da8xx_queue_priority_mapping[][2] = { | 137 | static s8 da8xx_queue_priority_mapping[][2] = { |
145 | /* {event queue no, Priority} */ | 138 | /* {event queue no, Priority} */ |
146 | {0, 3}, | 139 | {0, 3}, |
@@ -148,12 +141,6 @@ static s8 da8xx_queue_priority_mapping[][2] = { | |||
148 | {-1, -1} | 141 | {-1, -1} |
149 | }; | 142 | }; |
150 | 143 | ||
151 | static s8 da850_queue_tc_mapping[][2] = { | ||
152 | /* {event queue no, TC no} */ | ||
153 | {0, 0}, | ||
154 | {-1, -1} | ||
155 | }; | ||
156 | |||
157 | static s8 da850_queue_priority_mapping[][2] = { | 144 | static s8 da850_queue_priority_mapping[][2] = { |
158 | /* {event queue no, Priority} */ | 145 | /* {event queue no, Priority} */ |
159 | {0, 3}, | 146 | {0, 3}, |
@@ -166,7 +153,6 @@ static struct edma_soc_info da830_edma_cc0_info = { | |||
166 | .n_slot = 128, | 153 | .n_slot = 128, |
167 | .n_tc = 2, | 154 | .n_tc = 2, |
168 | .n_cc = 1, | 155 | .n_cc = 1, |
169 | .queue_tc_mapping = da8xx_queue_tc_mapping, | ||
170 | .queue_priority_mapping = da8xx_queue_priority_mapping, | 156 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
171 | .default_queue = EVENTQ_1, | 157 | .default_queue = EVENTQ_1, |
172 | }; | 158 | }; |
@@ -182,7 +168,6 @@ static struct edma_soc_info da850_edma_cc_info[] = { | |||
182 | .n_slot = 128, | 168 | .n_slot = 128, |
183 | .n_tc = 2, | 169 | .n_tc = 2, |
184 | .n_cc = 1, | 170 | .n_cc = 1, |
185 | .queue_tc_mapping = da8xx_queue_tc_mapping, | ||
186 | .queue_priority_mapping = da8xx_queue_priority_mapping, | 171 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
187 | .default_queue = EVENTQ_1, | 172 | .default_queue = EVENTQ_1, |
188 | }, | 173 | }, |
@@ -192,7 +177,6 @@ static struct edma_soc_info da850_edma_cc_info[] = { | |||
192 | .n_slot = 128, | 177 | .n_slot = 128, |
193 | .n_tc = 1, | 178 | .n_tc = 1, |
194 | .n_cc = 1, | 179 | .n_cc = 1, |
195 | .queue_tc_mapping = da850_queue_tc_mapping, | ||
196 | .queue_priority_mapping = da850_queue_priority_mapping, | 180 | .queue_priority_mapping = da850_queue_priority_mapping, |
197 | .default_queue = EVENTQ_0, | 181 | .default_queue = EVENTQ_0, |
198 | }, | 182 | }, |
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 07381d8cea62..e27f7ff54570 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -569,14 +569,6 @@ static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { | |||
569 | /*----------------------------------------------------------------------*/ | 569 | /*----------------------------------------------------------------------*/ |
570 | 570 | ||
571 | static s8 | 571 | static s8 |
572 | queue_tc_mapping[][2] = { | ||
573 | /* {event queue no, TC no} */ | ||
574 | {0, 0}, | ||
575 | {1, 1}, | ||
576 | {-1, -1}, | ||
577 | }; | ||
578 | |||
579 | static s8 | ||
580 | queue_priority_mapping[][2] = { | 572 | queue_priority_mapping[][2] = { |
581 | /* {event queue no, Priority} */ | 573 | /* {event queue no, Priority} */ |
582 | {0, 3}, | 574 | {0, 3}, |
@@ -590,7 +582,6 @@ static struct edma_soc_info edma_cc0_info = { | |||
590 | .n_slot = 128, | 582 | .n_slot = 128, |
591 | .n_tc = 2, | 583 | .n_tc = 2, |
592 | .n_cc = 1, | 584 | .n_cc = 1, |
593 | .queue_tc_mapping = queue_tc_mapping, | ||
594 | .queue_priority_mapping = queue_priority_mapping, | 585 | .queue_priority_mapping = queue_priority_mapping, |
595 | .default_queue = EVENTQ_1, | 586 | .default_queue = EVENTQ_1, |
596 | }; | 587 | }; |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 08a61b938333..88835b0aaead 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -853,16 +853,6 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = { | |||
853 | 853 | ||
854 | /* Four Transfer Controllers on DM365 */ | 854 | /* Four Transfer Controllers on DM365 */ |
855 | static s8 | 855 | static s8 |
856 | dm365_queue_tc_mapping[][2] = { | ||
857 | /* {event queue no, TC no} */ | ||
858 | {0, 0}, | ||
859 | {1, 1}, | ||
860 | {2, 2}, | ||
861 | {3, 3}, | ||
862 | {-1, -1}, | ||
863 | }; | ||
864 | |||
865 | static s8 | ||
866 | dm365_queue_priority_mapping[][2] = { | 856 | dm365_queue_priority_mapping[][2] = { |
867 | /* {event queue no, Priority} */ | 857 | /* {event queue no, Priority} */ |
868 | {0, 7}, | 858 | {0, 7}, |
@@ -878,7 +868,6 @@ static struct edma_soc_info edma_cc0_info = { | |||
878 | .n_slot = 256, | 868 | .n_slot = 256, |
879 | .n_tc = 4, | 869 | .n_tc = 4, |
880 | .n_cc = 1, | 870 | .n_cc = 1, |
881 | .queue_tc_mapping = dm365_queue_tc_mapping, | ||
882 | .queue_priority_mapping = dm365_queue_priority_mapping, | 871 | .queue_priority_mapping = dm365_queue_priority_mapping, |
883 | .default_queue = EVENTQ_3, | 872 | .default_queue = EVENTQ_3, |
884 | }; | 873 | }; |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 5debffba4b24..8ea34be879b4 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -499,14 +499,6 @@ static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = { | |||
499 | /*----------------------------------------------------------------------*/ | 499 | /*----------------------------------------------------------------------*/ |
500 | 500 | ||
501 | static s8 | 501 | static s8 |
502 | queue_tc_mapping[][2] = { | ||
503 | /* {event queue no, TC no} */ | ||
504 | {0, 0}, | ||
505 | {1, 1}, | ||
506 | {-1, -1}, | ||
507 | }; | ||
508 | |||
509 | static s8 | ||
510 | queue_priority_mapping[][2] = { | 502 | queue_priority_mapping[][2] = { |
511 | /* {event queue no, Priority} */ | 503 | /* {event queue no, Priority} */ |
512 | {0, 3}, | 504 | {0, 3}, |
@@ -520,7 +512,6 @@ static struct edma_soc_info edma_cc0_info = { | |||
520 | .n_slot = 128, | 512 | .n_slot = 128, |
521 | .n_tc = 2, | 513 | .n_tc = 2, |
522 | .n_cc = 1, | 514 | .n_cc = 1, |
523 | .queue_tc_mapping = queue_tc_mapping, | ||
524 | .queue_priority_mapping = queue_priority_mapping, | 515 | .queue_priority_mapping = queue_priority_mapping, |
525 | .default_queue = EVENTQ_1, | 516 | .default_queue = EVENTQ_1, |
526 | }; | 517 | }; |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 332d00d24dc2..97e90dc5ed43 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -533,16 +533,6 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = { | |||
533 | 533 | ||
534 | /* Four Transfer Controllers on DM646x */ | 534 | /* Four Transfer Controllers on DM646x */ |
535 | static s8 | 535 | static s8 |
536 | dm646x_queue_tc_mapping[][2] = { | ||
537 | /* {event queue no, TC no} */ | ||
538 | {0, 0}, | ||
539 | {1, 1}, | ||
540 | {2, 2}, | ||
541 | {3, 3}, | ||
542 | {-1, -1}, | ||
543 | }; | ||
544 | |||
545 | static s8 | ||
546 | dm646x_queue_priority_mapping[][2] = { | 536 | dm646x_queue_priority_mapping[][2] = { |
547 | /* {event queue no, Priority} */ | 537 | /* {event queue no, Priority} */ |
548 | {0, 4}, | 538 | {0, 4}, |
@@ -558,7 +548,6 @@ static struct edma_soc_info edma_cc0_info = { | |||
558 | .n_slot = 512, | 548 | .n_slot = 512, |
559 | .n_tc = 4, | 549 | .n_tc = 4, |
560 | .n_cc = 1, | 550 | .n_cc = 1, |
561 | .queue_tc_mapping = dm646x_queue_tc_mapping, | ||
562 | .queue_priority_mapping = dm646x_queue_priority_mapping, | 551 | .queue_priority_mapping = dm646x_queue_priority_mapping, |
563 | .default_queue = EVENTQ_1, | 552 | .default_queue = EVENTQ_1, |
564 | }; | 553 | }; |