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authorBrian Gerst <brgerst@gmail.com>2010-09-03 21:17:14 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2010-09-09 17:17:06 -0400
commit820241356d6aa9a895fc10def15794a5a5bfcd98 (patch)
tree7e21bd74f6f8426a007b29386c285e9b7407e394
parent10c11f304986a1f84201c2261a428701f9d2dffc (diff)
x86-64, fpu: Simplify constraints for fxsave/fxtstor
Use the "R" constraint (legacy register) instead of listing all the possible registers. Clean up the comments as well. Signed-off-by: Brian Gerst <brgerst@gmail.com> Acked-by: Pekka Enberg <penberg@kernel.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> LKML-Reference: <1283563039-3466-8-git-send-email-brgerst@gmail.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
-rw-r--r--arch/x86/include/asm/i387.h44
1 files changed, 17 insertions, 27 deletions
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h
index 8b40a8379cc2..768fcb25900a 100644
--- a/arch/x86/include/asm/i387.h
+++ b/arch/x86/include/asm/i387.h
@@ -81,6 +81,7 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
81{ 81{
82 int err; 82 int err;
83 83
84 /* See comment in fxsave() below. */
84 asm volatile("1: rex64/fxrstor (%[fx])\n\t" 85 asm volatile("1: rex64/fxrstor (%[fx])\n\t"
85 "2:\n" 86 "2:\n"
86 ".section .fixup,\"ax\"\n" 87 ".section .fixup,\"ax\"\n"
@@ -89,11 +90,7 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
89 ".previous\n" 90 ".previous\n"
90 _ASM_EXTABLE(1b, 3b) 91 _ASM_EXTABLE(1b, 3b)
91 : [err] "=r" (err) 92 : [err] "=r" (err)
92#if 0 /* See comment in fxsave() below. */ 93 : [fx] "R" (fx), "m" (*fx), "0" (0));
93 : [fx] "r" (fx), "m" (*fx), "0" (0));
94#else
95 : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
96#endif
97 return err; 94 return err;
98} 95}
99 96
@@ -140,6 +137,7 @@ static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
140 if (unlikely(err)) 137 if (unlikely(err))
141 return -EFAULT; 138 return -EFAULT;
142 139
140 /* See comment in fxsave() below. */
143 asm volatile("1: rex64/fxsave (%[fx])\n\t" 141 asm volatile("1: rex64/fxsave (%[fx])\n\t"
144 "2:\n" 142 "2:\n"
145 ".section .fixup,\"ax\"\n" 143 ".section .fixup,\"ax\"\n"
@@ -148,11 +146,7 @@ static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
148 ".previous\n" 146 ".previous\n"
149 _ASM_EXTABLE(1b, 3b) 147 _ASM_EXTABLE(1b, 3b)
150 : [err] "=r" (err), "=m" (*fx) 148 : [err] "=r" (err), "=m" (*fx)
151#if 0 /* See comment in fxsave() below. */ 149 : [fx] "R" (fx), "0" (0));
152 : [fx] "r" (fx), "0" (0));
153#else
154 : [fx] "cdaSDb" (fx), "0" (0));
155#endif
156 if (unlikely(err) && 150 if (unlikely(err) &&
157 __clear_user(fx, sizeof(struct i387_fxsave_struct))) 151 __clear_user(fx, sizeof(struct i387_fxsave_struct)))
158 err = -EFAULT; 152 err = -EFAULT;
@@ -165,26 +159,22 @@ static inline void fpu_fxsave(struct fpu *fpu)
165 /* Using "rex64; fxsave %0" is broken because, if the memory operand 159 /* Using "rex64; fxsave %0" is broken because, if the memory operand
166 uses any extended registers for addressing, a second REX prefix 160 uses any extended registers for addressing, a second REX prefix
167 will be generated (to the assembler, rex64 followed by semicolon 161 will be generated (to the assembler, rex64 followed by semicolon
168 is a separate instruction), and hence the 64-bitness is lost. */ 162 is a separate instruction), and hence the 64-bitness is lost.
169#if 0 163 Using "fxsaveq %0" would be the ideal choice, but is only supported
170 /* Using "fxsaveq %0" would be the ideal choice, but is only supported 164 starting with gas 2.16.
171 starting with gas 2.16. */ 165 asm volatile("fxsaveq %0"
172 __asm__ __volatile__("fxsaveq %0" 166 : "=m" (fpu->state->fxsave));
173 : "=m" (fpu->state->fxsave)); 167 Using, as a workaround, the properly prefixed form below isn't
174#elif 0
175 /* Using, as a workaround, the properly prefixed form below isn't
176 accepted by any binutils version so far released, complaining that 168 accepted by any binutils version so far released, complaining that
177 the same type of prefix is used twice if an extended register is 169 the same type of prefix is used twice if an extended register is
178 needed for addressing (fix submitted to mainline 2005-11-21). */ 170 needed for addressing (fix submitted to mainline 2005-11-21).
179 __asm__ __volatile__("rex64/fxsave %0" 171 asm volatile("rex64/fxsave %0"
180 : "=m" (fpu->state->fxsave)); 172 : "=m" (fpu->state->fxsave));
181#else 173 This, however, we can work around by forcing the compiler to select
182 /* This, however, we can work around by forcing the compiler to select
183 an addressing mode that doesn't require extended registers. */ 174 an addressing mode that doesn't require extended registers. */
184 __asm__ __volatile__("rex64/fxsave (%1)" 175 asm volatile("rex64/fxsave (%[fx])"
185 : "=m" (fpu->state->fxsave) 176 : "=m" (fpu->state->fxsave)
186 : "cdaSDb" (&fpu->state->fxsave)); 177 : [fx] "R" (&fpu->state->fxsave));
187#endif
188} 178}
189 179
190static inline void fpu_save_init(struct fpu *fpu) 180static inline void fpu_save_init(struct fpu *fpu)