diff options
author | Philipp Zabel <p.zabel@pengutronix.de> | 2013-04-08 10:46:23 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-12 07:28:17 -0400 |
commit | 80f72d2d33263429ac6a50b84b2ec5fa681a5e84 (patch) | |
tree | 6d68dc45ab20805b7b6e461aeec4f959c0db5ace | |
parent | d24de4952314afbbcd51b1fb72e5a320d60379dc (diff) |
ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
Use imx_clk_mux_flags to set the appropriate flags for the TVE
selector clock. This is needed so tve_clk rate changes can propagate
up to pll4_sw.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r-- | arch/arm/mach-imx/clk-imx51-imx53.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index cac6a5fce9de..41dd4d6e5b91 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c | |||
@@ -362,8 +362,8 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, | |||
362 | mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel)); | 362 | mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel)); |
363 | clk[ipu_di1_sel] = imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3, | 363 | clk[ipu_di1_sel] = imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3, |
364 | mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel)); | 364 | mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel)); |
365 | clk[tve_ext_sel] = imx_clk_mux("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1, | 365 | clk[tve_ext_sel] = imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1, |
366 | mx51_tve_ext_sel, ARRAY_SIZE(mx51_tve_ext_sel)); | 366 | mx51_tve_ext_sel, ARRAY_SIZE(mx51_tve_ext_sel), CLK_SET_RATE_PARENT); |
367 | clk[tve_s] = imx_clk_mux("tve_sel", MXC_CCM_CSCMR1, 7, 1, | 367 | clk[tve_s] = imx_clk_mux("tve_sel", MXC_CCM_CSCMR1, 7, 1, |
368 | mx51_tve_sel, ARRAY_SIZE(mx51_tve_sel)); | 368 | mx51_tve_sel, ARRAY_SIZE(mx51_tve_sel)); |
369 | clk[tve_gate] = imx_clk_gate2("tve_gate", "tve_sel", MXC_CCM_CCGR2, 30); | 369 | clk[tve_gate] = imx_clk_gate2("tve_gate", "tve_sel", MXC_CCM_CCGR2, 30); |