diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-22 12:56:51 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-22 12:56:51 -0500 |
| commit | 7fa850ab4fc992717b3cc6284d3445c88978ca7e (patch) | |
| tree | 3d5bef4812e3881d602a437d9a266b2a79214bb5 | |
| parent | c874e6fc3596322b0248df3158dd9d5f43a958d0 (diff) | |
| parent | 0c403462d6822227ea37fb0293a3e9f511e6929f (diff) | |
Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King:
"Some small fixes for this merge window, most of them quite self
explanatory - the biggest thing here is a fix for the ARMv7 LPAE
suspend/resume support"
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7894/1: kconfig: select GENERIC_CLOCKEVENTS if HAVE_ARM_ARCH_TIMER
ARM: 7893/1: bitops: only emit .arch_extension mp if CONFIG_SMP
ARM: 7892/1: Fix warning for V7M builds
ARM: 7888/1: seccomp: not compatible with ARM OABI
ARM: 7886/1: make OABI default to off
ARM: 7885/1: Save/Restore 64-bit TTBR registers on LPAE suspend/resume
ARM: 7884/1: mm: Fix ECC mem policy printk
ARM: 7883/1: fix mov to mvn conversion in case of 64 bit phys_addr_t and BE
ARM: 7882/1: mm: fix __phys_to_virt to work with 64 bit phys_addr_t in BE case
ARM: 7881/1: __fixup_smp read of SCU config should do byteswap in BE case
ARM: Fix nommu.c build warning
| -rw-r--r-- | arch/arm/Kconfig | 11 | ||||
| -rw-r--r-- | arch/arm/include/asm/memory.h | 9 | ||||
| -rw-r--r-- | arch/arm/kernel/head.S | 7 | ||||
| -rw-r--r-- | arch/arm/kernel/traps.c | 2 | ||||
| -rw-r--r-- | arch/arm/lib/bitops.h | 2 | ||||
| -rw-r--r-- | arch/arm/mm/mmu.c | 4 | ||||
| -rw-r--r-- | arch/arm/mm/nommu.c | 1 | ||||
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 17 |
8 files changed, 39 insertions, 14 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 214b698cefea..c1f1a7eee953 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -25,7 +25,7 @@ config ARM | |||
| 25 | select HARDIRQS_SW_RESEND | 25 | select HARDIRQS_SW_RESEND |
| 26 | select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL | 26 | select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL |
| 27 | select HAVE_ARCH_KGDB | 27 | select HAVE_ARCH_KGDB |
| 28 | select HAVE_ARCH_SECCOMP_FILTER | 28 | select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) |
| 29 | select HAVE_ARCH_TRACEHOOK | 29 | select HAVE_ARCH_TRACEHOOK |
| 30 | select HAVE_BPF_JIT | 30 | select HAVE_BPF_JIT |
| 31 | select HAVE_CONTEXT_TRACKING | 31 | select HAVE_CONTEXT_TRACKING |
| @@ -1496,6 +1496,7 @@ config HAVE_ARM_ARCH_TIMER | |||
| 1496 | bool "Architected timer support" | 1496 | bool "Architected timer support" |
| 1497 | depends on CPU_V7 | 1497 | depends on CPU_V7 |
| 1498 | select ARM_ARCH_TIMER | 1498 | select ARM_ARCH_TIMER |
| 1499 | select GENERIC_CLOCKEVENTS | ||
| 1499 | help | 1500 | help |
| 1500 | This option enables support for the ARM architected timer | 1501 | This option enables support for the ARM architected timer |
| 1501 | 1502 | ||
| @@ -1719,7 +1720,6 @@ config AEABI | |||
| 1719 | config OABI_COMPAT | 1720 | config OABI_COMPAT |
| 1720 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" | 1721 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
| 1721 | depends on AEABI && !THUMB2_KERNEL | 1722 | depends on AEABI && !THUMB2_KERNEL |
| 1722 | default y | ||
| 1723 | help | 1723 | help |
| 1724 | This option preserves the old syscall interface along with the | 1724 | This option preserves the old syscall interface along with the |
| 1725 | new (ARM EABI) one. It also provides a compatibility layer to | 1725 | new (ARM EABI) one. It also provides a compatibility layer to |
| @@ -1727,11 +1727,16 @@ config OABI_COMPAT | |||
| 1727 | in memory differs between the legacy ABI and the new ARM EABI | 1727 | in memory differs between the legacy ABI and the new ARM EABI |
| 1728 | (only for non "thumb" binaries). This option adds a tiny | 1728 | (only for non "thumb" binaries). This option adds a tiny |
| 1729 | overhead to all syscalls and produces a slightly larger kernel. | 1729 | overhead to all syscalls and produces a slightly larger kernel. |
| 1730 | |||
| 1731 | The seccomp filter system will not be available when this is | ||
| 1732 | selected, since there is no way yet to sensibly distinguish | ||
| 1733 | between calling conventions during filtering. | ||
| 1734 | |||
| 1730 | If you know you'll be using only pure EABI user space then you | 1735 | If you know you'll be using only pure EABI user space then you |
| 1731 | can say N here. If this option is not selected and you attempt | 1736 | can say N here. If this option is not selected and you attempt |
| 1732 | to execute a legacy ABI binary then the result will be | 1737 | to execute a legacy ABI binary then the result will be |
| 1733 | UNPREDICTABLE (in fact it can be predicted that it won't work | 1738 | UNPREDICTABLE (in fact it can be predicted that it won't work |
| 1734 | at all). If in doubt say Y. | 1739 | at all). If in doubt say N. |
| 1735 | 1740 | ||
| 1736 | config ARCH_HAS_HOLES_MEMORYMODEL | 1741 | config ARCH_HAS_HOLES_MEMORYMODEL |
| 1737 | bool | 1742 | bool |
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 4dd21457ef9d..9ecccc865046 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h | |||
| @@ -226,7 +226,14 @@ static inline phys_addr_t __virt_to_phys(unsigned long x) | |||
| 226 | static inline unsigned long __phys_to_virt(phys_addr_t x) | 226 | static inline unsigned long __phys_to_virt(phys_addr_t x) |
| 227 | { | 227 | { |
| 228 | unsigned long t; | 228 | unsigned long t; |
| 229 | __pv_stub(x, t, "sub", __PV_BITS_31_24); | 229 | |
| 230 | /* | ||
| 231 | * 'unsigned long' cast discard upper word when | ||
| 232 | * phys_addr_t is 64 bit, and makes sure that inline | ||
| 233 | * assembler expression receives 32 bit argument | ||
| 234 | * in place where 'r' 32 bit operand is expected. | ||
| 235 | */ | ||
| 236 | __pv_stub((unsigned long) x, t, "sub", __PV_BITS_31_24); | ||
| 230 | return t; | 237 | return t; |
| 231 | } | 238 | } |
| 232 | 239 | ||
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 7801866e626a..11d59b32fb8d 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
| @@ -508,6 +508,7 @@ __fixup_smp: | |||
| 508 | teq r0, #0x0 @ '0' on actual UP A9 hardware | 508 | teq r0, #0x0 @ '0' on actual UP A9 hardware |
| 509 | beq __fixup_smp_on_up @ So its an A9 UP | 509 | beq __fixup_smp_on_up @ So its an A9 UP |
| 510 | ldr r0, [r0, #4] @ read SCU Config | 510 | ldr r0, [r0, #4] @ read SCU Config |
| 511 | ARM_BE8(rev r0, r0) @ byteswap if big endian | ||
| 511 | and r0, r0, #0x3 @ number of CPUs | 512 | and r0, r0, #0x3 @ number of CPUs |
| 512 | teq r0, #0x0 @ is 1? | 513 | teq r0, #0x0 @ is 1? |
| 513 | movne pc, lr | 514 | movne pc, lr |
| @@ -644,7 +645,11 @@ ARM_BE8(rev16 ip, ip) | |||
| 644 | bcc 1b | 645 | bcc 1b |
| 645 | bx lr | 646 | bx lr |
| 646 | #else | 647 | #else |
| 648 | #ifdef CONFIG_CPU_ENDIAN_BE8 | ||
| 649 | moveq r0, #0x00004000 @ set bit 22, mov to mvn instruction | ||
| 650 | #else | ||
| 647 | moveq r0, #0x400000 @ set bit 22, mov to mvn instruction | 651 | moveq r0, #0x400000 @ set bit 22, mov to mvn instruction |
| 652 | #endif | ||
| 648 | b 2f | 653 | b 2f |
| 649 | 1: ldr ip, [r7, r3] | 654 | 1: ldr ip, [r7, r3] |
| 650 | #ifdef CONFIG_CPU_ENDIAN_BE8 | 655 | #ifdef CONFIG_CPU_ENDIAN_BE8 |
| @@ -653,7 +658,7 @@ ARM_BE8(rev16 ip, ip) | |||
| 653 | tst ip, #0x000f0000 @ check the rotation field | 658 | tst ip, #0x000f0000 @ check the rotation field |
| 654 | orrne ip, ip, r6, lsl #24 @ mask in offset bits 31-24 | 659 | orrne ip, ip, r6, lsl #24 @ mask in offset bits 31-24 |
| 655 | biceq ip, ip, #0x00004000 @ clear bit 22 | 660 | biceq ip, ip, #0x00004000 @ clear bit 22 |
| 656 | orreq ip, ip, r0, lsl #24 @ mask in offset bits 7-0 | 661 | orreq ip, ip, r0 @ mask in offset bits 7-0 |
| 657 | #else | 662 | #else |
| 658 | bic ip, ip, #0x000000ff | 663 | bic ip, ip, #0x000000ff |
| 659 | tst ip, #0xf00 @ check the rotation field | 664 | tst ip, #0xf00 @ check the rotation field |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 6125f259b7b5..dbf0923e8d76 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
| @@ -856,7 +856,7 @@ static void __init kuser_init(void *vectors) | |||
| 856 | memcpy(vectors + 0xfe0, vectors + 0xfe8, 4); | 856 | memcpy(vectors + 0xfe0, vectors + 0xfe8, 4); |
| 857 | } | 857 | } |
| 858 | #else | 858 | #else |
| 859 | static void __init kuser_init(void *vectors) | 859 | static inline void __init kuser_init(void *vectors) |
| 860 | { | 860 | { |
| 861 | } | 861 | } |
| 862 | #endif | 862 | #endif |
diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index e0c68d5bb7dc..52886b89706c 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h | |||
| @@ -10,7 +10,7 @@ UNWIND( .fnstart ) | |||
| 10 | and r3, r0, #31 @ Get bit offset | 10 | and r3, r0, #31 @ Get bit offset |
| 11 | mov r0, r0, lsr #5 | 11 | mov r0, r0, lsr #5 |
| 12 | add r1, r1, r0, lsl #2 @ Get word offset | 12 | add r1, r1, r0, lsl #2 @ Get word offset |
| 13 | #if __LINUX_ARM_ARCH__ >= 7 | 13 | #if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP) |
| 14 | .arch_extension mp | 14 | .arch_extension mp |
| 15 | ALT_SMP(W(pldw) [r1]) | 15 | ALT_SMP(W(pldw) [r1]) |
| 16 | ALT_UP(W(nop)) | 16 | ALT_UP(W(nop)) |
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 78eeeca78f5a..580ef2de82d7 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
| @@ -558,8 +558,8 @@ static void __init build_mem_type_table(void) | |||
| 558 | mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_WB; | 558 | mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_WB; |
| 559 | break; | 559 | break; |
| 560 | } | 560 | } |
| 561 | printk("Memory policy: ECC %sabled, Data cache %s\n", | 561 | pr_info("Memory policy: %sData cache %s\n", |
| 562 | ecc_mask ? "en" : "dis", cp->policy); | 562 | ecc_mask ? "ECC enabled, " : "", cp->policy); |
| 563 | 563 | ||
| 564 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { | 564 | for (i = 0; i < ARRAY_SIZE(mem_types); i++) { |
| 565 | struct mem_type *t = &mem_types[i]; | 565 | struct mem_type *t = &mem_types[i]; |
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 5c668b7a31f9..55764a7ef1f0 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c | |||
| @@ -18,6 +18,7 @@ | |||
| 18 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
| 19 | #include <asm/cputype.h> | 19 | #include <asm/cputype.h> |
| 20 | #include <asm/mpu.h> | 20 | #include <asm/mpu.h> |
| 21 | #include <asm/procinfo.h> | ||
| 21 | 22 | ||
| 22 | #include "mm.h" | 23 | #include "mm.h" |
| 23 | 24 | ||
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 60920f62fdf5..bd1781979a39 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
| @@ -92,7 +92,7 @@ ENDPROC(cpu_v7_dcache_clean_area) | |||
| 92 | 92 | ||
| 93 | /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ | 93 | /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ |
| 94 | .globl cpu_v7_suspend_size | 94 | .globl cpu_v7_suspend_size |
| 95 | .equ cpu_v7_suspend_size, 4 * 8 | 95 | .equ cpu_v7_suspend_size, 4 * 9 |
| 96 | #ifdef CONFIG_ARM_CPU_SUSPEND | 96 | #ifdef CONFIG_ARM_CPU_SUSPEND |
| 97 | ENTRY(cpu_v7_do_suspend) | ||
