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authorChristian König <christian.koenig@amd.com>2014-06-04 09:29:57 -0400
committerAlex Deucher <alexander.deucher@amd.com>2014-06-09 22:06:51 -0400
commit7f90fc965023d72589a4e5fc02ac812e3a6ac809 (patch)
tree187365b8157da56cd1928ff5d9e5b263f4e73d73
parent0986c1a55ca64b44ee126a2f719a6e9f28cbe0ed (diff)
drm/radeon: remove range check from *_gart_set_page
We never check the return value anyway and if the index isn't valid would crash way before calling the functions. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/r100.c8
-rw-r--r--drivers/gpu/drm/radeon/r300.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon.h3
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h12
-rw-r--r--drivers/gpu/drm/radeon/rs400.c7
-rw-r--r--drivers/gpu/drm/radeon/rs600.c6
6 files changed, 16 insertions, 27 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index ad99813cfa8f..1544efcf1c3a 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -682,15 +682,11 @@ void r100_pci_gart_disable(struct radeon_device *rdev)
682 WREG32(RADEON_AIC_HI_ADDR, 0); 682 WREG32(RADEON_AIC_HI_ADDR, 0);
683} 683}
684 684
685int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) 685void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
686 uint64_t addr)
686{ 687{
687 u32 *gtt = rdev->gart.ptr; 688 u32 *gtt = rdev->gart.ptr;
688
689 if (i < 0 || i > rdev->gart.num_gpu_pages) {
690 return -EINVAL;
691 }
692 gtt[i] = cpu_to_le32(lower_32_bits(addr)); 689 gtt[i] = cpu_to_le32(lower_32_bits(addr));
693 return 0;
694} 690}
695 691
696void r100_pci_gart_fini(struct radeon_device *rdev) 692void r100_pci_gart_fini(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 206caf9700b7..3c21d77a483d 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -72,13 +72,11 @@ void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev)
72#define R300_PTE_WRITEABLE (1 << 2) 72#define R300_PTE_WRITEABLE (1 << 2)
73#define R300_PTE_READABLE (1 << 3) 73#define R300_PTE_READABLE (1 << 3)
74 74
75int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) 75void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
76 uint64_t addr)
76{ 77{
77 void __iomem *ptr = rdev->gart.ptr; 78 void __iomem *ptr = rdev->gart.ptr;
78 79
79 if (i < 0 || i > rdev->gart.num_gpu_pages) {
80 return -EINVAL;
81 }
82 addr = (lower_32_bits(addr) >> 8) | 80 addr = (lower_32_bits(addr) >> 8) |
83 ((upper_32_bits(addr) & 0xff) << 24) | 81 ((upper_32_bits(addr) & 0xff) << 24) |
84 R300_PTE_WRITEABLE | R300_PTE_READABLE; 82 R300_PTE_WRITEABLE | R300_PTE_READABLE;
@@ -86,7 +84,6 @@ int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
86 * on powerpc without HW swappers, it'll get swapped on way 84 * on powerpc without HW swappers, it'll get swapped on way
87 * into VRAM - so no need for cpu_to_le32 on VRAM tables */ 85 * into VRAM - so no need for cpu_to_le32 on VRAM tables */
88 writel(addr, ((void __iomem *)ptr) + (i * 4)); 86 writel(addr, ((void __iomem *)ptr) + (i * 4));
89 return 0;
90} 87}
91 88
92int rv370_pcie_gart_init(struct radeon_device *rdev) 89int rv370_pcie_gart_init(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 7501ba318c67..b99c7ca67440 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1782,7 +1782,8 @@ struct radeon_asic {
1782 /* gart */ 1782 /* gart */
1783 struct { 1783 struct {
1784 void (*tlb_flush)(struct radeon_device *rdev); 1784 void (*tlb_flush)(struct radeon_device *rdev);
1785 int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr); 1785 void (*set_page)(struct radeon_device *rdev, unsigned i,
1786 uint64_t addr);
1786 } gart; 1787 } gart;
1787 struct { 1788 struct {
1788 int (*init)(struct radeon_device *rdev); 1789 int (*init)(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 0eab015b2cfb..01e7c0ad8f01 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -67,7 +67,8 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
67int r100_asic_reset(struct radeon_device *rdev); 67int r100_asic_reset(struct radeon_device *rdev);
68u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); 68u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
69void r100_pci_gart_tlb_flush(struct radeon_device *rdev); 69void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
70int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 70void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
71 uint64_t addr);
71void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); 72void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
72int r100_irq_set(struct radeon_device *rdev); 73int r100_irq_set(struct radeon_device *rdev);
73int r100_irq_process(struct radeon_device *rdev); 74int r100_irq_process(struct radeon_device *rdev);
@@ -171,7 +172,8 @@ extern void r300_fence_ring_emit(struct radeon_device *rdev,
171 struct radeon_fence *fence); 172 struct radeon_fence *fence);
172extern int r300_cs_parse(struct radeon_cs_parser *p); 173extern int r300_cs_parse(struct radeon_cs_parser *p);
173extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); 174extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
174extern int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 175extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
176 uint64_t addr);
175extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); 177extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes);
176extern int rv370_get_pcie_lanes(struct radeon_device *rdev); 178extern int rv370_get_pcie_lanes(struct radeon_device *rdev);
177extern void r300_set_reg_safe(struct radeon_device *rdev); 179extern void r300_set_reg_safe(struct radeon_device *rdev);
@@ -206,7 +208,8 @@ extern void rs400_fini(struct radeon_device *rdev);
206extern int rs400_suspend(struct radeon_device *rdev); 208extern int rs400_suspend(struct radeon_device *rdev);
207extern int rs400_resume(struct radeon_device *rdev); 209extern int rs400_resume(struct radeon_device *rdev);
208void rs400_gart_tlb_flush(struct radeon_device *rdev); 210void rs400_gart_tlb_flush(struct radeon_device *rdev);
209int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 211void rs400_gart_set_page(struct radeon_device *rdev, unsigned i,
212 uint64_t addr);
210uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); 213uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg);
211void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 214void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
212int rs400_gart_init(struct radeon_device *rdev); 215int rs400_gart_init(struct radeon_device *rdev);
@@ -229,7 +232,8 @@ int rs600_irq_process(struct radeon_device *rdev);
229void rs600_irq_disable(struct radeon_device *rdev); 232void rs600_irq_disable(struct radeon_device *rdev);
230u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); 233u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
231void rs600_gart_tlb_flush(struct radeon_device *rdev); 234void rs600_gart_tlb_flush(struct radeon_device *rdev);
232int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 235void rs600_gart_set_page(struct radeon_device *rdev, unsigned i,
236 uint64_t addr);
233uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); 237uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg);
234void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 238void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
235void rs600_bandwidth_update(struct radeon_device *rdev); 239void rs600_bandwidth_update(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 130d5cc50d43..a0f96decece3 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -212,21 +212,16 @@ void rs400_gart_fini(struct radeon_device *rdev)
212#define RS400_PTE_WRITEABLE (1 << 2) 212#define RS400_PTE_WRITEABLE (1 << 2)
213#define RS400_PTE_READABLE (1 << 3) 213#define RS400_PTE_READABLE (1 << 3)
214 214
215int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) 215void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, uint64_t addr)
216{ 216{
217 uint32_t entry; 217 uint32_t entry;
218 u32 *gtt = rdev->gart.ptr; 218 u32 *gtt = rdev->gart.ptr;
219 219
220 if (i < 0 || i > rdev->gart.num_gpu_pages) {
221 return -EINVAL;
222 }
223
224 entry = (lower_32_bits(addr) & PAGE_MASK) | 220 entry = (lower_32_bits(addr) & PAGE_MASK) |
225 ((upper_32_bits(addr) & 0xff) << 4) | 221 ((upper_32_bits(addr) & 0xff) << 4) |
226 RS400_PTE_WRITEABLE | RS400_PTE_READABLE; 222 RS400_PTE_WRITEABLE | RS400_PTE_READABLE;
227 entry = cpu_to_le32(entry); 223 entry = cpu_to_le32(entry);
228 gtt[i] = entry; 224 gtt[i] = entry;
229 return 0;
230} 225}
231 226
232int rs400_mc_wait_for_idle(struct radeon_device *rdev) 227int rs400_mc_wait_for_idle(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index e0465b2cde39..d1a35cb1c91d 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -626,20 +626,16 @@ static void rs600_gart_fini(struct radeon_device *rdev)
626 radeon_gart_table_vram_free(rdev); 626 radeon_gart_table_vram_free(rdev);
627} 627}
628 628
629int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) 629void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, uint64_t addr)
630{ 630{
631 void __iomem *ptr = (void *)rdev->gart.ptr; 631 void __iomem *ptr = (void *)rdev->gart.ptr;
632 632
633 if (i < 0 || i > rdev->gart.num_gpu_pages) {
634 return -EINVAL;
635 }
636 addr = addr & 0xFFFFFFFFFFFFF000ULL; 633 addr = addr & 0xFFFFFFFFFFFFF000ULL;
637 if (addr == rdev->dummy_page.addr) 634 if (addr == rdev->dummy_page.addr)
638 addr |= R600_PTE_SYSTEM | R600_PTE_SNOOPED; 635 addr |= R600_PTE_SYSTEM | R600_PTE_SNOOPED;
639 else 636 else
640 addr |= R600_PTE_GART; 637 addr |= R600_PTE_GART;
641 writeq(addr, ptr + (i * 8)); 638 writeq(addr, ptr + (i * 8));
642 return 0;
643} 639}
644 640
645int rs600_irq_set(struct radeon_device *rdev) 641int rs600_irq_set(struct radeon_device *rdev)