diff options
| author | Manuel Lauss <manuel.lauss@gmail.com> | 2014-08-20 15:36:31 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-09-22 07:35:47 -0400 |
| commit | 7ec32e4965ae69976de0fb0f340496904e23e113 (patch) | |
| tree | 92d721b17866e9e8653acfde469ba0689e72f97e | |
| parent | 092ea4660808cd441ccf3d415b80665dbe8712f4 (diff) | |
MIPS: Alchemy: Update cpu-feature-overrides
More features the Au1 core definitely doesn't have.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7562/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h index 09f45e6afade..c5b6eef0efa7 100644 --- a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h | |||
| @@ -8,6 +8,12 @@ | |||
| 8 | #define __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H | 8 | #define __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H |
| 9 | 9 | ||
| 10 | #define cpu_has_tlb 1 | 10 | #define cpu_has_tlb 1 |
| 11 | #define cpu_has_tlbinv 0 | ||
| 12 | #define cpu_has_segments 0 | ||
| 13 | #define cpu_has_eva 0 | ||
| 14 | #define cpu_has_htw 0 | ||
| 15 | #define cpu_has_rixiex 0 | ||
| 16 | #define cpu_has_maar 0 | ||
| 11 | #define cpu_has_4kex 1 | 17 | #define cpu_has_4kex 1 |
| 12 | #define cpu_has_3k_cache 0 | 18 | #define cpu_has_3k_cache 0 |
| 13 | #define cpu_has_4k_cache 1 | 19 | #define cpu_has_4k_cache 1 |
| @@ -28,6 +34,8 @@ | |||
| 28 | #define cpu_has_mdmx 0 | 34 | #define cpu_has_mdmx 0 |
| 29 | #define cpu_has_mips3d 0 | 35 | #define cpu_has_mips3d 0 |
| 30 | #define cpu_has_smartmips 0 | 36 | #define cpu_has_smartmips 0 |
| 37 | #define cpu_has_rixi 0 | ||
| 38 | #define cpu_has_mmips 0 | ||
| 31 | #define cpu_has_vtag_icache 0 | 39 | #define cpu_has_vtag_icache 0 |
| 32 | #define cpu_has_dc_aliases 0 | 40 | #define cpu_has_dc_aliases 0 |
| 33 | #define cpu_has_ic_fills_f_dc 1 | 41 | #define cpu_has_ic_fills_f_dc 1 |
| @@ -50,4 +58,8 @@ | |||
| 50 | #define cpu_dcache_line_size() 32 | 58 | #define cpu_dcache_line_size() 32 |
| 51 | #define cpu_icache_line_size() 32 | 59 | #define cpu_icache_line_size() 32 |
| 52 | 60 | ||
| 61 | #define cpu_has_perf_cntr_intr_bit 0 | ||
| 62 | #define cpu_has_vz 0 | ||
| 63 | #define cpu_has_msa 0 | ||
| 64 | |||
| 53 | #endif /* __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H */ | 65 | #endif /* __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H */ |
