nand/denali: use dev_xx debug function to replace nand_dbg_print and some printk

Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

2 files changed, 42 insertions, 184 deletions

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index e4462c0740b2..f59dd03f36d4 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -119,9 +119,6 @@ static const uint32_t reset_complete[4] = {INTR_STATUS0__RST_COMP,
                                                         INTR_STATUS2__RST_COMP,
                                                         INTR_STATUS3__RST_COMP};
 
-/* specifies the debug level of the driver */
-static int nand_debug_level;
-
 /* forward declarations */
 static void clear_interrupts(struct denali_nand_info *denali);
 static uint32_t wait_for_irq(struct denali_nand_info *denali,
@@ -130,8 +127,6 @@ static void denali_irq_enable(struct denali_nand_info *denali,
                                                         uint32_t int_mask);
 static uint32_t read_interrupt_status(struct denali_nand_info *denali);
 
-#define DEBUG_DENALI 0
-
 /* Certain operations for the denali NAND controller use
  * an indexed mode to read/write data. The operation is
  * performed by writing the address value of the command
@@ -181,11 +176,6 @@ static void read_status(struct denali_nand_info *denali)
 
         /* update buffer with status value */
         write_byte_to_buf(denali, ioread32(denali->flash_mem + 0x10));
-
-#if DEBUG_DENALI
-        printk(KERN_INFO "device reporting status value of 0x%2x\n",
-                        denali->buf.buf[0]);
-#endif
 }
 
 /* resets a specific device connected to the core */
@@ -204,7 +194,7 @@ static void reset_bank(struct denali_nand_info *denali)
         irq_status = wait_for_irq(denali, irq_mask);
 
         if (irq_status & operation_timeout[denali->flash_bank])
-                printk(KERN_ERR "reset bank failed.\n");
+                dev_err(&denali->dev->dev, "reset bank failed.\n");
 }
 
 /* Reset the flash controller */
@@ -212,7 +202,7 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
 {
         uint32_t i;
 
-        nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
+        dev_dbg(&denali->dev->dev, "%s, Line %d, Function: %s\n",
                        __FILE__, __LINE__, __func__);
 
         for (i = 0 ; i < LLD_MAX_FLASH_BANKS; i++)
@@ -228,7 +218,7 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
                         ;
                 if (ioread32(denali->flash_reg + intr_status_addresses[i]) &
                         operation_timeout[i])
-                        nand_dbg_print(NAND_DBG_WARN,
+                        dev_dbg(&denali->dev->dev,
                         "NAND Reset operation timed out on bank %d\n", i);
         }
 
@@ -266,7 +256,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
         uint16_t acc_clks;
         uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt;
 
-        nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
+        dev_dbg(&denali->dev->dev, "%s, Line %d, Function: %s\n",
                        __FILE__, __LINE__, __func__);
 
         en_lo = CEIL_DIV(Trp[mode], CLK_X);
@@ -303,7 +293,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
                 acc_clks++;
 
         if ((data_invalid - acc_clks * CLK_X) < 2)
-                nand_dbg_print(NAND_DBG_WARN, "%s, Line %d: Warning!\n",
+                dev_warn(&denali->dev->dev, "%s, Line %d: Warning!\n",
                         __FILE__, __LINE__);
 
         addr_2_data = CEIL_DIV(Tadl[mode], CLK_X);
@@ -431,7 +421,7 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
 #endif
                 break;
         default:
-                nand_dbg_print(NAND_DBG_WARN,
+                dev_warn(&denali->dev->dev,
                         "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
                         "Will use default parameter values instead.\n",
                         device_id);
@@ -453,7 +443,7 @@ static void find_valid_banks(struct denali_nand_info *denali)
                 index_addr_read_data(denali,
                                 (uint32_t)(MODE_11 | (i << 24) | 2), &id[i]);
 
-                nand_dbg_print(NAND_DBG_DEBUG,
+                dev_dbg(&denali->dev->dev,
                         "Return 1st ID for bank[%d]: %x\n", i, id[i]);
 
                 if (i == 0) {
@@ -473,12 +463,13 @@ static void find_valid_banks(struct denali_nand_info *denali)
                  * Multichip support is not enabled.
                  */
                 if (denali->total_used_banks != 1) {
-                        printk(KERN_ERR "Sorry, Intel CE4100 only supports "
+                        dev_err(&denali->dev->dev,
+                                        "Sorry, Intel CE4100 only supports "
                                         "a single NAND device.\n");
                         BUG();
                 }
         }
-        nand_dbg_print(NAND_DBG_DEBUG,
+        dev_dbg(&denali->dev->dev,
                 "denali->total_used_banks: %d\n", denali->total_used_banks);
 }
 
@@ -512,8 +503,9 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
         uint32_t id_bytes[5], addr;
         uint8_t i, maf_id, device_id;
 
-        nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
-                       __FILE__, __LINE__, __func__);
+        dev_dbg(&denali->dev->dev,
+                        "%s, Line %d, Function: %s\n",
+                        __FILE__, __LINE__, __func__);
 
         /* Use read id method to get device ID and other
          * params. For some NAND chips, controller can't
@@ -540,12 +532,14 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
                 get_hynix_nand_para(denali, device_id);
         }
 
-        nand_dbg_print(NAND_DBG_DEBUG, "Dump timing register values:"
-                        "acc_clks: %d, re_2_we: %d, we_2_re: %d,"
-                        "addr_2_data: %d, rdwr_en_lo_cnt: %d, "
+        dev_info(&denali->dev->dev,
+                        "Dump timing register values:"
+                        "acc_clks: %d, re_2_we: %d, re_2_re: %d\n"
+                        "we_2_re: %d, addr_2_data: %d, rdwr_en_lo_cnt: %d\n"
                         "rdwr_en_hi_cnt: %d, cs_setup_cnt: %d\n",
                         ioread32(denali->flash_reg + ACC_CLKS),
                         ioread32(denali->flash_reg + RE_2_WE),
+                        ioread32(denali->flash_reg + RE_2_RE),
                         ioread32(denali->flash_reg + WE_2_RE),
                         ioread32(denali->flash_reg + ADDR_2_DATA),
                         ioread32(denali->flash_reg + RDWR_EN_LO_CNT),
@@ -568,7 +562,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
 static void denali_set_intr_modes(struct denali_nand_info *denali,
                                         uint16_t INT_ENABLE)
 {
-        nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
+        dev_dbg(&denali->dev->dev, "%s, Line %d, Function: %s\n",
                        __FILE__, __LINE__, __func__);