diff options
author | Emmanuel Grumbach <emmanuel.grumbach@intel.com> | 2014-07-28 05:59:45 -0400 |
---|---|---|
committer | Emmanuel Grumbach <emmanuel.grumbach@intel.com> | 2014-09-03 15:33:10 -0400 |
commit | 7ceb98a313b8a1a5d949f538f4bb5ead4fabad23 (patch) | |
tree | 0852590ad5d6e5558a53e02149b8dc2e596605cb | |
parent | 7280d1f0bd14271638bf6b4c3c9dc814af1aaafc (diff) |
iwlwifi: mvm: reduce the AMPDU size in low latency mode
This allows to leave a frame in the Tx Fifo which allows
the firmware to try to enter burst mode.
The end result of this is a better latency since the
firmware utilises the TxOP better.
Also limit the AMPDU size to the limit set in the ADDBA
response. This doesn't change much since the AMPDU size
was limited by the configuration of the hardware scheduler,
but here we add a software limit by the mean of the link
quality command.
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
-rw-r--r-- | drivers/net/wireless/iwlwifi/mvm/rs.c | 56 |
1 files changed, 38 insertions, 18 deletions
diff --git a/drivers/net/wireless/iwlwifi/mvm/rs.c b/drivers/net/wireless/iwlwifi/mvm/rs.c index c70e959bf0e3..51fa571d5c45 100644 --- a/drivers/net/wireless/iwlwifi/mvm/rs.c +++ b/drivers/net/wireless/iwlwifi/mvm/rs.c | |||
@@ -2678,6 +2678,7 @@ static void rs_build_rates_table_from_fixed(struct iwl_mvm *mvm, | |||
2678 | int i; | 2678 | int i; |
2679 | int num_rates = ARRAY_SIZE(lq_cmd->rs_table); | 2679 | int num_rates = ARRAY_SIZE(lq_cmd->rs_table); |
2680 | __le32 ucode_rate_le32 = cpu_to_le32(ucode_rate); | 2680 | __le32 ucode_rate_le32 = cpu_to_le32(ucode_rate); |
2681 | u8 ant = (ucode_rate & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS; | ||
2681 | 2682 | ||
2682 | for (i = 0; i < num_rates; i++) | 2683 | for (i = 0; i < num_rates; i++) |
2683 | lq_cmd->rs_table[i] = ucode_rate_le32; | 2684 | lq_cmd->rs_table[i] = ucode_rate_le32; |
@@ -2688,6 +2689,13 @@ static void rs_build_rates_table_from_fixed(struct iwl_mvm *mvm, | |||
2688 | lq_cmd->mimo_delim = num_rates - 1; | 2689 | lq_cmd->mimo_delim = num_rates - 1; |
2689 | else | 2690 | else |
2690 | lq_cmd->mimo_delim = 0; | 2691 | lq_cmd->mimo_delim = 0; |
2692 | |||
2693 | lq_cmd->reduced_tpc = 0; | ||
2694 | |||
2695 | if (num_of_ant(ant) == 1) | ||
2696 | lq_cmd->single_stream_ant_msk = ant; | ||
2697 | |||
2698 | lq_cmd->agg_frame_cnt_limit = LINK_QUAL_AGG_FRAME_LIMIT_DEF; | ||
2691 | } | 2699 | } |
2692 | #endif /* CONFIG_MAC80211_DEBUGFS */ | 2700 | #endif /* CONFIG_MAC80211_DEBUGFS */ |
2693 | 2701 | ||
@@ -2811,31 +2819,46 @@ static void rs_fill_lq_cmd(struct iwl_mvm *mvm, | |||
2811 | const struct rs_rate *initial_rate) | 2819 | const struct rs_rate *initial_rate) |
2812 | { | 2820 | { |
2813 | struct iwl_lq_cmd *lq_cmd = &lq_sta->lq; | 2821 | struct iwl_lq_cmd *lq_cmd = &lq_sta->lq; |
2814 | u8 ant = initial_rate->ant; | 2822 | struct iwl_mvm_sta *mvmsta; |
2823 | struct iwl_mvm_vif *mvmvif; | ||
2824 | |||
2825 | lq_cmd->agg_disable_start_th = LINK_QUAL_AGG_DISABLE_START_DEF; | ||
2826 | lq_cmd->agg_time_limit = | ||
2827 | cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF); | ||
2815 | 2828 | ||
2816 | #ifdef CONFIG_MAC80211_DEBUGFS | 2829 | #ifdef CONFIG_MAC80211_DEBUGFS |
2817 | if (lq_sta->pers.dbg_fixed_rate) { | 2830 | if (lq_sta->pers.dbg_fixed_rate) { |
2818 | rs_build_rates_table_from_fixed(mvm, lq_cmd, | 2831 | rs_build_rates_table_from_fixed(mvm, lq_cmd, |
2819 | lq_sta->band, | 2832 | lq_sta->band, |
2820 | lq_sta->pers.dbg_fixed_rate); | 2833 | lq_sta->pers.dbg_fixed_rate); |
2821 | lq_cmd->reduced_tpc = 0; | 2834 | return; |
2822 | ant = (lq_sta->pers.dbg_fixed_rate & RATE_MCS_ANT_ABC_MSK) >> | 2835 | } |
2823 | RATE_MCS_ANT_POS; | ||
2824 | } else | ||
2825 | #endif | 2836 | #endif |
2826 | rs_build_rates_table(mvm, lq_sta, initial_rate); | 2837 | if (WARN_ON_ONCE(!sta || !initial_rate)) |
2838 | return; | ||
2827 | 2839 | ||
2828 | if (num_of_ant(ant) == 1) | 2840 | rs_build_rates_table(mvm, lq_sta, initial_rate); |
2829 | lq_cmd->single_stream_ant_msk = ant; | ||
2830 | 2841 | ||
2831 | lq_cmd->agg_frame_cnt_limit = LINK_QUAL_AGG_FRAME_LIMIT_DEF; | 2842 | if (num_of_ant(initial_rate->ant) == 1) |
2832 | lq_cmd->agg_disable_start_th = LINK_QUAL_AGG_DISABLE_START_DEF; | 2843 | lq_cmd->single_stream_ant_msk = initial_rate->ant; |
2833 | 2844 | ||
2834 | lq_cmd->agg_time_limit = | 2845 | mvmsta = iwl_mvm_sta_from_mac80211(sta); |
2835 | cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF); | 2846 | mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif); |
2836 | 2847 | ||
2837 | if (sta) | 2848 | if (num_of_ant(initial_rate->ant) == 1) |
2838 | lq_cmd->agg_time_limit = | 2849 | lq_cmd->single_stream_ant_msk = initial_rate->ant; |
2850 | |||
2851 | lq_cmd->agg_frame_cnt_limit = mvmsta->max_agg_bufsize; | ||
2852 | |||
2853 | /* | ||
2854 | * In case of low latency, tell the firwmare to leave a frame in the | ||
2855 | * Tx Fifo so that it can start a transaction in the same TxOP. This | ||
2856 | * basically allows the firmware to send bursts. | ||
2857 | */ | ||
2858 | if (iwl_mvm_vif_low_latency(mvmvif)) | ||
2859 | lq_cmd->agg_frame_cnt_limit--; | ||
2860 | |||
2861 | lq_cmd->agg_time_limit = | ||
2839 | cpu_to_le16(iwl_mvm_coex_agg_time_limit(mvm, sta)); | 2862 | cpu_to_le16(iwl_mvm_coex_agg_time_limit(mvm, sta)); |
2840 | } | 2863 | } |
2841 | 2864 | ||
@@ -2932,10 +2955,7 @@ static void rs_program_fix_rate(struct iwl_mvm *mvm, | |||
2932 | lq_sta->lq.sta_id, lq_sta->pers.dbg_fixed_rate); | 2955 | lq_sta->lq.sta_id, lq_sta->pers.dbg_fixed_rate); |
2933 | 2956 | ||
2934 | if (lq_sta->pers.dbg_fixed_rate) { | 2957 | if (lq_sta->pers.dbg_fixed_rate) { |
2935 | struct rs_rate rate; | 2958 | rs_fill_lq_cmd(mvm, NULL, lq_sta, NULL); |
2936 | rs_rate_from_ucode_rate(lq_sta->pers.dbg_fixed_rate, | ||
2937 | lq_sta->band, &rate); | ||
2938 | rs_fill_lq_cmd(mvm, NULL, lq_sta, &rate); | ||
2939 | iwl_mvm_send_lq_cmd(lq_sta->pers.drv, &lq_sta->lq, false); | 2959 | iwl_mvm_send_lq_cmd(lq_sta->pers.drv, &lq_sta->lq, false); |
2940 | } | 2960 | } |
2941 | } | 2961 | } |