diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-07-31 13:02:15 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-07-31 13:02:15 -0400 |
commit | 7c909b09372d5b064651202bf236b63caddd1777 (patch) | |
tree | 8bed7d10b76754a926deca58d087fbf639ba0633 | |
parent | 5196626dae54fdb5bee89fdd1232b2e03cc60956 (diff) | |
parent | a74c52def9ab953c77956a8e93d225621980f54c (diff) |
Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux
Pull clock driver fix from Mike Turquette:
"A single patch to re-enable audio which is broken on all DRA7
SoC-based platforms. Missed this one from the last set of fixes"
* tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux:
clk: ti: clk-7xx: Correct ABE DPLL configuration
-rw-r--r-- | drivers/clk/ti/clk-7xx.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index e1581335937d..cb8e6f14e880 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c | |||
@@ -16,7 +16,7 @@ | |||
16 | #include <linux/clkdev.h> | 16 | #include <linux/clkdev.h> |
17 | #include <linux/clk/ti.h> | 17 | #include <linux/clk/ti.h> |
18 | 18 | ||
19 | #define DRA7_DPLL_ABE_DEFFREQ 361267200 | 19 | #define DRA7_DPLL_ABE_DEFFREQ 180633600 |
20 | #define DRA7_DPLL_GMAC_DEFFREQ 1000000000 | 20 | #define DRA7_DPLL_GMAC_DEFFREQ 1000000000 |
21 | 21 | ||
22 | 22 | ||
@@ -322,6 +322,11 @@ int __init dra7xx_dt_clk_init(void) | |||
322 | if (rc) | 322 | if (rc) |
323 | pr_err("%s: failed to configure ABE DPLL!\n", __func__); | 323 | pr_err("%s: failed to configure ABE DPLL!\n", __func__); |
324 | 324 | ||
325 | dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck"); | ||
326 | rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2); | ||
327 | if (rc) | ||
328 | pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__); | ||
329 | |||
325 | dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck"); | 330 | dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck"); |
326 | rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ); | 331 | rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ); |
327 | if (rc) | 332 | if (rc) |