diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-09-05 10:49:14 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-05 12:02:33 -0400 |
| commit | 7c7095aa423b9b14038abc08fba84b9d7a33d643 (patch) | |
| tree | d71363e05eca317a5d712eda3252066c27469892 | |
| parent | 397fcaf71783de804b2e1ae3ec41da0c79a89a61 (diff) | |
[ARM] omap: fix inappropriate casting in gpio.c
gpio.c wilfully casts physical addresses to void __iomem * and then
fixes them up at runtime using:
bank->base = IO_ADDRESS(bank->base);
where accesses prior to this fixup are via omap_read/omap_write, and
after are by __raw_read/__raw_write. This doesn't lend itself to
static checking, nor to easy understanding of the code.
And so, OMAP_MPUIO_BASE gets to be the right type - integer like since
it's a physical address, not a MMIO pointer.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/plat-omap/gpio.c | 70 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/gpio.h | 2 |
2 files changed, 36 insertions, 36 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 9e1341ebc14e..5de70d650922 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
| @@ -29,7 +29,7 @@ | |||
| 29 | /* | 29 | /* |
| 30 | * OMAP1510 GPIO registers | 30 | * OMAP1510 GPIO registers |
| 31 | */ | 31 | */ |
| 32 | #define OMAP1510_GPIO_BASE (void __iomem *)0xfffce000 | 32 | #define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000) |
| 33 | #define OMAP1510_GPIO_DATA_INPUT 0x00 | 33 | #define OMAP1510_GPIO_DATA_INPUT 0x00 |
| 34 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 | 34 | #define OMAP1510_GPIO_DATA_OUTPUT 0x04 |
| 35 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 | 35 | #define OMAP1510_GPIO_DIR_CONTROL 0x08 |
| @@ -43,10 +43,10 @@ | |||
| 43 | /* | 43 | /* |
| 44 | * OMAP1610 specific GPIO registers | 44 | * OMAP1610 specific GPIO registers |
| 45 | */ | 45 | */ |
| 46 | #define OMAP1610_GPIO1_BASE (void __iomem *)0xfffbe400 | 46 | #define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400) |
| 47 | #define OMAP1610_GPIO2_BASE (void __iomem *)0xfffbec00 | 47 | #define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00) |
| 48 | #define OMAP1610_GPIO3_BASE (void __iomem *)0xfffbb400 | 48 | #define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400) |
| 49 | #define OMAP1610_GPIO4_BASE (void __iomem *)0xfffbbc00 | 49 | #define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00) |
| 50 | #define OMAP1610_GPIO_REVISION 0x0000 | 50 | #define OMAP1610_GPIO_REVISION 0x0000 |
| 51 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 | 51 | #define OMAP1610_GPIO_SYSCONFIG 0x0010 |
| 52 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 | 52 | #define OMAP1610_GPIO_SYSSTATUS 0x0014 |
| @@ -68,12 +68,12 @@ | |||
| 68 | /* | 68 | /* |
| 69 | * OMAP730 specific GPIO registers | 69 | * OMAP730 specific GPIO registers |
| 70 | */ | 70 | */ |
| 71 | #define OMAP730_GPIO1_BASE (void __iomem *)0xfffbc000 | 71 | #define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000) |
| 72 | #define OMAP730_GPIO2_BASE (void __iomem *)0xfffbc800 | 72 | #define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800) |
| 73 | #define OMAP730_GPIO3_BASE (void __iomem *)0xfffbd000 | 73 | #define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000) |
| 74 | #define OMAP730_GPIO4_BASE (void __iomem *)0xfffbd800 | 74 | #define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800) |
| 75 | #define OMAP730_GPIO5_BASE (void __iomem *)0xfffbe000 | 75 | #define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000) |
| 76 | #define OMAP730_GPIO6_BASE (void __iomem *)0xfffbe800 | 76 | #define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800) |
| 77 | #define OMAP730_GPIO_DATA_INPUT 0x00 | 77 | #define OMAP730_GPIO_DATA_INPUT 0x00 |
| 78 | #define OMAP730_GPIO_DATA_OUTPUT 0x04 | 78 | #define OMAP730_GPIO_DATA_OUTPUT 0x04 |
| 79 | #define OMAP730_GPIO_DIR_CONTROL 0x08 | 79 | #define OMAP730_GPIO_DIR_CONTROL 0x08 |
| @@ -84,16 +84,16 @@ | |||
| 84 | /* | 84 | /* |
| 85 | * omap24xx specific GPIO registers | 85 | * omap24xx specific GPIO registers |
| 86 | */ | 86 | */ |
| 87 | #define OMAP242X_GPIO1_BASE (void __iomem *)0x48018000 | 87 | #define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) |
| 88 | #define OMAP242X_GPIO2_BASE (void __iomem *)0x4801a000 | 88 | #define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000) |
| 89 | #define OMAP242X_GPIO3_BASE (void __iomem *)0x4801c000 | 89 | #define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000) |
| 90 | #define OMAP242X_GPIO4_BASE (void __iomem *)0x4801e000 | 90 | #define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000) |
| 91 | 91 | ||
| 92 | #define OMAP243X_GPIO1_BASE (void __iomem *)0x4900C000 | 92 | #define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000) |
| 93 | #define OMAP243X_GPIO2_BASE (void __iomem *)0x4900E000 | 93 | #define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000) |
| 94 | #define OMAP243X_GPIO3_BASE (void __iomem *)0x49010000 | 94 | #define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000) |
| 95 | #define OMAP243X_GPIO4_BASE (void __iomem *)0x49012000 | 95 | #define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000) |
| 96 | #define OMAP243X_GPIO5_BASE (void __iomem *)0x480B6000 | 96 | #define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000) |
| 97 | 97 | ||
| 98 | #define OMAP24XX_GPIO_REVISION 0x0000 | 98 | #define OMAP24XX_GPIO_REVISION 0x0000 |
| 99 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 | 99 | #define OMAP24XX_GPIO_SYSCONFIG 0x0010 |
| @@ -123,13 +123,14 @@ | |||
| 123 | * omap34xx specific GPIO registers | 123 | * omap34xx specific GPIO registers |
| 124 | */ | 124 | */ |
| 125 | 125 | ||
| 126 | #define OMAP34XX_GPIO1_BASE (void __iomem *)0x48310000 | 126 | #define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000) |
| 127 | #define OMAP34XX_GPIO2_BASE (void __iomem *)0x49050000 | 127 | #define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000) |
| 128 | #define OMAP34XX_GPIO3_BASE (void __iomem *)0x49052000 | 128 | #define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000) |
| 129 | #define OMAP34XX_GPIO4_BASE (void __iomem *)0x49054000 | 129 | #define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000) |
| 130 | #define OMAP34XX_GPIO5_BASE (void __iomem *)0x49056000 | 130 | #define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) |
| 131 | #define OMAP34XX_GPIO6_BASE (void __iomem *)0x49058000 | 131 | #define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) |
| 132 | 132 | ||
| 133 | #define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE) | ||
| 133 | 134 | ||
| 134 | struct gpio_bank { | 135 | struct gpio_bank { |
| 135 | void __iomem *base; | 136 | void __iomem *base; |
| @@ -161,7 +162,7 @@ struct gpio_bank { | |||
| 161 | 162 | ||
| 162 | #ifdef CONFIG_ARCH_OMAP16XX | 163 | #ifdef CONFIG_ARCH_OMAP16XX |
| 163 | static struct gpio_bank gpio_bank_1610[5] = { | 164 | static struct gpio_bank gpio_bank_1610[5] = { |
| 164 | { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, | 165 | { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, |
| 165 | { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, | 166 | { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, |
| 166 | { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, | 167 | { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, |
| 167 | { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, | 168 | { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, |
| @@ -171,14 +172,14 @@ static struct gpio_bank gpio_bank_1610[5] = { | |||
| 171 | 172 | ||
| 172 | #ifdef CONFIG_ARCH_OMAP15XX | 173 | #ifdef CONFIG_ARCH_OMAP15XX |
| 173 | static struct gpio_bank gpio_bank_1510[2] = { | 174 | static struct gpio_bank gpio_bank_1510[2] = { |
| 174 | { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 175 | { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, |
| 175 | { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } | 176 | { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } |
| 176 | }; | 177 | }; |
| 177 | #endif | 178 | #endif |
| 178 | 179 | ||
| 179 | #ifdef CONFIG_ARCH_OMAP730 | 180 | #ifdef CONFIG_ARCH_OMAP730 |
| 180 | static struct gpio_bank gpio_bank_730[7] = { | 181 | static struct gpio_bank gpio_bank_730[7] = { |
| 181 | { OMAP_MPUIO_BASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, | 182 | { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, |
| 182 | { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, | 183 | { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, |
| 183 | { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, | 184 | { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, |
| 184 | { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, | 185 | { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, |
| @@ -1393,7 +1394,7 @@ static int __init _omap_gpio_init(void) | |||
| 1393 | 1394 | ||
| 1394 | gpio_bank_count = 5; | 1395 | gpio_bank_count = 5; |
| 1395 | gpio_bank = gpio_bank_1610; | 1396 | gpio_bank = gpio_bank_1610; |
| 1396 | rev = omap_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); | 1397 | rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); |
| 1397 | printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", | 1398 | printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", |
| 1398 | (rev >> 4) & 0x0f, rev & 0x0f); | 1399 | (rev >> 4) & 0x0f, rev & 0x0f); |
| 1399 | } | 1400 | } |
| @@ -1412,7 +1413,7 @@ static int __init _omap_gpio_init(void) | |||
| 1412 | 1413 | ||
| 1413 | gpio_bank_count = 4; | 1414 | gpio_bank_count = 4; |
| 1414 | gpio_bank = gpio_bank_242x; | 1415 | gpio_bank = gpio_bank_242x; |
| 1415 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | 1416 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); |
| 1416 | printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", | 1417 | printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", |
| 1417 | (rev >> 4) & 0x0f, rev & 0x0f); | 1418 | (rev >> 4) & 0x0f, rev & 0x0f); |
| 1418 | } | 1419 | } |
| @@ -1421,7 +1422,7 @@ static int __init _omap_gpio_init(void) | |||
| 1421 | 1422 | ||
| 1422 | gpio_bank_count = 5; | 1423 | gpio_bank_count = 5; |
| 1423 | gpio_bank = gpio_bank_243x; | 1424 | gpio_bank = gpio_bank_243x; |
| 1424 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | 1425 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); |
| 1425 | printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", | 1426 | printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", |
| 1426 | (rev >> 4) & 0x0f, rev & 0x0f); | 1427 | (rev >> 4) & 0x0f, rev & 0x0f); |
| 1427 | } | 1428 | } |
| @@ -1432,7 +1433,7 @@ static int __init _omap_gpio_init(void) | |||
| 1432 | 1433 | ||
| 1433 | gpio_bank_count = OMAP34XX_NR_GPIOS; | 1434 | gpio_bank_count = OMAP34XX_NR_GPIOS; |
| 1434 | gpio_bank = gpio_bank_34xx; | 1435 | gpio_bank = gpio_bank_34xx; |
| 1435 | rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); | 1436 | rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); |
| 1436 | printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", | 1437 | printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", |
| 1437 | (rev >> 4) & 0x0f, rev & 0x0f); | < | |
