diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2013-11-18 21:32:37 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-19 07:05:09 -0500 |
commit | 7c6c2652bab9601883ed579071aa56ab52a28ea6 (patch) | |
tree | 9718a987326e7128d914e656840b1b5d80a8c37b | |
parent | be1c1fe21b3a9d48580bdf976c8dac844f456290 (diff) |
drm/i915: Do not enable package C8 on unsupported hardware
If the hardware does not support package C8, then do not even schedule
work to enable it. Thereby we can eliminate a bunch of dangerous work.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 15 |
2 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 8600c315b4c4..ccdbecca070d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1816,6 +1816,7 @@ struct drm_i915_file_private { | |||
1816 | #define HAS_POWER_WELL(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) | 1816 | #define HAS_POWER_WELL(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
1817 | #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) | 1817 | #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) |
1818 | #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) | 1818 | #define HAS_PSR(dev) (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
1819 | #define HAS_PC8(dev) (IS_HASWELL(dev)) /* XXX HSW:ULX */ | ||
1819 | 1820 | ||
1820 | #define INTEL_PCH_DEVICE_ID_MASK 0xff00 | 1821 | #define INTEL_PCH_DEVICE_ID_MASK 0xff00 |
1821 | #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 | 1822 | #define INTEL_PCH_IBX_DEVICE_ID_TYPE 0x3b00 |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0b77916e7ea6..7ec8b488bb1d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -6518,6 +6518,9 @@ static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv) | |||
6518 | 6518 | ||
6519 | void hsw_enable_package_c8(struct drm_i915_private *dev_priv) | 6519 | void hsw_enable_package_c8(struct drm_i915_private *dev_priv) |
6520 | { | 6520 | { |
6521 | if (!HAS_PC8(dev_priv->dev)) | ||
6522 | return; | ||
6523 | |||
6521 | mutex_lock(&dev_priv->pc8.lock); | 6524 | mutex_lock(&dev_priv->pc8.lock); |
6522 | __hsw_enable_package_c8(dev_priv); | 6525 | __hsw_enable_package_c8(dev_priv); |
6523 | mutex_unlock(&dev_priv->pc8.lock); | 6526 | mutex_unlock(&dev_priv->pc8.lock); |
@@ -6525,6 +6528,9 @@ void hsw_enable_package_c8(struct drm_i915_private *dev_priv) | |||
6525 | 6528 | ||
6526 | void hsw_disable_package_c8(struct drm_i915_private *dev_priv) | 6529 | void hsw_disable_package_c8(struct drm_i915_private *dev_priv) |
6527 | { | 6530 | { |
6531 | if (!HAS_PC8(dev_priv->dev)) | ||
6532 | return; | ||
6533 | |||
6528 | mutex_lock(&dev_priv->pc8.lock); | 6534 | mutex_lock(&dev_priv->pc8.lock); |
6529 | __hsw_disable_package_c8(dev_priv); | 6535 | __hsw_disable_package_c8(dev_priv); |
6530 | mutex_unlock(&dev_priv->pc8.lock); | 6536 | mutex_unlock(&dev_priv->pc8.lock); |
@@ -6562,6 +6568,9 @@ static void hsw_update_package_c8(struct drm_device *dev) | |||
6562 | struct drm_i915_private *dev_priv = dev->dev_private; | 6568 | struct drm_i915_private *dev_priv = dev->dev_private; |
6563 | bool allow; | 6569 | bool allow; |
6564 | 6570 | ||
6571 | if (!HAS_PC8(dev_priv->dev)) | ||
6572 | return; | ||
6573 | |||
6565 | if (!i915_enable_pc8) | 6574 | if (!i915_enable_pc8) |
6566 | return; | 6575 | return; |
6567 | 6576 | ||
@@ -6585,6 +6594,9 @@ done: | |||
6585 | 6594 | ||
6586 | static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv) | 6595 | static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv) |
6587 | { | 6596 | { |
6597 | if (!HAS_PC8(dev_priv->dev)) | ||
6598 | return; | ||
6599 | |||
6588 | mutex_lock(&dev_priv->pc8.lock); | 6600 | mutex_lock(&dev_priv->pc8.lock); |
6589 | if (!dev_priv->pc8.gpu_idle) { | 6601 | if (!dev_priv->pc8.gpu_idle) { |
6590 | dev_priv->pc8.gpu_idle = true; | 6602 | dev_priv->pc8.gpu_idle = true; |
@@ -6595,6 +6607,9 @@ static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv) | |||
6595 | 6607 | ||
6596 | static void hsw_package_c8_gpu_busy(struct drm_i915_private *dev_priv) | 6608 | static void hsw_package_c8_gpu_busy(struct drm_i915_private *dev_priv) |
6597 | { | 6609 | { |
6610 | if (!HAS_PC8(dev_priv->dev)) | ||
6611 | return; | ||
6612 | |||
6598 | mutex_lock(&dev_priv->pc8.lock); | 6613 | mutex_lock(&dev_priv->pc8.lock); |
6599 | if (dev_priv->pc8.gpu_idle) { | 6614 | if (dev_priv->pc8.gpu_idle) { |
6600 | dev_priv->pc8.gpu_idle = false; | 6615 | dev_priv->pc8.gpu_idle = false; |