aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorFelix Fietkau <nbd@openwrt.org>2012-04-19 15:18:26 -0400
committerJohn W. Linville <linville@tuxdriver.com>2012-04-23 15:35:31 -0400
commit7c5adc8d83c344dbad251091879baf1244007564 (patch)
tree05494972ed0de7a8f9e0f634276400b597a126c2
parent3e61d3f9b2f6381f6f30d3d0ff874251a3491d05 (diff)
ath9k_hw: fix and clean up PHY activation delay
The delay calculation is the same for all chips, however some parts of the code missed the extra delay factor for half/quarter. Clean up the code and move the delay calculation to a common place. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_phy.c17
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c20
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c16
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h2
4 files changed, 22 insertions, 33 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index de30cb34b8f3..f554bff87e62 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -618,19 +618,10 @@ static void ar5008_hw_init_bb(struct ath_hw *ah,
618 u32 synthDelay; 618 u32 synthDelay;
619 619
620 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; 620 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
621 if (IS_CHAN_B(chan))
622 synthDelay = (4 * synthDelay) / 22;
623 else
624 synthDelay /= 10;
625
626 if (IS_CHAN_HALF_RATE(chan))
627 synthDelay *= 2;
628 else if (IS_CHAN_QUARTER_RATE(chan))
629 synthDelay *= 4;
630 621
631 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); 622 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
632 623
633 udelay(synthDelay + BASE_ACTIVATE_DELAY); 624 ath9k_hw_synth_delay(ah, chan, synthDelay);
634} 625}
635 626
636static void ar5008_hw_init_chain_masks(struct ath_hw *ah) 627static void ar5008_hw_init_chain_masks(struct ath_hw *ah)
@@ -948,12 +939,8 @@ static bool ar5008_hw_rfbus_req(struct ath_hw *ah)
948static void ar5008_hw_rfbus_done(struct ath_hw *ah) 939static void ar5008_hw_rfbus_done(struct ath_hw *ah)
949{ 940{
950 u32 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; 941 u32 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
951 if (IS_CHAN_B(ah->curchan))
952 synthDelay = (4 * synthDelay) / 22;
953 else
954 synthDelay /= 10;
955 942
956 udelay(synthDelay + BASE_ACTIVATE_DELAY); 943 ath9k_hw_synth_delay(ah, ah->curchan, synthDelay);
957 944
958 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0); 945 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
959} 946}
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 4c8d0d770945..a1c0879a5d4e 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -526,22 +526,10 @@ static void ar9003_hw_init_bb(struct ath_hw *ah,
526 * Value is in 100ns increments. 526 * Value is in 100ns increments.
527 */ 527 */
528 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; 528 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
529 if (IS_CHAN_B(chan))
530 synthDelay = (4 * synthDelay) / 22;
531 else
532 synthDelay /= 10;
533 529
534 /* Activate the PHY (includes baseband activate + synthesizer on) */ 530 /* Activate the PHY (includes baseband activate + synthesizer on) */
535 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); 531 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
536 532 ath9k_hw_synth_delay(ah, chan, synthDelay);
537 /*
538 * There is an issue if the AP starts the calibration before
539 * the base band timeout completes. This could result in the
540 * rx_clear false triggering. As a workaround we add delay an
541 * extra BASE_ACTIVATE_DELAY usecs to ensure this condition
542 * does not happen.
543 */
544 udelay(synthDelay + BASE_ACTIVATE_DELAY);
545} 533}
546 534
547static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx) 535static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
@@ -801,12 +789,8 @@ static bool ar9003_hw_rfbus_req(struct ath_hw *ah)
801static void ar9003_hw_rfbus_done(struct ath_hw *ah) 789static void ar9003_hw_rfbus_done(struct ath_hw *ah)
802{ 790{
803 u32 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; 791 u32 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
804 if (IS_CHAN_B(ah->curchan))
805 synthDelay = (4 * synthDelay) / 22;
806 else
807 synthDelay /= 10;
808 792
809 udelay(synthDelay + BASE_ACTIVATE_DELAY); 793 ath9k_hw_synth_delay(ah, ah->curchan, synthDelay);
810 794
811 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0); 795 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
812} 796}
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 4dddffd7c403..e576a92f18a3 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -191,6 +191,22 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
191} 191}
192EXPORT_SYMBOL(ath9k_hw_wait); 192EXPORT_SYMBOL(ath9k_hw_wait);
193 193
194void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
195 int hw_delay)
196{
197 if (IS_CHAN_B(chan))
198 hw_delay = (4 * hw_delay) / 22;
199 else
200 hw_delay /= 10;
201
202 if (IS_CHAN_HALF_RATE(chan))
203 hw_delay *= 2;
204 else if (IS_CHAN_QUARTER_RATE(chan))
205 hw_delay *= 4;
206
207 udelay(hw_delay + BASE_ACTIVATE_DELAY);
208}
209
194void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array, 210void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
195 int column, unsigned int *writecnt) 211 int column, unsigned int *writecnt)
196{ 212{
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 8c827a183fc0..8535f76699af 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -923,6 +923,8 @@ void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val);
923void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna); 923void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna);
924 924
925/* General Operation */ 925/* General Operation */
926void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
927 int hw_delay);
926bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout); 928bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
927void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array, 929void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
928 int column, unsigned int *writecnt); 930 int column, unsigned int *writecnt);