aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2015-01-21 14:38:09 -0500
committerDarren Hart <dvhart@linux.intel.com>2015-01-29 00:21:10 -0500
commit7c2e3c74767cf108635d1a5bd9fe014474c61ebf (patch)
tree88a0db17a659f16e9bb6d45d8f87047c071161ce
parent03070e7c9d2dde754e49b189a195a7f5cc1ac7a1 (diff)
intel_scu_ipc: fix indentation in few places
While here, do couple of amendments: - move platform variable to the function where it's used - define intel_scu_ipc_check_status() static Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
-rw-r--r--drivers/platform/x86/intel_scu_ipc.c31
1 files changed, 14 insertions, 17 deletions
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c
index 66a4d3284aab..8938c31be447 100644
--- a/drivers/platform/x86/intel_scu_ipc.c
+++ b/drivers/platform/x86/intel_scu_ipc.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * intel_scu_ipc.c: Driver for the Intel SCU IPC mechanism 2 * intel_scu_ipc.c: Driver for the Intel SCU IPC mechanism
3 * 3 *
4 * (C) Copyright 2008-2010 Intel Corporation 4 * (C) Copyright 2008-2010,2015 Intel Corporation
5 * Author: Sreedhara DS (sreedhara.ds@intel.com) 5 * Author: Sreedhara DS (sreedhara.ds@intel.com)
6 * 6 *
7 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
@@ -67,7 +67,7 @@
67#define PCI_DEVICE_ID_CLOVERVIEW 0x08ea 67#define PCI_DEVICE_ID_CLOVERVIEW 0x08ea
68#define PCI_DEVICE_ID_TANGIER 0x11a0 68#define PCI_DEVICE_ID_TANGIER 0x11a0
69 69
70/* intel scu ipc driver data*/ 70/* intel scu ipc driver data */
71struct intel_scu_ipc_pdata_t { 71struct intel_scu_ipc_pdata_t {
72 u32 ipc_base; 72 u32 ipc_base;
73 u32 i2c_base; 73 u32 i2c_base;
@@ -114,8 +114,6 @@ struct intel_scu_ipc_dev {
114 114
115static struct intel_scu_ipc_dev ipcdev; /* Only one for now */ 115static struct intel_scu_ipc_dev ipcdev; /* Only one for now */
116 116
117static int platform; /* Platform type */
118
119/* 117/*
120 * IPC Read Buffer (Read Only): 118 * IPC Read Buffer (Read Only):
121 * 16 byte buffer for receiving data from SCU, if IPC command 119 * 16 byte buffer for receiving data from SCU, if IPC command
@@ -160,7 +158,6 @@ static inline void ipc_data_writel(u32 data, u32 offset) /* Write ipc data */
160 * Format: 158 * Format:
161 * |rfu3(8)|error code(8)|initiator id(8)|cmd id(4)|rfu1(2)|error(1)|busy(1)| 159 * |rfu3(8)|error code(8)|initiator id(8)|cmd id(4)|rfu1(2)|error(1)|busy(1)|
162 */ 160 */
163
164static inline u8 ipc_read_status(void) 161static inline u8 ipc_read_status(void)
165{ 162{
166 return __raw_readl(ipcdev.ipc_base + 0x04); 163 return __raw_readl(ipcdev.ipc_base + 0x04);
@@ -176,7 +173,8 @@ static inline u32 ipc_data_readl(u32 offset) /* Read ipc u32 data */
176 return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset); 173 return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
177} 174}
178 175
179static inline int busy_loop(void) /* Wait till scu status is busy */ 176/* Wait till scu status is busy */
177static inline int busy_loop(void)
180{ 178{
181 u32 status = 0; 179 u32 status = 0;
182 u32 loop_count = 0; 180 u32 loop_count = 0;
@@ -217,7 +215,7 @@ static inline int ipc_wait_for_interrupt(void)
217 return 0; 215 return 0;
218} 216}
219 217
220int intel_scu_ipc_check_status(void) 218static int intel_scu_ipc_check_status(void)
221{ 219{
222 return ipcdev.irq_mode ? ipc_wait_for_interrupt() : busy_loop(); 220 return ipcdev.irq_mode ? ipc_wait_for_interrupt() : busy_loop();
223} 221}
@@ -248,18 +246,18 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
248 if (id == IPC_CMD_PCNTRL_R) { 246 if (id == IPC_CMD_PCNTRL_R) {
249 for (nc = 0, offset = 0; nc < count; nc++, offset += 4) 247 for (nc = 0, offset = 0; nc < count; nc++, offset += 4)
250 ipc_data_writel(wbuf[nc], offset); 248 ipc_data_writel(wbuf[nc], offset);
251 ipc_command((count*2) << 16 | id << 12 | 0 << 8 | op); 249 ipc_command((count * 2) << 16 | id << 12 | 0 << 8 | op);
252 } else if (id == IPC_CMD_PCNTRL_W) { 250 } else if (id == IPC_CMD_PCNTRL_W) {
253 for (nc = 0; nc < count; nc++, offset += 1) 251 for (nc = 0; nc < count; nc++, offset += 1)
254 cbuf[offset] = data[nc]; 252 cbuf[offset] = data[nc];
255 for (nc = 0, offset = 0; nc < count; nc++, offset += 4) 253 for (nc = 0, offset = 0; nc < count; nc++, offset += 4)
256 ipc_data_writel(wbuf[nc], offset); 254 ipc_data_writel(wbuf[nc], offset);
257 ipc_command((count*3) << 16 | id << 12 | 0 << 8 | op); 255 ipc_command((count * 3) << 16 | id << 12 | 0 << 8 | op);
258 } else if (id == IPC_CMD_PCNTRL_M) { 256 } else if (id == IPC_CMD_PCNTRL_M) {
259 cbuf[offset] = data[0]; 257 cbuf[offset] = data[0];
260 cbuf[offset + 1] = data[1]; 258 cbuf[offset + 1] = data[1];
261 ipc_data_writel(wbuf[0], 0); /* Write wbuff */ 259 ipc_data_writel(wbuf[0], 0); /* Write wbuff */
262 ipc_command(4 << 16 | id << 12 | 0 << 8 | op); 260 ipc_command(4 << 16 | id << 12 | 0 << 8 | op);
263 } 261 }
264 262
265 err = intel_scu_ipc_check_status(); 263 err = intel_scu_ipc_check_status();
@@ -301,7 +299,7 @@ EXPORT_SYMBOL(intel_scu_ipc_ioread8);
301 */ 299 */
302int intel_scu_ipc_ioread16(u16 addr, u16 *data) 300int intel_scu_ipc_ioread16(u16 addr, u16 *data)
303{ 301{
304 u16 x[2] = {addr, addr + 1 }; 302 u16 x[2] = {addr, addr + 1};
305 return pwr_reg_rdwr(x, (u8 *)data, 2, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_R); 303 return pwr_reg_rdwr(x, (u8 *)data, 2, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_R);
306} 304}
307EXPORT_SYMBOL(intel_scu_ipc_ioread16); 305EXPORT_SYMBOL(intel_scu_ipc_ioread16);
@@ -351,7 +349,7 @@ EXPORT_SYMBOL(intel_scu_ipc_iowrite8);
351 */ 349 */
352int intel_scu_ipc_iowrite16(u16 addr, u16 data) 350int intel_scu_ipc_iowrite16(u16 addr, u16 data)
353{ 351{
354 u16 x[2] = {addr, addr + 1 }; 352 u16 x[2] = {addr, addr + 1};
355 return pwr_reg_rdwr(x, (u8 *)&data, 2, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_W); 353 return pwr_reg_rdwr(x, (u8 *)&data, 2, IPCMSG_PCNTRL, IPC_CMD_PCNTRL_W);
356} 354}
357EXPORT_SYMBOL(intel_scu_ipc_iowrite16); 355EXPORT_SYMBOL(intel_scu_ipc_iowrite16);
@@ -412,7 +410,6 @@ int intel_scu_ipc_writev(u16 *addr, u8 *data, int len)
412} 410}
413EXPORT_SYMBOL(intel_scu_ipc_writev); 411EXPORT_SYMBOL(intel_scu_ipc_writev);
414 412
415
416/** 413/**
417 * intel_scu_ipc_update_register - r/m/w a register 414 * intel_scu_ipc_update_register - r/m/w a register
418 * @addr: register address 415 * @addr: register address
@@ -475,9 +472,8 @@ EXPORT_SYMBOL(intel_scu_ipc_simple_command);
475 * Issue a command to the SCU which involves data transfers. Do the 472 * Issue a command to the SCU which involves data transfers. Do the
476 * data copies under the lock but leave it for the caller to interpret 473 * data copies under the lock but leave it for the caller to interpret
477 */ 474 */
478
479int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, 475int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
480 u32 *out, int outlen) 476 u32 *out, int outlen)
481{ 477{
482 int i, err; 478 int i, err;
483 479
@@ -503,7 +499,7 @@ int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
503} 499}
504EXPORT_SYMBOL(intel_scu_ipc_command); 500EXPORT_SYMBOL(intel_scu_ipc_command);
505 501
506/*I2C commands */ 502/* I2C commands */
507#define IPC_I2C_WRITE 1 /* I2C Write command */ 503#define IPC_I2C_WRITE 1 /* I2C Write command */
508#define IPC_I2C_READ 2 /* I2C Read command */ 504#define IPC_I2C_READ 2 /* I2C Read command */
509 505
@@ -666,9 +662,10 @@ static struct pci_driver ipc_driver = {
666 .remove = ipc_remove, 662 .remove = ipc_remove,
667}; 663};
668 664
669
670static int __init intel_scu_ipc_init(void) 665static int __init intel_scu_ipc_init(void)
671{ 666{
667 int platform; /* Platform type */
668
672 platform = intel_mid_identify_cpu(); 669 platform = intel_mid_identify_cpu();
673 if (platform == 0) 670 if (platform == 0)
674 return -ENODEV; 671 return -ENODEV;