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authorMagnus Damm <damm@opensource.se>2010-02-19 04:26:56 -0500
committerPaul Mundt <lethal@linux-sh.org>2010-02-22 05:11:22 -0500
commit7be85c6eb4462cd973e680d9dcf897a7b5b26165 (patch)
tree5da0ed4f9d6e24676cca7db071ba3380ee6c0cd7
parent0a5f337ecd20e70e84a5cfc0f2c24d0366087026 (diff)
sh: add sh7724 kick callback to clk_div4_table
This patch adds a ->kick() callback to clk_div4_table and ties it into sh_clk_div4_set_rate(). A sh7724 specific kick function is also added that updates the KICK bit whenever div4 clocks in FRQCRA and FRQCRB have been set. Allows us to set the VPU clock. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/include/asm/clock.h1
-rw-r--r--arch/sh/kernel/cpu/clock-cpg.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c11
3 files changed, 16 insertions, 0 deletions
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index dbb5746e88f6..11da4c5beb68 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -148,6 +148,7 @@ int sh_clk_mstp32_register(struct clk *clks, int nr);
148 148
149struct clk_div4_table { 149struct clk_div4_table {
150 struct clk_div_mult_table *div_mult_table; 150 struct clk_div_mult_table *div_mult_table;
151 void (*kick)(struct clk *clk);
151}; 152};
152 153
153int sh_clk_div4_register(struct clk *clks, int nr, 154int sh_clk_div4_register(struct clk *clks, int nr,
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index 1fc8a0e50603..eed5eaff96ba 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -188,6 +188,7 @@ static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
188 188
189static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id) 189static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id)
190{ 190{
191 struct clk_div4_table *d4t = clk->priv;
191 unsigned long value; 192 unsigned long value;
192 int idx = clk_rate_table_find(clk, clk->freq_table, rate); 193 int idx = clk_rate_table_find(clk, clk->freq_table, rate);
193 if (idx < 0) 194 if (idx < 0)
@@ -198,6 +199,9 @@ static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate, int algo_id
198 value |= (idx << clk->enable_bit); 199 value |= (idx << clk->enable_bit);
199 __raw_writel(value, clk->enable_reg); 200 __raw_writel(value, clk->enable_reg);
200 201
202 if (d4t->kick)
203 d4t->kick(clk);
204
201 return 0; 205 return 0;
202} 206}
203 207
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 70517900ef8f..a8a993fc894a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -127,6 +127,16 @@ struct clk *main_clks[] = {
127 &div3_clk, 127 &div3_clk,
128}; 128};
129 129
130static void div4_kick(struct clk *clk)
131{
132 unsigned long value;
133
134 /* set KICK bit in FRQCRA to update hardware setting */
135 value = __raw_readl(FRQCRA);
136 value |= (1 << 31);
137 __raw_writel(value, FRQCRA);
138}
139
130static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 }; 140static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 };
131 141
132static struct clk_div_mult_table div4_div_mult_table = { 142static struct clk_div_mult_table div4_div_mult_table = {
@@ -136,6 +146,7 @@ static struct clk_div_mult_table div4_div_mult_table = {
136 146
137static struct clk_div4_table div4_table = { 147static struct clk_div4_table div4_table = {
138 .div_mult_table = &div4_div_mult_table, 148 .div_mult_table = &div4_div_mult_table,
149 .kick = div4_kick,
139}; 150};
140 151
141enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; 152enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR };