diff options
author | Mike Snitzer <snitzer@redhat.com> | 2013-11-12 12:17:43 -0500 |
---|---|---|
committer | Mike Snitzer <snitzer@redhat.com> | 2013-11-12 13:11:09 -0500 |
commit | 7b6b2bc98c0303b7f043ad5b35906f833e56308d (patch) | |
tree | a1c051a829ec191f4ded87b1e996a03c8c77566a | |
parent | 65790ff919e2e07ccb4457415c11075b245d643b (diff) |
dm cache: resolve small nits and improve Documentation
Document passthrough mode, cache shrinking, and cache invalidation.
Also, use strcasecmp() and hlist_unhashed().
Reported-by: Alasdair G Kergon <agk@redhat.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
-rw-r--r-- | Documentation/device-mapper/cache.txt | 42 | ||||
-rw-r--r-- | drivers/md/dm-cache-policy-mq.c | 2 | ||||
-rw-r--r-- | drivers/md/dm-cache-target.c | 2 |
3 files changed, 34 insertions, 12 deletions
diff --git a/Documentation/device-mapper/cache.txt b/Documentation/device-mapper/cache.txt index fc9d2dfb9415..274752f8bdf9 100644 --- a/Documentation/device-mapper/cache.txt +++ b/Documentation/device-mapper/cache.txt | |||
@@ -86,16 +86,27 @@ If passthrough is selected, useful when the cache contents are not known | |||
86 | to be coherent with the origin device, then all reads are served from | 86 | to be coherent with the origin device, then all reads are served from |
87 | the origin device (all reads miss the cache) and all writes are | 87 | the origin device (all reads miss the cache) and all writes are |
88 | forwarded to the origin device; additionally, write hits cause cache | 88 | forwarded to the origin device; additionally, write hits cause cache |
89 | block invalidates. Passthrough mode allows a cache device to be | 89 | block invalidates. To enable passthrough mode the cache must be clean. |
90 | activated without having to worry about coherency. Coherency that | 90 | Passthrough mode allows a cache device to be activated without having to |
91 | exists is maintained, although the cache will gradually cool as writes | 91 | worry about coherency. Coherency that exists is maintained, although |
92 | take place. If the coherency of the cache can later be verified, or | 92 | the cache will gradually cool as writes take place. If the coherency of |
93 | established, the cache device can can be transitioned to writethrough or | 93 | the cache can later be verified, or established through use of the |
94 | writeback mode while still warm. Otherwise, the cache contents can be | 94 | "invalidate_cblocks" message, the cache device can be transitioned to |
95 | discarded prior to transitioning to the desired operating mode. | 95 | writethrough or writeback mode while still warm. Otherwise, the cache |
96 | contents can be discarded prior to transitioning to the desired | ||
97 | operating mode. | ||
96 | 98 | ||
97 | A simple cleaner policy is provided, which will clean (write back) all | 99 | A simple cleaner policy is provided, which will clean (write back) all |
98 | dirty blocks in a cache. Useful for decommissioning a cache. | 100 | dirty blocks in a cache. Useful for decommissioning a cache or when |
101 | shrinking a cache. Shrinking the cache's fast device requires all cache | ||
102 | blocks, in the area of the cache being removed, to be clean. If the | ||
103 | area being removed from the cache still contains dirty blocks the resize | ||
104 | will fail. Care must be taken to never reduce the volume used for the | ||
105 | cache's fast device until the cache is clean. This is of particular | ||
106 | importance if writeback mode is used. Writethrough and passthrough | ||
107 | modes already maintain a clean cache. Future support to partially clean | ||
108 | the cache, above a specified threshold, will allow for keeping the cache | ||
109 | warm and in writeback mode during resize. | ||
99 | 110 | ||
100 | Migration throttling | 111 | Migration throttling |
101 | -------------------- | 112 | -------------------- |
@@ -174,7 +185,7 @@ Constructor | |||
174 | block size : cache unit size in sectors | 185 | block size : cache unit size in sectors |
175 | 186 | ||
176 | #feature args : number of feature arguments passed | 187 | #feature args : number of feature arguments passed |
177 | feature args : writethrough. (The default is writeback.) | 188 | feature args : writethrough or passthrough (The default is writeback.) |
178 | 189 | ||
179 | policy : the replacement policy to use | 190 | policy : the replacement policy to use |
180 | #policy args : an even number of arguments corresponding to | 191 | #policy args : an even number of arguments corresponding to |
@@ -190,6 +201,13 @@ Optional feature arguments are: | |||
190 | back cache block contents later for performance reasons, | 201 | back cache block contents later for performance reasons, |
191 | so they may differ from the corresponding origin blocks. | 202 | so they may differ from the corresponding origin blocks. |
192 | 203 | ||
204 | passthrough : a degraded mode useful for various cache coherency | ||
205 | situations (e.g., rolling back snapshots of | ||
206 | underlying storage). Reads and writes always go to | ||
207 | the origin. If a write goes to a cached origin | ||
208 | block, then the cache block is invalidated. | ||
209 | To enable passthrough mode the cache must be clean. | ||
210 | |||
193 | A policy called 'default' is always registered. This is an alias for | 211 | A policy called 'default' is always registered. This is an alias for |
194 | the policy we currently think is giving best all round performance. | 212 | the policy we currently think is giving best all round performance. |
195 | 213 | ||
@@ -247,7 +265,11 @@ E.g. | |||
247 | 265 | ||
248 | Invalidation is removing an entry from the cache without writing it | 266 | Invalidation is removing an entry from the cache without writing it |
249 | back. Cache blocks can be invalidated via the invalidate_cblocks | 267 | back. Cache blocks can be invalidated via the invalidate_cblocks |
250 | message, which takes an arbitrary number of cblock ranges. | 268 | message, which takes an arbitrary number of cblock ranges. Each cblock |
269 | must be expressed as a decimal value, in the future a variant message | ||
270 | that takes cblock ranges expressed in hexidecimal may be needed to | ||
271 | better support efficient invalidation of larger caches. The cache must | ||
272 | be in passthrough mode when invalidate_cblocks is used. | ||
251 | 273 | ||
252 | invalidate_cblocks [<cblock>|<cblock begin>-<cblock end>]* | 274 | invalidate_cblocks [<cblock>|<cblock begin>-<cblock end>]* |
253 | 275 | ||
diff --git a/drivers/md/dm-cache-policy-mq.c b/drivers/md/dm-cache-policy-mq.c index 7209fab8b8ed..416b7b752a6e 100644 --- a/drivers/md/dm-cache-policy-mq.c +++ b/drivers/md/dm-cache-policy-mq.c | |||
@@ -310,7 +310,7 @@ static void free_entry(struct entry_pool *ep, struct entry *e) | |||
310 | static struct entry *epool_find(struct entry_pool *ep, dm_cblock_t cblock) | 310 | static struct entry *epool_find(struct entry_pool *ep, dm_cblock_t cblock) |
311 | { | 311 | { |
312 | struct entry *e = ep->entries + from_cblock(cblock); | 312 | struct entry *e = ep->entries + from_cblock(cblock); |
313 | return e->hlist.pprev ? e : NULL; | 313 | return !hlist_unhashed(&e->hlist) ? e : NULL; |
314 | } | 314 | } |
315 | 315 | ||
316 | static bool epool_empty(struct entry_pool *ep) | 316 | static bool epool_empty(struct entry_pool *ep) |
diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c index 41e664b474f1..9efcf1059b99 100644 --- a/drivers/md/dm-cache-target.c +++ b/drivers/md/dm-cache-target.c | |||
@@ -3057,7 +3057,7 @@ static int cache_message(struct dm_target *ti, unsigned argc, char **argv) | |||
3057 | if (!argc) | 3057 | if (!argc) |
3058 | return -EINVAL; | 3058 | return -EINVAL; |
3059 | 3059 | ||
3060 | if (!strcmp(argv[0], "invalidate_cblocks")) | 3060 | if (!strcasecmp(argv[0], "invalidate_cblocks")) |
3061 | return process_invalidate_cblocks_message(cache, argc - 1, (const char **) argv + 1); | 3061 | return process_invalidate_cblocks_message(cache, argc - 1, (const char **) argv + 1); |
3062 | 3062 | ||
3063 | if (argc != 2) | 3063 | if (argc != 2) |