diff options
author | Ian Abbott <abbotti@mev.co.uk> | 2013-10-21 05:10:39 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-10-29 12:09:54 -0400 |
commit | 7a1046e5c0fdce80ba075c2edd8a97b7485693ce (patch) | |
tree | 04a5e3038d034c1cf71cb75307992ba4376231f5 | |
parent | 43ce748ff283169845af3eb012d22cd14792ce7d (diff) |
staging: comedi: s626: replace S626_MULT_X? values
Replace the use of the `S626_MULT_X1`, `S626_MULT_X2` and `S626_MULT_X4`
clock multiplier values with the equivalent `S626_CLKMULT_1X`,
`S626_CLKMULT_2X` and `S626_CLKMULT_4X` values to avoid duplication.
Replace the use of `S626_MULT_X0` with a new macro
`S626_CLKMULT_SPECIAL` (this is treated specially by the
'ClkMultA'/'ClkMultB' field of the 'CRA'/'CRB' register). Remove the
now unused `S626_MULT_X?` macros.
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/staging/comedi/drivers/s626.c | 28 | ||||
-rw-r--r-- | drivers/staging/comedi/drivers/s626.h | 12 |
2 files changed, 15 insertions, 25 deletions
diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c index c2837da862db..6815cfe2664e 100644 --- a/drivers/staging/comedi/drivers/s626.c +++ b/drivers/staging/comedi/drivers/s626.c | |||
@@ -731,7 +731,7 @@ static uint16_t s626_get_mode_a(struct comedi_device *dev, | |||
731 | /* Set ClkPol to indicate count direction (CntSrcA<0>). */ | 731 | /* Set ClkPol to indicate count direction (CntSrcA<0>). */ |
732 | clkpol = cntsrc & 1; | 732 | clkpol = cntsrc & 1; |
733 | /* ClkMult must be 1x in Timer mode. */ | 733 | /* ClkMult must be 1x in Timer mode. */ |
734 | clkmult = S626_MULT_X1; | 734 | clkmult = S626_CLKMULT_1X; |
735 | } else { | 735 | } else { |
736 | /* Counter mode (CntSrcA<1> == 0): */ | 736 | /* Counter mode (CntSrcA<1> == 0): */ |
737 | encmode = S626_ENCMODE_COUNTER; | 737 | encmode = S626_ENCMODE_COUNTER; |
@@ -739,8 +739,8 @@ static uint16_t s626_get_mode_a(struct comedi_device *dev, | |||
739 | clkpol = S626_GET_CRA_CLKPOL_A(cra); | 739 | clkpol = S626_GET_CRA_CLKPOL_A(cra); |
740 | /* Force ClkMult to 1x if not legal, else pass through. */ | 740 | /* Force ClkMult to 1x if not legal, else pass through. */ |
741 | clkmult = S626_GET_CRA_CLKMULT_A(cra); | 741 | clkmult = S626_GET_CRA_CLKMULT_A(cra); |
742 | if (clkmult == S626_MULT_X0) | 742 | if (clkmult == S626_CLKMULT_SPECIAL) |
743 | clkmult = S626_MULT_X1; | 743 | clkmult = S626_CLKMULT_1X; |
744 | } | 744 | } |
745 | setup |= S626_SET_STD_ENCMODE(encmode) | S626_SET_STD_CLKMULT(clkmult) | | 745 | setup |= S626_SET_STD_ENCMODE(encmode) | S626_SET_STD_CLKMULT(clkmult) | |
746 | S626_SET_STD_CLKPOL(clkpol); | 746 | S626_SET_STD_CLKPOL(clkpol); |
@@ -781,18 +781,18 @@ static uint16_t s626_get_mode_b(struct comedi_device *dev, | |||
781 | /* Adjust mode-dependent parameters. */ | 781 | /* Adjust mode-dependent parameters. */ |
782 | cntsrc = S626_GET_CRA_CNTSRC_B(cra); | 782 | cntsrc = S626_GET_CRA_CNTSRC_B(cra); |
783 | clkmult = S626_GET_CRB_CLKMULT_B(crb); | 783 | clkmult = S626_GET_CRB_CLKMULT_B(crb); |
784 | if (clkmult == S626_MULT_X0) { | 784 | if (clkmult == S626_CLKMULT_SPECIAL) { |
785 | /* Extender mode (ClkMultB == S626_MULT_X0): */ | 785 | /* Extender mode (ClkMultB == S626_CLKMULT_SPECIAL): */ |
786 | encmode = S626_ENCMODE_EXTENDER; | 786 | encmode = S626_ENCMODE_EXTENDER; |
787 | /* Indicate multiplier is 1x. */ | 787 | /* Indicate multiplier is 1x. */ |
788 | clkmult = S626_MULT_X1; | 788 | clkmult = S626_CLKMULT_1X; |
789 | /* Set ClkPol equal to Timer count direction (CntSrcB<0>). */ | 789 | /* Set ClkPol equal to Timer count direction (CntSrcB<0>). */ |
790 | clkpol = cntsrc & 1; | 790 | clkpol = cntsrc & 1; |
791 | } else if (cntsrc & S626_CNTSRC_SYSCLK) { | 791 | } else if (cntsrc & S626_CNTSRC_SYSCLK) { |
792 | /* Timer mode (CntSrcB<1> == 1): */ | 792 | /* Timer mode (CntSrcB<1> == 1): */ |
793 | encmode = S626_ENCMODE_TIMER; | 793 | encmode = S626_ENCMODE_TIMER; |
794 | /* Indicate multiplier is 1x. */ | 794 | /* Indicate multiplier is 1x. */ |
795 | clkmult = S626_MULT_X1; | 795 | clkmult = S626_CLKMULT_1X; |
796 | /* Set ClkPol equal to Timer count direction (CntSrcB<0>). */ | 796 | /* Set ClkPol equal to Timer count direction (CntSrcB<0>). */ |
797 | clkpol = cntsrc & 1; | 797 | clkpol = cntsrc & 1; |
798 | } else { | 798 | } else { |
@@ -853,7 +853,7 @@ static void s626_set_mode_a(struct comedi_device *dev, | |||
853 | /* ClkPolA behaves as always-on clock enable. */ | 853 | /* ClkPolA behaves as always-on clock enable. */ |
854 | clkpol = 1; | 854 | clkpol = 1; |
855 | /* ClkMult must be 1x. */ | 855 | /* ClkMult must be 1x. */ |
856 | clkmult = S626_MULT_X1; | 856 | clkmult = S626_CLKMULT_1X; |
857 | break; | 857 | break; |
858 | default: /* Counter Mode: */ | 858 | default: /* Counter Mode: */ |
859 | /* Select ENC_C and ENC_D as clock/direction inputs. */ | 859 | /* Select ENC_C and ENC_D as clock/direction inputs. */ |
@@ -861,8 +861,8 @@ static void s626_set_mode_a(struct comedi_device *dev, | |||
861 | /* Clock polarity is passed through. */ | 861 | /* Clock polarity is passed through. */ |
862 | /* Force multiplier to x1 if not legal, else pass through. */ | 862 | /* Force multiplier to x1 if not legal, else pass through. */ |
863 | clkmult = S626_GET_STD_CLKMULT(setup); | 863 | clkmult = S626_GET_STD_CLKMULT(setup); |
864 | if (clkmult == S626_MULT_X0) | 864 | if (clkmult == S626_CLKMULT_SPECIAL) |
865 | clkmult = S626_MULT_X1; | 865 | clkmult = S626_CLKMULT_1X; |
866 | break; | 866 | break; |
867 | } | 867 | } |
868 | cra |= S626_SET_CRA_CNTSRC_A(cntsrc) | S626_SET_CRA_CLKPOL_A(clkpol) | | 868 | cra |= S626_SET_CRA_CNTSRC_A(cntsrc) | S626_SET_CRA_CLKPOL_A(clkpol) | |
@@ -927,7 +927,7 @@ static void s626_set_mode_b(struct comedi_device *dev, | |||
927 | /* ClkPolB behaves as always-on clock enable. */ | 927 | /* ClkPolB behaves as always-on clock enable. */ |
928 | clkpol = 1; | 928 | clkpol = 1; |
929 | /* ClkMultB must be 1x. */ | 929 | /* ClkMultB must be 1x. */ |
930 | clkmult = S626_MULT_X1; | 930 | clkmult = S626_CLKMULT_1X; |
931 | break; | 931 | break; |
932 | case S626_ENCMODE_EXTENDER: /* Extender Mode: */ | 932 | case S626_ENCMODE_EXTENDER: /* Extender Mode: */ |
933 | /* CntSrcB source is OverflowA (same as "timer") */ | 933 | /* CntSrcB source is OverflowA (same as "timer") */ |
@@ -937,7 +937,7 @@ static void s626_set_mode_b(struct comedi_device *dev, | |||
937 | /* ClkPolB controls IndexB -- always set to active. */ | 937 | /* ClkPolB controls IndexB -- always set to active. */ |
938 | clkpol = 1; | 938 | clkpol = 1; |
939 | /* ClkMultB selects OverflowA as the clock source. */ | 939 | /* ClkMultB selects OverflowA as the clock source. */ |
940 | clkmult = S626_MULT_X0; | 940 | clkmult = S626_CLKMULT_SPECIAL; |
941 | break; | 941 | break; |
942 | default: /* Counter Mode: */ | 942 | default: /* Counter Mode: */ |
943 | /* Select ENC_C and ENC_D as clock/direction inputs. */ | 943 | /* Select ENC_C and ENC_D as clock/direction inputs. */ |
@@ -945,8 +945,8 @@ static void s626_set_mode_b(struct comedi_device *dev, | |||
945 | /* ClkPol is passed through. */ | 945 | /* ClkPol is passed through. */ |
946 | /* Force ClkMult to x1 if not legal, otherwise pass through. */ | 946 | /* Force ClkMult to x1 if not legal, otherwise pass through. */ |
947 | clkmult = S626_GET_STD_CLKMULT(setup); | 947 | clkmult = S626_GET_STD_CLKMULT(setup); |
948 | if (clkmult == S626_MULT_X0) | 948 | if (clkmult == S626_CLKMULT_SPECIAL) |
949 | clkmult = S626_MULT_X1; | 949 | clkmult = S626_CLKMULT_1X; |
950 | break; | 950 | break; |
951 | } | 951 | } |
952 | cra |= S626_SET_CRA_CNTSRC_B(cntsrc); | 952 | cra |= S626_SET_CRA_CNTSRC_B(cntsrc); |
diff --git a/drivers/staging/comedi/drivers/s626.h b/drivers/staging/comedi/drivers/s626.h index cbd59eb3fea7..33b72739c1cb 100644 --- a/drivers/staging/comedi/drivers/s626.h +++ b/drivers/staging/comedi/drivers/s626.h | |||
@@ -498,17 +498,7 @@ | |||
498 | #define S626_CLKMULT_4X 0 /* 4x clock multiplier. */ | 498 | #define S626_CLKMULT_4X 0 /* 4x clock multiplier. */ |
499 | #define S626_CLKMULT_2X 1 /* 2x clock multiplier. */ | 499 | #define S626_CLKMULT_2X 1 /* 2x clock multiplier. */ |
500 | #define S626_CLKMULT_1X 2 /* 1x clock multiplier. */ | 500 | #define S626_CLKMULT_1X 2 /* 1x clock multiplier. */ |
501 | 501 | #define S626_CLKMULT_SPECIAL 3 /* Special clock multiplier value. */ | |
502 | /* Enumerated counter clock multipliers. */ | ||
503 | |||
504 | #define S626_MULT_X0 0x0003 /* Supports no multipliers; | ||
505 | * fixed physical multiplier = 3. */ | ||
506 | #define S626_MULT_X1 0x0002 /* Supports multiplier x1; | ||
507 | * fixed physical multiplier = 2. */ | ||
508 | #define S626_MULT_X2 0x0001 /* Supports multipliers x1, x2; | ||
509 | * physical multipliers = 1 or 2. */ | ||
510 | #define S626_MULT_X4 0x0000 /* Supports multipliers x1, x2, x4; | ||
511 | * physical multipliers = 0, 1 or 2. */ | ||
512 | 502 | ||
513 | /* Sanity-check limits for parameters. */ | 503 | /* Sanity-check limits for parameters. */ |
514 | 504 | ||