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authorMarc Carino <marc.ceeeee@gmail.com>2014-02-26 04:27:21 -0500
committerMatt Porter <mporter@linaro.org>2014-07-28 10:01:46 -0400
commit79187a8e242046a0525a296509e80c5ee24fbaf1 (patch)
tree4e85dc5756386fb2dc98d9d3aa0849b77f66be11
parentf80b71397d09d72222df6c6c2bf39a8a93351b37 (diff)
ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
Add a sample DTS which will allow bootup of a board populated with the BCM7445 chip. Signed-off-by: Marc Carino <marc.ceeeee@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Matt Porter <mporter@linaro.org> Signed-off-by: Matt Porter <mporter@linaro.org>
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/bcm7445-bcm97445svmb.dts14
-rw-r--r--arch/arm/boot/dts/bcm7445.dtsi111
3 files changed, 127 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index adb5ed9e269e..38439ca9b361 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -59,6 +59,8 @@ dtb-$(CONFIG_ARCH_BERLIN) += \
59 berlin2-sony-nsz-gs7.dtb \ 59 berlin2-sony-nsz-gs7.dtb \
60 berlin2cd-google-chromecast.dtb \ 60 berlin2cd-google-chromecast.dtb \
61 berlin2q-marvell-dmp.dtb 61 berlin2q-marvell-dmp.dtb
62dtb-$(CONFIG_ARCH_BRCMSTB) += \
63 bcm7445-bcm97445svmb.dtb
62dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \ 64dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
63 da850-evm.dtb 65 da850-evm.dtb
64dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb 66dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
diff --git a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
new file mode 100644
index 000000000000..9eec2ac1112f
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
@@ -0,0 +1,14 @@
1/dts-v1/;
2#include "bcm7445.dtsi"
3
4/ {
5 model = "Broadcom STB (bcm7445), SVMB reference board";
6 compatible = "brcm,bcm7445", "brcm,brcmstb";
7
8 memory {
9 device_type = "memory";
10 reg = <0x00 0x00000000 0x00 0x40000000>,
11 <0x00 0x40000000 0x00 0x40000000>,
12 <0x00 0x80000000 0x00 0x40000000>;
13 };
14};
diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi
new file mode 100644
index 000000000000..0ca0f4e523d0
--- /dev/null
+++ b/arch/arm/boot/dts/bcm7445.dtsi
@@ -0,0 +1,111 @@
1#include <dt-bindings/interrupt-controller/arm-gic.h>
2
3#include "skeleton.dtsi"
4
5/ {
6 #address-cells = <2>;
7 #size-cells = <2>;
8 model = "Broadcom STB (bcm7445)";
9 compatible = "brcm,bcm7445", "brcm,brcmstb";
10 interrupt-parent = <&gic>;
11
12 chosen {
13 bootargs = "console=ttyS0,115200 earlyprintk";
14 };
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 cpu@0 {
21 compatible = "brcm,brahma-b15";
22 device_type = "cpu";
23 enable-method = "brcm,brahma-b15";
24 reg = <0>;
25 };
26
27 cpu@1 {
28 compatible = "brcm,brahma-b15";
29 device_type = "cpu";
30 enable-method = "brcm,brahma-b15";
31 reg = <1>;
32 };
33
34 cpu@2 {
35 compatible = "brcm,brahma-b15";
36 device_type = "cpu";
37 enable-method = "brcm,brahma-b15";
38 reg = <2>;
39 };
40
41 cpu@3 {
42 compatible = "brcm,brahma-b15";
43 device_type = "cpu";
44 enable-method = "brcm,brahma-b15";
45 reg = <3>;
46 };
47 };
48
49 gic: interrupt-controller@ffd00000 {
50 compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
51 reg = <0x00 0xffd01000 0x00 0x1000>,
52 <0x00 0xffd02000 0x00 0x2000>,
53 <0x00 0xffd04000 0x00 0x2000>,
54 <0x00 0xffd06000 0x00 0x2000>;
55 interrupt-controller;
56 #interrupt-cells = <3>;
57 };
58
59 timer {
60 compatible = "arm,armv7-timer";
61 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
62 <GIC_PPI 14 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
63 <GIC_PPI 11 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
64 <GIC_PPI 10 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>;
65 };
66
67 rdb {
68 #address-cells = <1>;
69 #size-cells = <1>;
70 compatible = "simple-bus";
71 ranges = <0 0x00 0xf0000000 0x1000000>;
72
73 serial@40ab00 {
74 compatible = "ns16550a";
75 reg = <0x40ab00 0x20>;
76 reg-shift = <2>;
77 reg-io-width = <4>;
78 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
79 clock-frequency = <0x4d3f640>;
80 };
81
82 sun_top_ctrl: syscon@404000 {
83 compatible = "brcm,bcm7445-sun-top-ctrl",
84 "syscon";
85 reg = <0x404000 0x51c>;
86 };
87
88 hif_cpubiuctrl: syscon@3e2400 {
89 compatible = "brcm,bcm7445-hif-cpubiuctrl",
90 "syscon";
91 reg = <0x3e2400 0x5b4>;
92 };
93
94 hif_continuation: syscon@452000 {
95 compatible = "brcm,bcm7445-hif-continuation",
96 "syscon";
97 reg = <0x452000 0x100>;
98 };
99 };
100
101 smpboot {
102 compatible = "brcm,brcmstb-smpboot";
103 syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;
104 syscon-cont = <&hif_continuation>;
105 };
106
107 reboot {
108 compatible = "brcm,brcmstb-reboot";
109 syscon = <&sun_top_ctrl 0x304 0x308>;
110 };
111};